[PATCH] earlycon: Allow specifying a uartclk in options

[PATCH] earlycon: Allow specifying a uartclk in options

[Daniel Kurtz]

Currently when an earlycon is registered, the uartclk is assumed to be
BASE_BAUD * 16 = 1843200.  If a baud rate is specified in the earlycon
options, then 8250_early's init_port will program the UART clock divider
registers based on this assumed uartclk.

However, not all uarts have a UART clock of 1843200.  For example, the
8250_dw uart in AMD's CZ/ST uses a fixed 48 MHz clock (as specified in
cz_uart_desc in acpi_apd.c).  Thus, specifying a baud when using earlycon
on such a device will result in incorrect divider values and a wrong UART
clock.

Fix this by extending the earlycon options parameter to allow specification
of a uartclk, like so:

 earlycon=uart,mmio32,0xfedc6000,115200,48000000

If none is specified, fall-back to prior behavior - 1843200.

Signed-off-by: Daniel Kurtz <djkurtz@chromium.org>
---
 drivers/tty/serial/earlycon.c | 8 ++++++--
 include/linux/serial_core.h   | 2 +-
 2 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/drivers/tty/serial/earlycon.c b/drivers/tty/serial/earlycon.c
index 870e84fb6e39..c9b38f520057 100644
--- a/drivers/tty/serial/earlycon.c
+++ b/drivers/tty/serial/earlycon.c
@@ -115,12 +115,17 @@ static int __init parse_options(struct earlycon_device *device, char *options)
 	}
 
 	if (options) {
-		device->baud = simple_strtoul(options, NULL, 0);
+		char *uartclk;
+		device->baud = simple_strtoul(options, &uartclk, 0);
+		if (*uartclk++ == ',')
+			port->uartclk = simple_strtoul(uartclk, NULL, 0);
 		length = min(strcspn(options, " ") + 1,
 			     (size_t)(sizeof(device->options)));
 		strlcpy(device->options, options, length);
 	}
 
+	port->uartclk = (port->uartclk) ?: BASE_BAUD * 16;
+
 	return 0;
 }
 
@@ -134,7 +139,6 @@ static int __init register_earlycon(char *buf, const struct earlycon_id *match)
 		buf = NULL;
 
 	spin_lock_init(&port->lock);
-	port->uartclk = BASE_BAUD * 16;
 	if (port->mapbase)
 		port->membase = earlycon_map(port->mapbase, 64);
 
diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h
index b32df49a3bd5..b772f0d20b18 100644
--- a/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@ -343,7 +343,7 @@ static inline int uart_poll_timeout(struct uart_port *port)
 struct earlycon_device {
 	struct console *con;
 	struct uart_port port;
-	char options[16];		/* e.g., 115200n8 */
+	char options[32];		/* e.g., 115200n8,48000000 */
 	unsigned int baud;
 };
 
-- 
2.16.2.395.g2e18187dfd-goog

Re: [PATCH] earlycon: Allow specifying a uartclk in options

[Randy Dunlap]

On 03/01/2018 10:20 AM, Daniel Kurtz wrote:
> Currently when an earlycon is registered, the uartclk is assumed to be
> BASE_BAUD * 16 = 1843200.  If a baud rate is specified in the earlycon
> options, then 8250_early's init_port will program the UART clock divider
> registers based on this assumed uartclk.
> 
> However, not all uarts have a UART clock of 1843200.  For example, the
> 8250_dw uart in AMD's CZ/ST uses a fixed 48 MHz clock (as specified in
> cz_uart_desc in acpi_apd.c).  Thus, specifying a baud when using earlycon
> on such a device will result in incorrect divider values and a wrong UART
> clock.
> 
> Fix this by extending the earlycon options parameter to allow specification
> of a uartclk, like so:
> 
>  earlycon=uart,mmio32,0xfedc6000,115200,48000000
> 
> If none is specified, fall-back to prior behavior - 1843200.
> 
> Signed-off-by: Daniel Kurtz <djkurtz@chromium.org>

Hi,

Hopefully there will also be an update to one of
Documentation/admin-guide/kernel-parameters.txt or
Documentation/admin-guide/serial-console.rst.

Thanks.

> ---
>  drivers/tty/serial/earlycon.c | 8 ++++++--
>  include/linux/serial_core.h   | 2 +-
>  2 files changed, 7 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/tty/serial/earlycon.c b/drivers/tty/serial/earlycon.c
> index 870e84fb6e39..c9b38f520057 100644
> --- a/drivers/tty/serial/earlycon.c
> +++ b/drivers/tty/serial/earlycon.c
> @@ -115,12 +115,17 @@ static int __init parse_options(struct earlycon_device *device, char *options)
>  	}
>  
>  	if (options) {
> -		device->baud = simple_strtoul(options, NULL, 0);
> +		char *uartclk;
> +		device->baud = simple_strtoul(options, &uartclk, 0);
> +		if (*uartclk++ == ',')
> +			port->uartclk = simple_strtoul(uartclk, NULL, 0);
>  		length = min(strcspn(options, " ") + 1,
>  			     (size_t)(sizeof(device->options)));
>  		strlcpy(device->options, options, length);
>  	}
>  
> +	port->uartclk = (port->uartclk) ?: BASE_BAUD * 16;
> +
>  	return 0;
>  }
>  
> @@ -134,7 +139,6 @@ static int __init register_earlycon(char *buf, const struct earlycon_id *match)
>  		buf = NULL;
>  
>  	spin_lock_init(&port->lock);
> -	port->uartclk = BASE_BAUD * 16;
>  	if (port->mapbase)
>  		port->membase = earlycon_map(port->mapbase, 64);
>  
> diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h
> index b32df49a3bd5..b772f0d20b18 100644
> --- a/include/linux/serial_core.h
> +++ b/include/linux/serial_core.h
> @@ -343,7 +343,7 @@ static inline int uart_poll_timeout(struct uart_port *port)
>  struct earlycon_device {
>  	struct console *con;
>  	struct uart_port port;
> -	char options[16];		/* e.g., 115200n8 */
> +	char options[32];		/* e.g., 115200n8,48000000 */
>  	unsigned int baud;
>  };
>  
> 


-- 
~Randy

Re: [PATCH] earlycon: Allow specifying a uartclk in options

[Greg Kroah-Hartman]

On Thu, Mar 01, 2018 at 10:30:45AM -0800, Randy Dunlap wrote:
> On 03/01/2018 10:20 AM, Daniel Kurtz wrote:
> > Currently when an earlycon is registered, the uartclk is assumed to be
> > BASE_BAUD * 16 = 1843200.  If a baud rate is specified in the earlycon
> > options, then 8250_early's init_port will program the UART clock divider
> > registers based on this assumed uartclk.
> > 
> > However, not all uarts have a UART clock of 1843200.  For example, the
> > 8250_dw uart in AMD's CZ/ST uses a fixed 48 MHz clock (as specified in
> > cz_uart_desc in acpi_apd.c).  Thus, specifying a baud when using earlycon
> > on such a device will result in incorrect divider values and a wrong UART
> > clock.
> > 
> > Fix this by extending the earlycon options parameter to allow specification
> > of a uartclk, like so:
> > 
> >  earlycon=uart,mmio32,0xfedc6000,115200,48000000
> > 
> > If none is specified, fall-back to prior behavior - 1843200.
> > 
> > Signed-off-by: Daniel Kurtz <djkurtz@chromium.org>
> 
> Hi,
> 
> Hopefully there will also be an update to one of
> Documentation/admin-guide/kernel-parameters.txt or
> Documentation/admin-guide/serial-console.rst.

Well, considering I'm not taking this patch unless it comes with such an
update, I'm hoping as well :)

greg k-h

Re: [PATCH] earlycon: Allow specifying a uartclk in options

[Andy Shevchenko]

On Thu, Mar 1, 2018 at 8:20 PM, Daniel Kurtz <djkurtz@chromium.org> wrote:
> Currently when an earlycon is registered, the uartclk is assumed to be
> BASE_BAUD * 16 = 1843200.  If a baud rate is specified in the earlycon
> options, then 8250_early's init_port will program the UART clock divider
> registers based on this assumed uartclk.
>
> However, not all uarts have a UART clock of 1843200.  For example, the
> 8250_dw uart in AMD's CZ/ST uses a fixed 48 MHz clock (as specified in
> cz_uart_desc in acpi_apd.c).  Thus, specifying a baud when using earlycon
> on such a device will result in incorrect divider values and a wrong UART
> clock.
>
> Fix this by extending the earlycon options parameter to allow specification
> of a uartclk, like so:
>
>  earlycon=uart,mmio32,0xfedc6000,115200,48000000
>
> If none is specified, fall-back to prior behavior - 1843200.

It needs to be discussed.

First of all, if you are going to do this you need to add a parse of
human readable formats (IIRC kernel has helpers), i.e. "48M", "38.4M"
and so on.

Next, I was under impression that purpose of earlycon (in difference
to earlyprintk) is to re-use existing drivers as fully as possible.

So, what exactly happens in your case? Are your driver lacks of
properly set clock? Or earlycon does simple not utilizing this
information?

-- 
With Best Regards,
Andy Shevchenko