Linux Serial subsystem development
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From: Michael Walle <michael@walle.cc>
To: linux-serial@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Jiri Slaby <jirislaby@kernel.org>,
	Angelo Dureghello <angelo.dureghello@timesys.com>,
	Fugang Duan <fugang.duan@nxp.com>,
	Philippe Schenker <philippe.schenker@toradex.com>,
	Michael Walle <michael@walle.cc>
Subject: [PATCH 7/8] serial: fsl_lpuart: add loopback support
Date: Tue, 11 May 2021 22:01:47 +0200	[thread overview]
Message-ID: <20210511200148.11934-8-michael@walle.cc> (raw)
In-Reply-To: <20210511200148.11934-1-michael@walle.cc>

The LPUART can loop the RX and TX signal. Add support for it.

Please note, this was only tested on the 32 bit version of the LPUART.

Signed-off-by: Michael Walle <michael@walle.cc>
---
 drivers/tty/serial/fsl_lpuart.c | 36 +++++++++++++++++++++++++++++++--
 1 file changed, 34 insertions(+), 2 deletions(-)

diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c
index 19714047d571..5e66f628e895 100644
--- a/drivers/tty/serial/fsl_lpuart.c
+++ b/drivers/tty/serial/fsl_lpuart.c
@@ -1403,22 +1403,54 @@ static int lpuart32_config_rs485(struct uart_port *port,
 
 static unsigned int lpuart_get_mctrl(struct uart_port *port)
 {
-	return 0;
+	unsigned int mctrl = 0;
+	u8 reg;
+
+	reg = readb(port->membase + UARTCR1);
+	if (reg & UARTCR1_LOOPS)
+		mctrl |= TIOCM_LOOP;
+
+	return mctrl;
 }
 
 static unsigned int lpuart32_get_mctrl(struct uart_port *port)
 {
-	return 0;
+	unsigned int mctrl = 0;
+	u32 reg;
+
+	reg = lpuart32_read(port, UARTCTRL);
+	if (reg & UARTCTRL_LOOPS)
+		mctrl |= TIOCM_LOOP;
+
+	return mctrl;
 }
 
 static void lpuart_set_mctrl(struct uart_port *port, unsigned int mctrl)
 {
+	u8 reg;
+
+	reg = readb(port->membase + UARTCR1);
+
+	/* for internal loopback we need LOOPS=1 and RSRC=0 */
+	reg &= ~(UARTCR1_LOOPS | UARTCR1_RSRC);
+	if (mctrl & TIOCM_LOOP)
+		reg |= UARTCR1_LOOPS;
 
+	writeb(reg, port->membase + UARTCR1);
 }
 
 static void lpuart32_set_mctrl(struct uart_port *port, unsigned int mctrl)
 {
+	u32 reg;
+
+	reg = lpuart32_read(port, UARTCTRL);
+
+	/* for internal loopback we need LOOPS=1 and RSRC=0 */
+	reg &= ~(UARTCTRL_LOOPS | UARTCTRL_RSRC);
+	if (mctrl & TIOCM_LOOP)
+		reg |= UARTCTRL_LOOPS;
 
+	lpuart32_write(port, reg, UARTCTRL);
 }
 
 static void lpuart_break_ctl(struct uart_port *port, int break_state)
-- 
2.20.1


  parent reply	other threads:[~2021-05-11 20:02 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-11 20:01 [PATCH 0/8] serial: fsl_lpuart: sysrq, loopback support and fixes Michael Walle
2021-05-11 20:01 ` [PATCH 1/8] serial: fsl_lpuart: don't modify arbitrary data on lpuart32 Michael Walle
2021-05-11 20:01 ` [PATCH 2/8] serial: fsl_lpuart: use UARTDATA_MASK macro Michael Walle
2021-05-11 20:01 ` [PATCH 3/8] serial: fsl_lpuart: don't restore interrupt state in ISR Michael Walle
2021-05-12  9:25   ` Johan Hovold
2021-05-12  9:42     ` Michael Walle
2021-05-11 20:01 ` [PATCH 4/8] serial: fsl_lpuart: handle break and make sysrq work Michael Walle
2021-05-12  9:30   ` Johan Hovold
2021-05-12  9:46     ` Michael Walle
2021-05-12 10:07       ` Johan Hovold
2021-05-12 10:31         ` Michael Walle
2021-05-12 11:18           ` Johan Hovold
2021-05-11 20:01 ` [PATCH 5/8] serial: fsl_lpuart: remove RTSCTS handling from get_mctrl() Michael Walle
2021-05-11 20:01 ` [PATCH 6/8] serial: fsl_lpuart: remove manual RTSCTS control from 8-bit LPUART Michael Walle
2021-05-11 20:01 ` Michael Walle [this message]
2021-05-11 20:01 ` [PATCH 8/8] serial: fsl_lpuart: disable DMA for console and fix sysrq Michael Walle

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