Linux Serial subsystem development
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From: Bin Meng <bmeng@tinylab.org>
To: linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
	linux-serial@vger.kernel.org
Cc: Albert Ou <aou@eecs.berkeley.edu>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Jiri Slaby <jirislaby@kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>
Subject: [PATCH v3 2/3] riscv: Implement semihost.h for earlycon semihost driver
Date: Fri,  9 Dec 2022 23:04:36 +0800	[thread overview]
Message-ID: <20221209150437.795918-3-bmeng@tinylab.org> (raw)
In-Reply-To: <20221209150437.795918-1-bmeng@tinylab.org>

Per RISC-V semihosting spec [1], implement semihost.h for the existing
Arm semihosting earlycon driver to work on RISC-V.

Link: https://github.com/riscv/riscv-semihosting-spec/blob/main/riscv-semihosting-spec.adoc [1]

Signed-off-by: Bin Meng <bmeng@tinylab.org>

---

Changes in v3:
- add #ifdef in the header to prevent from multiple inclusion
- add forward-declare struct uart_port
- add a Link tag in the commit message

Changes in v2:
- Move the RISC-V implementation to semihost.h

 arch/riscv/include/asm/semihost.h | 26 ++++++++++++++++++++++++++
 drivers/tty/serial/Kconfig        |  2 +-
 2 files changed, 27 insertions(+), 1 deletion(-)
 create mode 100644 arch/riscv/include/asm/semihost.h

diff --git a/arch/riscv/include/asm/semihost.h b/arch/riscv/include/asm/semihost.h
new file mode 100644
index 000000000000..557a34938193
--- /dev/null
+++ b/arch/riscv/include/asm/semihost.h
@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2022 tinylab.org
+ * Author: Bin Meng <bmeng@tinylab.org>
+ */
+
+#ifndef _RISCV_SEMIHOST_H_
+#define _RISCV_SEMIHOST_H_
+
+struct uart_port;
+
+static inline void smh_putc(struct uart_port *port, unsigned char c)
+{
+	asm volatile("addi    a1, %0, 0\n"
+		     "addi    a0, zero, 3\n"
+		     ".balign 16\n"
+		     ".option push\n"
+		     ".option norvc\n"
+		     "slli    zero, zero, 0x1f\n"
+		     "ebreak\n"
+		     "srai    zero, zero, 0x7\n"
+		     ".option pop\n"
+		     : : "r" (&c) : "a0", "a1", "memory");
+}
+
+#endif /* _RISCV_SEMIHOST_H_ */
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index 434f83168546..e94d1265151c 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -75,7 +75,7 @@ config SERIAL_AMBA_PL011_CONSOLE
 
 config SERIAL_EARLYCON_ARM_SEMIHOST
 	bool "Early console using ARM semihosting"
-	depends on ARM64 || ARM
+	depends on ARM64 || ARM || RISCV
 	select SERIAL_CORE
 	select SERIAL_CORE_CONSOLE
 	select SERIAL_EARLYCON
-- 
2.34.1


  parent reply	other threads:[~2022-12-09 15:05 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-09 15:04 [PATCH v3 0/3] serial: Add RISC-V support to the earlycon semihost driver Bin Meng
2022-12-09 15:04 ` [PATCH v3 1/3] serial: earlycon-arm-semihost: Move smh_putc() variants in respective arch's semihost.h Bin Meng
2022-12-09 15:04 ` Bin Meng [this message]
2022-12-09 15:04 ` [PATCH v3 3/3] serial: Rename earlycon semihost driver Bin Meng
2022-12-21 15:51 ` [PATCH v3 0/3] serial: Add RISC-V support to the " Bin Meng
2022-12-21 16:09   ` gregkh
2022-12-22 20:06 ` Sergey Matyukevich
2022-12-23  9:11   ` Bin Meng
2022-12-29 16:22 ` Palmer Dabbelt

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