From: Crescent Hsieh <crescentcy.hsieh@moxa.com>
To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Jiri Slaby <jirislaby@kernel.org>,
Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org,
FangpingFP.Cheng@moxa.com, Epson.Chiang@moxa.com,
Crescent Hsieh <crescentcy.hsieh@moxa.com>
Subject: [PATCH v2 15/15] serial: 8250_mxpcie: implement rx_trig_bytes callbacks via MUEx50 RTL
Date: Wed, 1 Jul 2026 11:41:28 +0800 [thread overview]
Message-ID: <20260701034128.218569-16-crescentcy.hsieh@moxa.com> (raw)
In-Reply-To: <20260701034128.218569-1-crescentcy.hsieh@moxa.com>
The MUEx50 UART exposes a programmable RX trigger level via the RTL
register.
Implement uart_port RX trigger set/get callbacks for the mxpcie driver
and wire them up to the generic rx_trig_bytes sysfs interface. Store the
configured trigger level in the per-port private data.
Signed-off-by: Crescent Hsieh <crescentcy.hsieh@moxa.com>
---
drivers/tty/serial/8250/8250_mxpcie.c | 26 +++++++++++++++++++++++++-
1 file changed, 25 insertions(+), 1 deletion(-)
diff --git a/drivers/tty/serial/8250/8250_mxpcie.c b/drivers/tty/serial/8250/8250_mxpcie.c
index da81ea7970f0..78a7d1994f63 100644
--- a/drivers/tty/serial/8250/8250_mxpcie.c
+++ b/drivers/tty/serial/8250/8250_mxpcie.c
@@ -50,6 +50,7 @@
#define MOXA_PUART_BASE_BAUD 921600
#define MOXA_PUART_OFFSET 0x200
#define MOXA_PUART_FIFO_SIZE 128
+#define MOXA_PUART_RX_TRIGGER_DEFAULT 96
/* Special Function Register (SFR) */
#define MOXA_PUART_SFR 0x07
@@ -113,6 +114,7 @@ struct mxpcie8250_port {
struct work_struct work;
unsigned long event_flags;
int line;
+ u8 rx_trig_level;
};
struct mxpcie8250 {
@@ -259,8 +261,27 @@ static void mxpcie8250_set_termios(struct uart_port *port,
serial_out(up, MOXA_PUART_EFR, efr);
}
+static int mxpcie8250_get_rxtrig(struct uart_port *port)
+{
+ return serial_port_in(port, MOXA_PUART_RTL);
+}
+
+static int mxpcie8250_set_rxtrig(struct uart_port *port, unsigned char bytes)
+{
+ struct mxpcie8250 *priv = dev_get_drvdata(port->dev);
+
+ if (bytes > MOXA_PUART_FIFO_SIZE)
+ return -EINVAL;
+
+ serial_port_out(port, MOXA_PUART_RTL, bytes);
+ priv->port[port->port_id].rx_trig_level = bytes;
+
+ return 0;
+}
+
static int mxpcie8250_startup(struct uart_port *port)
{
+ struct mxpcie8250 *priv = dev_get_drvdata(port->dev);
struct uart_8250_port *up = up_to_u8250p(port);
int ret;
@@ -285,7 +306,7 @@ static int mxpcie8250_startup(struct uart_port *port)
serial_out(up, MOXA_PUART_SFR, MOXA_PUART_SFR_950);
serial_out(up, MOXA_PUART_TTL, 0);
- serial_out(up, MOXA_PUART_RTL, 96);
+ serial_out(up, MOXA_PUART_RTL, priv->port[port->port_id].rx_trig_level);
serial_out(up, MOXA_PUART_FCL, 16);
serial_out(up, MOXA_PUART_FCH, 110);
@@ -583,6 +604,8 @@ static int mxpcie8250_probe(struct pci_dev *pdev, const struct pci_device_id *id
up.port.regshift = 0;
up.port.set_termios = mxpcie8250_set_termios;
+ up.port.get_rxtrig = mxpcie8250_get_rxtrig;
+ up.port.set_rxtrig = mxpcie8250_set_rxtrig;
up.port.startup = mxpcie8250_startup;
up.port.shutdown = mxpcie8250_shutdown;
up.port.throttle = mxpcie8250_throttle;
@@ -606,6 +629,7 @@ static int mxpcie8250_probe(struct pci_dev *pdev, const struct pci_device_id *id
}
new_port = serial8250_get_port(priv->port[i].line);
+ priv->port[i].rx_trig_level = MOXA_PUART_RX_TRIGGER_DEFAULT;
priv->port[i].port = &new_port->port;
INIT_WORK(&priv->port[i].work, mxpcie8250_work_handler);
--
2.45.2
prev parent reply other threads:[~2026-07-01 3:44 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-01 3:41 [PATCH v2 00/15] serial: 8250: add Moxa MUEx50 PCIe board support Crescent Hsieh
2026-07-01 3:41 ` [PATCH v2 01/15] serial: 8250: split Moxa PCIe serial board support out of 8250_pci Crescent Hsieh
2026-07-01 12:42 ` Andy Shevchenko
2026-07-01 3:41 ` [PATCH v2 02/15] serial: 8250: add Moxa MUEx50 UART port type Crescent Hsieh
2026-07-01 3:41 ` [PATCH v2 03/15] serial: 8250_mxpcie: enable enhanced mode and program FIFO trigger levels Crescent Hsieh
2026-07-01 3:41 ` [PATCH v2 04/15] serial: 8250_mxpcie: enable automatic RTS/CTS flow control Crescent Hsieh
2026-07-01 3:41 ` [PATCH v2 05/15] serial: 8250_mxpcie: offload XON/XOFF flow control to MUEx50 hardware Crescent Hsieh
2026-07-01 3:41 ` [PATCH v2 06/15] serial: 8250_mxpcie: add custom handle_irq callback Crescent Hsieh
2026-07-01 12:41 ` Andy Shevchenko
2026-07-01 3:41 ` [PATCH v2 07/15] serial: 8250_mxpcie: speed up RX using memory-mapped FIFO window Crescent Hsieh
2026-07-01 3:41 ` [PATCH v2 08/15] serial: 8250_mxpcie: speed up TX " Crescent Hsieh
2026-07-01 12:36 ` Andy Shevchenko
2026-07-01 3:41 ` [PATCH v2 09/15] serial: 8250_mxpcie: introduce per-port private data structure Crescent Hsieh
2026-07-01 3:41 ` [PATCH v2 10/15] serial: 8250_mxpcie: defer uart_write_wakeup() to workqueue Crescent Hsieh
2026-07-01 3:41 ` [PATCH v2 11/15] serial: 8250_mxpcie: support serial interface mode switching Crescent Hsieh
2026-07-01 3:41 ` [PATCH v2 12/15] serial: 8250: allow low-level drivers to override break control Crescent Hsieh
2026-07-01 3:41 ` [PATCH v2 13/15] serial: 8250_mxpcie: add break support for RS485 using MUEx50 features Crescent Hsieh
2026-07-01 3:41 ` [PATCH v2 14/15] serial: 8250: allow UART drivers to override rx_trig_bytes handling Crescent Hsieh
2026-07-01 3:41 ` Crescent Hsieh [this message]
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