From: Crescent Hsieh <crescentcy.hsieh@moxa.com>
To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Jiri Slaby <jirislaby@kernel.org>,
Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org,
FangpingFP.Cheng@moxa.com, Epson.Chiang@moxa.com,
Crescent Hsieh <crescentcy.hsieh@moxa.com>
Subject: [PATCH v2 07/15] serial: 8250_mxpcie: speed up RX using memory-mapped FIFO window
Date: Wed, 1 Jul 2026 11:41:20 +0800 [thread overview]
Message-ID: <20260701034128.218569-8-crescentcy.hsieh@moxa.com> (raw)
In-Reply-To: <20260701034128.218569-1-crescentcy.hsieh@moxa.com>
The MUEx50 UART provides a memory-mapped RX FIFO data window along with
an RX FIFO byte counter.
When no break or error conditions are present, read received data in
bulk via the MMIO FIFO window and push it to the tty layer in one
operation. Fall back to the generic 8250 RX path for break and error
handling.
Signed-off-by: Crescent Hsieh <crescentcy.hsieh@moxa.com>
---
drivers/tty/serial/8250/8250_mxpcie.c | 32 +++++++++++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/drivers/tty/serial/8250/8250_mxpcie.c b/drivers/tty/serial/8250/8250_mxpcie.c
index 966c8f8cf38e..4aaf56902949 100644
--- a/drivers/tty/serial/8250/8250_mxpcie.c
+++ b/drivers/tty/serial/8250/8250_mxpcie.c
@@ -13,6 +13,7 @@
#include <linux/ioport.h>
#include <linux/module.h>
#include <linux/pci.h>
+#include <linux/tty_flip.h>
#include <linux/types.h>
#include <linux/8250_pci.h>
@@ -47,6 +48,7 @@
/* UART */
#define MOXA_PUART_BASE_BAUD 921600
#define MOXA_PUART_OFFSET 0x200
+#define MOXA_PUART_FIFO_SIZE 128
/* Special Function Register (SFR) */
#define MOXA_PUART_SFR 0x07
@@ -82,6 +84,9 @@
#define MOXA_PUART_RTL 0x11 /* Rx Interrupt Trigger Level */
#define MOXA_PUART_FCL 0x12 /* Flow Control Low Trigger Level */
#define MOXA_PUART_FCH 0x13 /* Flow Control High Trigger Level */
+#define MOXA_PUART_RX_FIFO_CNT 0x15 /* Rx FIFO Data Counter */
+
+#define MOXA_PUART_RX_FIFO_MEM 0x100 /* Memory Space to Rx FIFO Data Register */
#define MOXA_GPIO_DIRECTION 0x09
#define MOXA_GPIO_OUTPUT 0x0A
@@ -266,6 +271,29 @@ static void mxpcie8250_unthrottle(struct uart_port *port)
serial_out(up, UART_IER, up->ier);
}
+static void mxpcie8250_do_rx_chars(struct uart_8250_port *up)
+{
+ struct uart_port *port = &up->port;
+ struct tty_port *tport = &port->state->port;
+ u8 buf[MOXA_PUART_FIFO_SIZE];
+ int recv_room, gdl, i;
+
+ recv_room = tty_buffer_request_room(tport, port->fifosize);
+ if (!recv_room)
+ return;
+
+ gdl = serial_in(up, MOXA_PUART_RX_FIFO_CNT);
+ if (gdl > recv_room)
+ gdl = recv_room;
+
+ for (i = 0; i < gdl; ++i)
+ buf[i] = serial_in(up, MOXA_PUART_RX_FIFO_MEM + i);
+
+ port->icount.rx += gdl;
+ tty_insert_flip_string(tport, buf, gdl);
+ tty_flip_buffer_push(tport);
+}
+
static u16 mxpcie8250_rx_chars(struct uart_8250_port *up, u16 lsr)
{
struct uart_port *port = &up->port;
@@ -283,6 +311,10 @@ static u16 mxpcie8250_rx_chars(struct uart_8250_port *up, u16 lsr)
return lsr;
do_rx:
+ if (!(lsr & UART_LSR_BRK_ERROR_BITS)) {
+ mxpcie8250_do_rx_chars(up);
+ return lsr;
+ }
return serial8250_rx_chars(up, lsr);
}
--
2.45.2
next prev parent reply other threads:[~2026-07-01 3:44 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-01 3:41 [PATCH v2 00/15] serial: 8250: add Moxa MUEx50 PCIe board support Crescent Hsieh
2026-07-01 3:41 ` [PATCH v2 01/15] serial: 8250: split Moxa PCIe serial board support out of 8250_pci Crescent Hsieh
2026-07-01 12:42 ` Andy Shevchenko
2026-07-01 3:41 ` [PATCH v2 02/15] serial: 8250: add Moxa MUEx50 UART port type Crescent Hsieh
2026-07-01 3:41 ` [PATCH v2 03/15] serial: 8250_mxpcie: enable enhanced mode and program FIFO trigger levels Crescent Hsieh
2026-07-01 3:41 ` [PATCH v2 04/15] serial: 8250_mxpcie: enable automatic RTS/CTS flow control Crescent Hsieh
2026-07-01 3:41 ` [PATCH v2 05/15] serial: 8250_mxpcie: offload XON/XOFF flow control to MUEx50 hardware Crescent Hsieh
2026-07-01 3:41 ` [PATCH v2 06/15] serial: 8250_mxpcie: add custom handle_irq callback Crescent Hsieh
2026-07-01 12:41 ` Andy Shevchenko
2026-07-01 3:41 ` Crescent Hsieh [this message]
2026-07-01 3:41 ` [PATCH v2 08/15] serial: 8250_mxpcie: speed up TX using memory-mapped FIFO window Crescent Hsieh
2026-07-01 12:36 ` Andy Shevchenko
2026-07-01 3:41 ` [PATCH v2 09/15] serial: 8250_mxpcie: introduce per-port private data structure Crescent Hsieh
2026-07-01 3:41 ` [PATCH v2 10/15] serial: 8250_mxpcie: defer uart_write_wakeup() to workqueue Crescent Hsieh
2026-07-01 3:41 ` [PATCH v2 11/15] serial: 8250_mxpcie: support serial interface mode switching Crescent Hsieh
2026-07-01 3:41 ` [PATCH v2 12/15] serial: 8250: allow low-level drivers to override break control Crescent Hsieh
2026-07-01 3:41 ` [PATCH v2 13/15] serial: 8250_mxpcie: add break support for RS485 using MUEx50 features Crescent Hsieh
2026-07-01 3:41 ` [PATCH v2 14/15] serial: 8250: allow UART drivers to override rx_trig_bytes handling Crescent Hsieh
2026-07-01 3:41 ` [PATCH v2 15/15] serial: 8250_mxpcie: implement rx_trig_bytes callbacks via MUEx50 RTL Crescent Hsieh
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