[PATCH v2 0/2] WK2xxx SPI to UART bridge driver

[zjzhao@edatec.cn]

From: zjzhao <zjzhao@edatec.cn>

Hi,

This series adds a driver for the WK2xxx SPI-to-UART bridge ICs
(WK2124, WK2132, WK2168, WK2202 and WK2204) by WKmic (Chengdu Weikai
Microelectronics), together with a DT binding and the "wkmic" vendor
prefix.

There is no existing driver that could have been only extended instead:
unlike the NXP SC16IS7xx and Maxim MAX310x parts (which implement the
16550-style register set over regmap/SPI/I2C), the WK2xxx uses a
proprietary register map and SPI protocol - the sub-UART number and a
page-select bit are encoded in the SPI command byte and dedicated FIFO
burst commands are used - and it has no modem-control registers and
supports 8 data bits only. Just as sc16is7xx and max310x live in
separate drivers although the former is derived from the latter, a
dedicated driver is the appropriate model here.

Each channel is described by a serial@N child node of the SPI device
(see the binding); serial and RS-485 properties of a child are applied
to that channel only, following the max310x pattern.

Changes in v2:
- Binding: model each UART channel as a serial@N subnode, add a default
  for clock-frequency and a trailing newline (Sashiko review, round 1).
- Driver - Sashiko review (round 2) and Jiri Slaby's review:
  * request the IRQ before registering the ports and free it again
    before tearing the ports down (no devm), fixing both a
    late-interrupt use-after-free and an open-before-request race;
  * keep the shared polling loop running while any port is open and
    stop it only when the last port is closed;
  * propagate SPI read errors instead of relying on uninitialized data;
  * use DMA-safe shared transfer buffers (no stack buffers);
  * no self-deadlock of the kthread worker in polling mode;
  * no 64-bit division, so the driver builds on 32-bit;
  * return IRQ_NONE/IRQ_HANDLED correctly for shared IRQs and bound
    the drain loop;
  * honour CREAD by dropping received data while the receiver is off;
  * disable the RX time-out interrupt in throttle() so that flow
    control actually holds;
  * advertise no RS485 RTS delays (RTS timing is hardware-driven; the
    serial core sanitizes non-zero requests to zero);
  * drop the no-op request_port/release_port ops and use UPIO_BUS
    instead of the membase workaround;
  * use the kernel cleanup guards and drop the hand-rolled
    lock/unlock/goto patterns.
- The TX path intentionally does not use the uart_port_tx() helpers:
  pushing bytes requires sleeping SPI transfers, which cannot run while
  holding the port spinlock, so TX is driven from the kthread worker
  under a dedicated mutex, as in sc16is7xx/max310x.
- Known hardware limitation: the FIFO-status error flags are FIFO-wide
  and sticky, so a batch read must apply the same line status to all
  bytes of the batch.

Tested on Raspberry Pi 5 boards (EDATEC IPC1200 with WK2132 on SPI0 and
SBC2300 with WK2204 on SPI1); loopback TX/RX tests pass.

zjzhao (2):
  serial: wk2xxx: Add WK2xxx SPI UART driver
  dt-bindings: serial: Document WK2xxx SPI UART bindings

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2.43.0