From: Jiri Slaby <jirislaby@kernel.org>
To: adriana@arista.com, linux-serial@vger.kernel.org,
linux-kernel@vger.kernel.rg
Cc: ilpo.jarvinnen@linux.intel.com,
andriy.shevchenko@linux.intel.com, gregkh@linuxfoundation.org,
john.ogness@linutronix.de
Subject: Re: [PATCH v2] serial: 8250 dw: clear FIFO before writting LCR
Date: Wed, 20 Aug 2025 06:01:52 +0200 [thread overview]
Message-ID: <9a3e087c-3a1e-474a-b0ed-c69b5f174c43@kernel.org> (raw)
In-Reply-To: <20250819191314.3452283-1-adriana@arista.com>
On 19. 08. 25, 21:13, adriana@arista.com wrote:
> This patch is proposing a custom configuration for Synopsys DesignWare
> serial to be used by products with associated compatible string in the
> device tree.
>
> The PORT_DWAPB config will be used instead of the default PORT_16550A
> which does not include the UART_FCR_CLEAR_RCVR and UART_FCR_CLEAR_XMIT
> bits for the FIFO configuration register. Having those flags is necessary
> to clear FIFO when the serial port is reconfigured with do_set_termios.
How was this tested? I assume it does not even compile.
--
js
suse labs
next prev parent reply other threads:[~2025-08-20 4:01 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-19 19:13 [PATCH v2] serial: 8250 dw: clear FIFO before writting LCR adriana
2025-08-20 4:01 ` Jiri Slaby [this message]
2025-08-20 4:06 ` Jiri Slaby
2025-08-20 5:59 ` Greg KH
2025-08-20 6:33 ` kernel test robot
-- strict thread matches above, loose matches on Subject: below --
2025-08-19 19:06 adriana
2025-08-20 6:00 ` Greg KH
2025-08-20 6:10 ` Greg KH
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