* Re: [PATCHv3 3/9] serial: vt8500: Add devicetree support for vt8500-serial
From: Alan Cox @ 2012-08-21 22:12 UTC (permalink / raw)
To: Tony Prisk
Cc: Alessandro Zummo, linux-fbdev, Russell King, Linus Walleij,
Arnd Bergmann, Florian Tobias Schandinat, Greg Kroah-Hartman,
devicetree-discuss, linux-usb, vt8500-wm8505-linux-kernel,
linux-kernel, Rob Herring, Grant Likely, Rob Landley,
linux-serial, rtc-linux, Stephen Warren, Mike Turquette,
linux-arm-kernel, Alan Cox
In-Reply-To: <1345582058-2291-4-git-send-email-linux@prisktech.co.nz>
On Wed, 22 Aug 2012 08:47:32 +1200
Tony Prisk <linux@prisktech.co.nz> wrote:
> Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
> ---
> drivers/tty/serial/vt8500_serial.c | 37 ++++++++++++++++++++++++++++++++----
> 1 file changed, 33 insertions(+), 4 deletions(-)
Can we have a comment attached to a change this size. In particular one
describing why it gone from 4 to 6 ports, and why the port id twiddling.
Is there a reason you can't use the device tree port id ?
What are the regression risks for existing users expecting the pdev->id
binding ?
^ permalink raw reply
* Re: [PATCH v2] serial: pl011: honour serial aliases in device tree
From: Linus Walleij @ 2012-08-21 22:04 UTC (permalink / raw)
To: Matthew Leach
Cc: linux-arm-kernel, linux-serial, will.deacon, gregkh,
devicetree-discuss, robherring2
In-Reply-To: <1345564094-16565-1-git-send-email-matthew.leach@arm.com>
On Tue, Aug 21, 2012 at 5:48 PM, Matthew Leach <matthew.leach@arm.com> wrote:
> If the order of UART nodes is changed in the device tree, then tty dev
> devices are attached to different serial ports causing the console to
> be directed to a different physical serial port. The "serial" aliases
> in the device tree should prevent this.
>
> This patch ensures that the UART driver creates tty devices that
> honour these aliases if a device tree is present.
>
> Acked-by: Rob Herring <rob.herring@calxeda.com>
> Signed-off-by: Matthew Leach <matthew.leach@arm.com>
> ---
> v2: use IS_ENABLED instead of ifdefs
Looks good to me.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Yours,
Linus Walleij
^ permalink raw reply
* pm_qos usage in omap-serial.c
From: Pavan Savoy @ 2012-08-21 20:50 UTC (permalink / raw)
To: linux-serial, ruchika, paul, Govindraj Raja
Paul, Govindraj,
I saw a few comments from you on the omap-serial driver that the PM
qos was required because of a silicion bug which failed to wake-up via
the PRCM interrupts when the tx fifo threshold reached.
What I wasnted to ask was - does that still hold good? Which OMAP was
this seen on ? omap3 or omap4?
As of today as you mention in your patch comments we do see an impact
on the power numbers because of this constraints held in the serial
driver, and removing this doesn't seem to impact performance
(through-put) either.
(All this being done in interrupt mode..)
Also, could you let me know - How exactly was the PRCM interrupts not
being generated tested ?
Thanks & Regards,
Pavan Savoy.
^ permalink raw reply
* [PATCHv3 9/9] arm: vt8500: clk: Add Common Clock Framework support
From: Tony Prisk @ 2012-08-21 20:47 UTC (permalink / raw)
To: vt8500-wm8505-linux-kernel-/JYPxA39Uh6Zox4op4iWzw
Cc: Tony Prisk, Russell King, Alessandro Zummo, Alan Cox,
Greg Kroah-Hartman, Florian Tobias Schandinat, Arnd Bergmann,
Grant Likely, Rob Herring, Rob Landley, Linus Walleij,
Mike Turquette, Stephen Warren,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-fbdev-u79uwXL29TY76Z2rM5mHXA,
linux-usb-u79uwXL29TY76Z2rM5mHXA,
linux-serial-u79uwXL29TY76Z2rM5mHXA,
rtc-linux-/JYPxA39Uh5TLH3MbocFFw,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ
In-Reply-To: <1345582058-2291-1-git-send-email-linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org>
This patch adds common clock framework support for arch-vt8500.
Support for PLL and device clocks on VT8500, WM8505 and WM8650
are included.
Signed-off-by: Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org>
---
drivers/clk/Makefile | 1 +
drivers/clk/clk-vt8500.c | 496 ++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 497 insertions(+)
create mode 100644 drivers/clk/clk-vt8500.c
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index 5869ea3..42fb173 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_ARCH_SOCFPGA) += socfpga/
obj-$(CONFIG_PLAT_SPEAR) += spear/
obj-$(CONFIG_ARCH_U300) += clk-u300.o
obj-$(CONFIG_ARCH_INTEGRATOR) += versatile/
+obj-$(CONFIG_ARCH_VT8500) += clk-vt8500.o
# Chip specific
obj-$(CONFIG_COMMON_CLK_WM831X) += clk-wm831x.o
diff --git a/drivers/clk/clk-vt8500.c b/drivers/clk/clk-vt8500.c
new file mode 100644
index 0000000..524c479
--- /dev/null
+++ b/drivers/clk/clk-vt8500.c
@@ -0,0 +1,496 @@
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/slab.h>
+#include <linux/bitops.h>
+#include <linux/clkdev.h>
+#include <linux/clk-provider.h>
+
+/* All clocks share the same lock as none can be changed concurrently */
+static DEFINE_SPINLOCK(_lock);
+
+struct clk_device {
+ struct clk_hw hw;
+ void __iomem *div_reg;
+ unsigned int div_mask;
+ void __iomem *en_reg;
+ int en_bit;
+ spinlock_t *lock;
+};
+
+/*
+ * Add new PLL_TYPE_x definitions here as required. Use the first known model
+ * to support the new type as the name.
+ * Add case statements to vtwm_pll_recalc_rate(), vtwm_pll_round_round() and
+ * vtwm_pll_set_rate() to handle the new PLL_TYPE_x
+ */
+
+#define PLL_TYPE_VT8500 0
+#define PLL_TYPE_WM8650 1
+
+struct clk_pll {
+ struct clk_hw hw;
+ void __iomem *reg;
+ spinlock_t *lock;
+ int type;
+};
+
+static void __iomem *pmc_base;
+
+#define to_clk_device(_hw) container_of(_hw, struct clk_device, hw)
+
+
+#define VT8500_PMC_BUSY_MASK 0x18
+
+static void vt8500_pmc_wait_busy(void)
+{
+ while (readl(pmc_base) & VT8500_PMC_BUSY_MASK)
+ cpu_relax();
+}
+
+static void vt8500_dclk_endisable(struct clk_hw *hw, int enable)
+{
+ struct clk_device *cdev = to_clk_device(hw);
+ u32 en_val;
+ unsigned long flags = 0;
+
+ spin_lock_irqsave(cdev->lock, flags);
+
+ en_val = readl(cdev->en_reg);
+
+ if (enable)
+ en_val |= BIT(cdev->en_bit);
+ else
+ en_val &= ~BIT(cdev->en_bit);
+
+ writel(en_val, cdev->en_reg);
+
+ spin_unlock_irqrestore(cdev->lock, flags);
+}
+
+static int vt8500_dclk_enable(struct clk_hw *hw)
+{
+ vt8500_dclk_endisable(hw, 1);
+ return 0;
+}
+
+static void vt8500_dclk_disable(struct clk_hw *hw)
+{
+ vt8500_dclk_endisable(hw, 0);
+}
+
+static int vt8500_dclk_is_enabled(struct clk_hw *hw)
+{
+ struct clk_device *cdev = to_clk_device(hw);
+ u32 en_val = (readl(cdev->en_reg) & BIT(cdev->en_bit));
+
+ return en_val ? 1 : 0;
+}
+
+static unsigned long vt8500_dclk_recalc_rate(struct clk_hw *hw,
+ unsigned long parent_rate)
+{
+ struct clk_device *cdev = to_clk_device(hw);
+ u32 div = readl(cdev->div_reg) & cdev->div_mask;
+
+ /* Special case for SDMMC devices */
+ if ((cdev->div_mask == 0x3F) && (div & BIT(5)))
+ div = 64 * (div & 0x1f);
+
+ /* div == 0 is actually the highest divisor */
+ if (div == 0)
+ div = (cdev->div_mask + 1);
+
+ return parent_rate / div;
+}
+
+static long vt8500_dclk_round_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long *prate)
+{
+ u32 divisor = rate / *prate;
+
+ return *prate / divisor;
+}
+
+static int vt8500_dclk_set_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long parent_rate)
+{
+ struct clk_device *cdev = to_clk_device(hw);
+ u32 divisor = rate / parent_rate;
+ unsigned long flags = 0;
+
+ if (divisor == cdev->div_mask + 1)
+ divisor = 0;
+
+ if (divisor > cdev->div_mask) {
+ pr_err("%s: invalid divisor for clock\n", __func__);
+ return -EINVAL;
+ }
+
+ spin_lock_irqsave(cdev->lock, flags);
+
+ vt8500_pmc_wait_busy();
+ writel(divisor, cdev->div_reg);
+ vt8500_pmc_wait_busy();
+
+ spin_lock_irqsave(cdev->lock, flags);
+
+ return 0;
+}
+
+
+static const struct clk_ops vt8500_gated_clk_ops = {
+ .enable = vt8500_dclk_enable,
+ .disable = vt8500_dclk_disable,
+ .is_enabled = vt8500_dclk_is_enabled,
+};
+
+static const struct clk_ops vt8500_divisor_clk_ops = {
+ .round_rate = vt8500_dclk_round_rate,
+ .set_rate = vt8500_dclk_set_rate,
+ .recalc_rate = vt8500_dclk_recalc_rate,
+};
+
+static const struct clk_ops vt8500_gated_divisor_clk_ops = {
+ .enable = vt8500_dclk_enable,
+ .disable = vt8500_dclk_disable,
+ .is_enabled = vt8500_dclk_is_enabled,
+ .round_rate = vt8500_dclk_round_rate,
+ .set_rate = vt8500_dclk_set_rate,
+ .recalc_rate = vt8500_dclk_recalc_rate,
+};
+
+#define CLK_INIT_GATED BIT(0)
+#define CLK_INIT_DIVISOR BIT(1)
+#define CLK_INIT_GATED_DIVISOR (CLK_INIT_DIVISOR | CLK_INIT_GATED)
+
+static __init void vtwm_device_clk_init(struct device_node *node)
+{
+ u32 en_reg, div_reg;
+ struct clk *clk;
+ struct clk_device *dev_clk;
+ const char *clk_name = node->name;
+ const char *parent_name;
+ struct clk_init_data init;
+ int rc;
+ int clk_init_flags = 0;
+
+ dev_clk = kzalloc(sizeof(*dev_clk), GFP_KERNEL);
+ if (WARN_ON(!dev_clk))
+ return;
+
+ dev_clk->lock = &_lock;
+
+ rc = of_property_read_u32(node, "enable-reg", &en_reg);
+ if (!rc) {
+ dev_clk->en_reg = pmc_base + en_reg;
+ rc = of_property_read_u32(node, "enable-bit", &dev_clk->en_bit);
+ if (rc) {
+ pr_err("%s: enable-bit property required for gated clock\n",
+ __func__);
+ return;
+ }
+ clk_init_flags |= CLK_INIT_GATED;
+ }
+
+ rc = of_property_read_u32(node, "divisor-reg", &div_reg);
+ if (!rc) {
+ dev_clk->div_reg = pmc_base + div_reg;
+ /*
+ * use 0x1f as the default mask since it covers
+ * almost all the clocks and reduces dts properties
+ */
+ dev_clk->div_mask = 0x1f;
+
+ of_property_read_u32(node, "divisor-mask", &dev_clk->div_mask);
+ clk_init_flags |= CLK_INIT_DIVISOR;
+ }
+
+ of_property_read_string(node, "clock-output-names", &clk_name);
+
+ switch (clk_init_flags) {
+ case CLK_INIT_GATED:
+ init.ops = &vt8500_gated_clk_ops;
+ break;
+ case CLK_INIT_DIVISOR:
+ init.ops = &vt8500_divisor_clk_ops;
+ break;
+ case CLK_INIT_GATED_DIVISOR:
+ init.ops = &vt8500_gated_divisor_clk_ops;
+ break;
+ default:
+ pr_err("%s: Invalid clock description in device tree\n",
+ __func__);
+ kfree(dev_clk);
+ return;
+ }
+
+ init.name = clk_name;
+ init.flags = 0;
+ parent_name = of_clk_get_parent_name(node, 0);
+ init.parent_names = &parent_name;
+ init.num_parents = 1;
+
+ dev_clk->hw.init = &init;
+
+ clk = clk_register(NULL, &dev_clk->hw);
+ if (WARN_ON(IS_ERR(clk))) {
+ kfree(dev_clk);
+ return;
+ }
+ rc = of_clk_add_provider(node, of_clk_src_simple_get, clk);
+ clk_register_clkdev(clk, clk_name, NULL);
+}
+
+
+/* PLL clock related functions */
+
+#define to_clk_pll(_hw) container_of(_hw, struct clk_pll, hw)
+
+/* Helper macros for PLL_VT8500 */
+#define VT8500_PLL_MUL(x) ((x & 0x1F) << 1)
+#define VT8500_PLL_DIV(x) ((x & 0x100) ? 1 : 2)
+
+#define VT8500_BITS_TO_FREQ(r, m, d) \
+ ((r / d) * m)
+
+#define VT8500_BITS_TO_VAL(m, d) \
+ ((d == 2 ? 0 : 0x100) | ((m >> 1) & 0x1F))
+
+/* Helper macros for PLL_WM8650 */
+#define WM8650_PLL_MUL(x) (x & 0x3FF)
+#define WM8650_PLL_DIV(x) (((x >> 10) & 7) * (1 << ((x >> 13) & 3)))
+
+#define WM8650_BITS_TO_FREQ(r, m, d1, d2) \
+ (r * m / (d1 * (1 << d2)))
+
+#define WM8650_BITS_TO_VAL(m, d1, d2) \
+ ((d2 << 13) | (d1 << 10) | (m & 0x3FF))
+
+
+static void vt8500_find_pll_bits(unsigned long rate, unsigned long parent_rate,
+ u32 *multiplier, u32 *prediv)
+{
+ unsigned long tclk;
+
+ /* sanity check */
+ if ((rate < parent_rate * 4) || (rate > parent_rate * 62)) {
+ pr_err("%s: requested rate out of range\n", __func__);
+ *multiplier = 0;
+ *prediv = 1;
+ return;
+ }
+ if (rate <= parent_rate * 31)
+ /* use the prediv to double the resolution */
+ *prediv = 2;
+ else
+ *prediv = 1;
+
+ *multiplier = rate / (parent_rate / *prediv);
+ tclk = (parent_rate / *prediv) * *multiplier;
+
+ if (tclk != rate)
+ pr_warn("%s: requested rate %lu, found rate %lu\n", __func__,
+ rate, tclk);
+}
+
+static void wm8650_find_pll_bits(unsigned long rate, unsigned long parent_rate,
+ u32 *multiplier, u32 *divisor1, u32 *divisor2)
+{
+ u32 mul, div1, div2;
+ u32 best_mul, best_div1, best_div2;
+ unsigned long tclk, rate_err, best_err;
+
+ best_err = (unsigned long)-1;
+
+ /* Find the closest match (lower or equal to requested) */
+ for (div1 = 5; div1 >= 3; div1--)
+ for (div2 = 3; div2 >= 0; div2--)
+ for (mul = 3; mul <= 1023; mul++) {
+ tclk = parent_rate * mul / (div1 * (1 << div2));
+ if (tclk > rate)
+ continue;
+ /* error will always be +ve */
+ rate_err = rate - tclk;
+ if (rate_err == 0) {
+ *multiplier = mul;
+ *divisor1 = div1;
+ *divisor2 = div2;
+ return;
+ }
+
+ if (rate_err < best_err) {
+ best_err = rate_err;
+ best_mul = mul;
+ best_div1 = div1;
+ best_div2 = div2;
+ }
+ }
+
+ /* if we got here, it wasn't an exact match */
+ pr_warn("%s: requested rate %lu, found rate %lu\n", __func__, rate,
+ rate - best_err);
+ *multiplier = mul;
+ *divisor1 = div1;
+ *divisor2 = div2;
+}
+
+static int vtwm_pll_set_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long parent_rate)
+{
+ struct clk_pll *pll = to_clk_pll(hw);
+ u32 mul, div1, div2;
+ u32 pll_val;
+ unsigned long flags = 0;
+
+ /* sanity check */
+
+ switch (pll->type) {
+ case PLL_TYPE_VT8500:
+ vt8500_find_pll_bits(rate, parent_rate, &mul, &div1);
+ pll_val = VT8500_BITS_TO_VAL(mul, div1);
+ break;
+ case PLL_TYPE_WM8650:
+ wm8650_find_pll_bits(rate, parent_rate, &mul, &div1, &div2);
+ pll_val = WM8650_BITS_TO_VAL(mul, div1, div2);
+ break;
+ default:
+ pr_err("%s: invalid pll type\n", __func__);
+ return 0;
+ }
+
+ spin_lock_irqsave(pll->lock, flags);
+
+ vt8500_pmc_wait_busy();
+ writel(pll_val, pll->reg);
+ vt8500_pmc_wait_busy();
+
+ spin_unlock_irqrestore(pll->lock, flags);
+
+ return 0;
+}
+
+static long vtwm_pll_round_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long *prate)
+{
+ struct clk_pll *pll = to_clk_pll(hw);
+ u32 mul, div1, div2;
+ long round_rate;
+
+ switch (pll->type) {
+ case PLL_TYPE_VT8500:
+ vt8500_find_pll_bits(rate, *prate, &mul, &div1);
+ round_rate = VT8500_BITS_TO_FREQ(*prate, mul, div1);
+ break;
+ case PLL_TYPE_WM8650:
+ wm8650_find_pll_bits(rate, *prate, &mul, &div1, &div2);
+ round_rate = WM8650_BITS_TO_FREQ(*prate, mul, div1, div2);
+ break;
+ default:
+ round_rate = 0;
+ }
+
+ return round_rate;
+}
+
+static unsigned long vtwm_pll_recalc_rate(struct clk_hw *hw,
+ unsigned long parent_rate)
+{
+ struct clk_pll *pll = to_clk_pll(hw);
+ u32 pll_val = readl(pll->reg);
+ unsigned long pll_freq;
+
+ switch (pll->type) {
+ case PLL_TYPE_VT8500:
+ pll_freq = parent_rate * VT8500_PLL_MUL(pll_val);
+ pll_freq /= VT8500_PLL_DIV(pll_val);
+ break;
+ case PLL_TYPE_WM8650:
+ pll_freq = parent_rate * WM8650_PLL_MUL(pll_val);
+ pll_freq /= WM8650_PLL_DIV(pll_val);
+ break;
+ default:
+ pll_freq = 0;
+ }
+
+ return pll_freq;
+}
+
+const struct clk_ops vtwm_pll_ops = {
+ .round_rate = vtwm_pll_round_rate,
+ .set_rate = vtwm_pll_set_rate,
+ .recalc_rate = vtwm_pll_recalc_rate,
+};
+
+static __init void vtwm_pll_clk_init(struct device_node *node, int pll_type)
+{
+ u32 reg;
+ struct clk *clk;
+ struct clk_pll *pll_clk;
+ const char *clk_name = node->name;
+ const char *parent_name;
+ struct clk_init_data init;
+ int rc;
+
+ rc = of_property_read_u32(node, "reg", ®);
+ if (WARN_ON(rc))
+ return;
+
+ pll_clk = kzalloc(sizeof(*pll_clk), GFP_KERNEL);
+ if (WARN_ON(!pll_clk))
+ return;
+
+ pll_clk->reg = pmc_base + reg;
+ pll_clk->lock = &_lock;
+ pll_clk->type = pll_type;
+
+ of_property_read_string(node, "clock-output-names", &clk_name);
+
+ init.name = clk_name;
+ init.ops = &vtwm_pll_ops;
+ init.flags = 0;
+ parent_name = of_clk_get_parent_name(node, 0);
+ init.parent_names = &parent_name;
+ init.num_parents = 1;
+
+ pll_clk->hw.init = &init;
+
+ clk = clk_register(NULL, &pll_clk->hw);
+ if (WARN_ON(IS_ERR(clk))) {
+ kfree(pll_clk);
+ return;
+ }
+ rc = of_clk_add_provider(node, of_clk_src_simple_get, clk);
+ clk_register_clkdev(clk, clk_name, NULL);
+}
+
+
+/* Wrappers for initialization functions */
+
+static void __init vt8500_pll_init(struct device_node *node)
+{
+ vtwm_pll_clk_init(node, PLL_TYPE_VT8500);
+}
+
+static void __init wm8650_pll_init(struct device_node *node)
+{
+ vtwm_pll_clk_init(node, PLL_TYPE_WM8650);
+}
+
+static const __initconst struct of_device_id clk_match[] = {
+ { .compatible = "fixed-clock", .data = of_fixed_clk_setup, },
+ { .compatible = "via,vt8500-pll-clock", .data = vt8500_pll_init, },
+ { .compatible = "wm,wm8650-pll-clock", .data = wm8650_pll_init, },
+ { .compatible = "via,vt8500-device-clock",
+ .data = vtwm_device_clk_init, },
+ { /* sentinel */ }
+};
+
+void __init vtwm_clk_init(void __iomem *base)
+{
+ if (!base)
+ return;
+
+ pmc_base = base;
+
+ of_clk_init(clk_match);
+}
--
1.7.9.5
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^ permalink raw reply related
* [PATCHv3 8/9] arm: vt8500: gpio: Devicetree support for arch-vt8500
From: Tony Prisk @ 2012-08-21 20:47 UTC (permalink / raw)
To: vt8500-wm8505-linux-kernel-/JYPxA39Uh6Zox4op4iWzw
Cc: Alessandro Zummo, linux-fbdev-u79uwXL29TY76Z2rM5mHXA,
Russell King, Linus Walleij, Florian Tobias Schandinat,
Greg Kroah-Hartman, devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
linux-usb-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, Rob Herring,
linux-serial-u79uwXL29TY76Z2rM5mHXA,
rtc-linux-/JYPxA39Uh5TLH3MbocFFw, Stephen Warren, Mike Turquette,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Alan Cox
In-Reply-To: <1345582058-2291-1-git-send-email-linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org>
Converted the existing arch-vt8500 gpio to a platform_device.
Added support for WM8505 and WM8650 GPIO controllers.
Signed-off-by: Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org>
---
drivers/gpio/Kconfig | 6 +
drivers/gpio/Makefile | 1 +
drivers/gpio/gpio-vt8500.c | 313 ++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 320 insertions(+)
create mode 100644 drivers/gpio/gpio-vt8500.c
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 542f0c0..3c8897a 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -183,6 +183,12 @@ config GPIO_STA2X11
Say yes here to support the STA2x11/ConneXt GPIO device.
The GPIO module has 128 GPIO pins with alternate functions.
+config GPIO_VT8500
+ bool "VIA/Wondermedia SoC GPIO Support"
+ depends on ARCH_VT8500
+ help
+ Say yes here to support the VT8500/WM8505/WM8650 GPIO controller.
+
config GPIO_XILINX
bool "Xilinx GPIO support"
depends on PPC_OF || MICROBLAZE
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 0f55662..2c014b9 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -66,6 +66,7 @@ obj-$(CONFIG_GPIO_TPS65912) += gpio-tps65912.o
obj-$(CONFIG_GPIO_TWL4030) += gpio-twl4030.o
obj-$(CONFIG_GPIO_UCB1400) += gpio-ucb1400.o
obj-$(CONFIG_GPIO_VR41XX) += gpio-vr41xx.o
+obj-$(CONFIG_GPIO_VT8500) += gpio-vt8500.o
obj-$(CONFIG_GPIO_VX855) += gpio-vx855.o
obj-$(CONFIG_GPIO_WM831X) += gpio-wm831x.o
obj-$(CONFIG_GPIO_WM8350) += gpio-wm8350.o
diff --git a/drivers/gpio/gpio-vt8500.c b/drivers/gpio/gpio-vt8500.c
new file mode 100644
index 0000000..19b12d9
--- /dev/null
+++ b/drivers/gpio/gpio-vt8500.c
@@ -0,0 +1,313 @@
+/* linux/arch/arm/mach-vt8500/gpio.c
+ *
+ * Copyright (C) 2012 Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org>
+ * Based on gpio.c:
+ * - Copyright (C) 2010 Alexey Charkov <alchark-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/gpio.h>
+#include <linux/platform_device.h>
+#include <linux/bitops.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/of_device.h>
+
+/*
+ We handle GPIOs by bank, each bank containing up to 32 GPIOs covered
+ by one set of registers (although not all may be valid).
+
+ Because different SoC's have different register offsets, we pass the
+ register offsets as data in vt8500_gpio_dt_ids[].
+
+ A value of NO_REG is used to indicate that this register is not
+ supported. Only used for ->en at the moment.
+*/
+
+#define NO_REG 0xFFFF
+
+/*
+ * struct vt8500_gpio_bank_regoffsets
+ * @en: offset to enable register of the bank
+ * @dir: offset to direction register of the bank
+ * @data_out: offset to the data out register of the bank
+ * @data_in: offset to the data in register of the bank
+ * @ngpio: highest valid pin in this bank
+ */
+
+struct vt8500_gpio_bank_regoffsets {
+ unsigned int en;
+ unsigned int dir;
+ unsigned int data_out;
+ unsigned int data_in;
+ unsigned char ngpio;
+};
+
+struct vt8500_gpio_data {
+ unsigned int num_banks;
+ struct vt8500_gpio_bank_regoffsets banks[];
+};
+
+#define VT8500_BANK(__en, __dir, __out, __in, __ngpio) \
+{ \
+ .en = __en, \
+ .dir = __dir, \
+ .data_out = __out, \
+ .data_in = __in, \
+ .ngpio = __ngpio, \
+}
+
+static struct vt8500_gpio_data vt8500_data = {
+ .num_banks = 7,
+ .banks = {
+ VT8500_BANK(0x00, 0x20, 0x40, 0x60, 26),
+ VT8500_BANK(0x04, 0x24, 0x44, 0x64, 28),
+ VT8500_BANK(0x08, 0x28, 0x48, 0x68, 31),
+ VT8500_BANK(0x0C, 0x2C, 0x4C, 0x6C, 19),
+ VT8500_BANK(0x10, 0x30, 0x50, 0x70, 19),
+ VT8500_BANK(0x14, 0x34, 0x54, 0x74, 23),
+ VT8500_BANK(NO_REG, 0x3C, 0x5C, 0x7C, 9),
+ },
+};
+
+static struct vt8500_gpio_data wm8505_data = {
+ .num_banks = 10,
+ .banks = {
+ VT8500_BANK(0x40, 0x68, 0x90, 0xB8, 8),
+ VT8500_BANK(0x44, 0x6C, 0x94, 0xBC, 32),
+ VT8500_BANK(0x48, 0x70, 0x98, 0xC0, 6),
+ VT8500_BANK(0x4C, 0x74, 0x9C, 0xC4, 16),
+ VT8500_BANK(0x50, 0x78, 0xA0, 0xC8, 25),
+ VT8500_BANK(0x54, 0x7C, 0xA4, 0xCC, 5),
+ VT8500_BANK(0x58, 0x80, 0xA8, 0xD0, 5),
+ VT8500_BANK(0x5C, 0x84, 0xAC, 0xD4, 12),
+ VT8500_BANK(0x60, 0x88, 0xB0, 0xD8, 16),
+ VT8500_BANK(0x64, 0x8C, 0xB4, 0xDC, 22),
+ },
+};
+
+/*
+ * No information about which bits are valid so we just make
+ * them all available until its figured out.
+ */
+static struct vt8500_gpio_data wm8650_data = {
+ .num_banks = 9,
+ .banks = {
+ VT8500_BANK(0x40, 0x80, 0xC0, 0x00, 32),
+ VT8500_BANK(0x44, 0x84, 0xC4, 0x04, 32),
+ VT8500_BANK(0x48, 0x88, 0xC8, 0x08, 32),
+ VT8500_BANK(0x4C, 0x8C, 0xCC, 0x0C, 32),
+ VT8500_BANK(0x50, 0x90, 0xD0, 0x10, 32),
+ VT8500_BANK(0x54, 0x94, 0xD4, 0x14, 32),
+ VT8500_BANK(0x58, 0x98, 0xD8, 0x18, 32),
+ VT8500_BANK(0x5C, 0x9C, 0xDC, 0x1C, 32),
+ VT8500_BANK(0x7C, 0xBC, 0xFC, 0x3C, 32),
+ },
+};
+
+struct vt8500_gpio_chip {
+ struct gpio_chip chip;
+
+ const struct vt8500_gpio_bank_regoffsets *regs;
+ void __iomem *base;
+};
+
+
+#define to_vt8500(__chip) container_of(__chip, struct vt8500_gpio_chip, chip)
+
+static int vt8500_gpio_request(struct gpio_chip *chip, unsigned offset)
+{
+ unsigned val;
+ struct vt8500_gpio_chip *vt8500_chip = to_vt8500(chip);
+
+ if (vt8500_chip->regs->en == NO_REG)
+ return 0;
+
+ val = readl(vt8500_chip->base + vt8500_chip->regs->en);
+ val |= BIT(offset);
+ writel(val, vt8500_chip->base + vt8500_chip->regs->en);
+
+ return 0;
+}
+
+static void vt8500_gpio_free(struct gpio_chip *chip, unsigned offset)
+{
+ struct vt8500_gpio_chip *vt8500_chip = to_vt8500(chip);
+ unsigned val;
+
+ if (vt8500_chip->regs->en == NO_REG)
+ return;
+
+ val = readl(vt8500_chip->base + vt8500_chip->regs->en);
+ val &= ~BIT(offset);
+ writel(val, vt8500_chip->base + vt8500_chip->regs->en);
+}
+
+static int vt8500_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
+{
+ struct vt8500_gpio_chip *vt8500_chip = to_vt8500(chip);
+
+ unsigned val = readl(vt8500_chip->base + vt8500_chip->regs->dir);
+ val &= ~BIT(offset);
+ writel(val, vt8500_chip->base + vt8500_chip->regs->dir);
+
+ return 0;
+}
+
+static int vt8500_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
+ int value)
+{
+ struct vt8500_gpio_chip *vt8500_chip = to_vt8500(chip);
+
+ unsigned val = readl(vt8500_chip->base + vt8500_chip->regs->dir);
+ val |= BIT(offset);
+ writel(val, vt8500_chip->base + vt8500_chip->regs->dir);
+
+ if (value) {
+ val = readl(vt8500_chip->base + vt8500_chip->regs->data_out);
+ val |= BIT(offset);
+ writel(val, vt8500_chip->base + vt8500_chip->regs->data_out);
+ }
+ return 0;
+}
+
+static int vt8500_gpio_get_value(struct gpio_chip *chip, unsigned offset)
+{
+ struct vt8500_gpio_chip *vt8500_chip = to_vt8500(chip);
+
+ return (readl(vt8500_chip->base + vt8500_chip->regs->data_in) >>
+ offset) & 1;
+}
+
+static void vt8500_gpio_set_value(struct gpio_chip *chip, unsigned offset,
+ int value)
+{
+ struct vt8500_gpio_chip *vt8500_chip = to_vt8500(chip);
+
+ unsigned val = readl(vt8500_chip->base + vt8500_chip->regs->data_out);
+ if (value)
+ val |= BIT(offset);
+ else
+ val &= ~BIT(offset);
+
+ writel(val, vt8500_chip->base + vt8500_chip->regs->data_out);
+}
+
+static int vt8500_of_xlate(struct gpio_chip *gc,
+ const struct of_phandle_args *gpiospec, u32 *flags)
+{
+ /* bank if specificed in gpiospec->args[0] */
+ if (flags)
+ *flags = gpiospec->args[2];
+
+ return gpiospec->args[1];
+}
+
+static int vt8500_add_chips(struct platform_device *pdev, void __iomem *base,
+ const struct vt8500_gpio_data *data)
+{
+ struct vt8500_gpio_chip *vtchip;
+ struct gpio_chip *chip;
+ int i;
+ int pin_cnt = 0;
+
+ vtchip = devm_kzalloc(&pdev->dev,
+ sizeof(struct vt8500_gpio_chip) * data->num_banks,
+ GFP_KERNEL);
+ if (!vtchip) {
+ pr_err("%s: failed to allocate chip memory\n", __func__);
+ return -ENOMEM;
+ }
+
+ for (i = 0; i < data->num_banks; i++) {
+ vtchip[i].base = base;
+ vtchip[i].regs = &data->banks[i];
+
+ chip = &vtchip[i].chip;
+
+ chip->of_xlate = vt8500_of_xlate;
+ chip->of_gpio_n_cells = 3;
+ chip->of_node = pdev->dev.of_node;
+
+ chip->request = vt8500_gpio_request;
+ chip->free = vt8500_gpio_free;
+ chip->direction_input = vt8500_gpio_direction_input;
+ chip->direction_output = vt8500_gpio_direction_output;
+ chip->get = vt8500_gpio_get_value;
+ chip->set = vt8500_gpio_set_value;
+ chip->can_sleep = 0;
+ chip->base = pin_cnt;
+ chip->ngpio = data->banks[i].ngpio;
+
+ pin_cnt += data->banks[i].ngpio;
+
+ gpiochip_add(chip);
+ }
+ return 0;
+}
+
+static struct of_device_id vt8500_gpio_dt_ids[] = {
+ { .compatible = "via,vt8500-gpio", .data = &vt8500_data, },
+ { .compatible = "wm,wm8505-gpio", .data = &wm8505_data, },
+ { .compatible = "wm,wm8650-gpio", .data = &wm8650_data, },
+ { /* Sentinel */ },
+};
+
+static int __devinit vt8500_gpio_probe(struct platform_device *pdev)
+{
+ void __iomem *gpio_base;
+ struct device_node *np;
+ const struct of_device_id *of_id =
+ of_match_device(vt8500_gpio_dt_ids, &pdev->dev);
+
+ if (!of_id) {
+ dev_err(&pdev->dev, "Failed to find gpio controller\n");
+ return -ENODEV;
+ }
+
+ np = pdev->dev.of_node;
+ if (!np) {
+ dev_err(&pdev->dev, "Missing GPIO description in devicetree\n");
+ return -EFAULT;
+ }
+
+ gpio_base = of_iomap(np, 0);
+ if (!gpio_base) {
+ dev_err(&pdev->dev, "Unable to map GPIO registers\n");
+ of_node_put(np);
+ return -ENOMEM;
+ }
+
+ vt8500_add_chips(pdev, gpio_base, of_id->data);
+
+ return 0;
+}
+
+static struct platform_driver vt8500_gpio_driver = {
+ .probe = vt8500_gpio_probe,
+ .driver = {
+ .name = "vt8500-gpio",
+ .owner = THIS_MODULE,
+ .of_match_table = vt8500_gpio_dt_ids,
+ },
+};
+
+module_platform_driver(vt8500_gpio_driver);
+
+MODULE_DESCRIPTION("VT8500 GPIO Driver");
+MODULE_AUTHOR("Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org>");
+MODULE_LICENSE("GPL v2");
+MODULE_DEVICE_TABLE(of, vt8500_gpio_dt_ids);
--
1.7.9.5
^ permalink raw reply related
* [PATCHv3 7/9] arm: vt8500: doc: Add device tree bindings for arch-vt8500 devices
From: Tony Prisk @ 2012-08-21 20:47 UTC (permalink / raw)
To: vt8500-wm8505-linux-kernel
Cc: Tony Prisk, Russell King, Alessandro Zummo, Alan Cox,
Greg Kroah-Hartman, Florian Tobias Schandinat, Arnd Bergmann,
Grant Likely, Rob Herring, Rob Landley, Linus Walleij,
Mike Turquette, Stephen Warren, linux-arm-kernel, linux-kernel,
linux-fbdev, linux-usb, linux-serial, rtc-linux,
devicetree-discuss
In-Reply-To: <1345582058-2291-1-git-send-email-linux@prisktech.co.nz>
Bindings for gpio, interrupt controller, power management controller,
timer, realtime clock, serial uart, ehci and uhci controllers and
framebuffer controllers used on the arch-vt8500 platform.
Framebuffer binding also specifies a 'display' node which is required
for determining the lcd panel data.
Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
---
Documentation/devicetree/bindings/arm/vt8500.txt | 15 ++++
.../bindings/arm/vt8500/via,vt8500-intc.txt | 16 +++++
.../bindings/arm/vt8500/via,vt8500-pmc.txt | 13 ++++
.../bindings/arm/vt8500/via,vt8500-timer.txt | 15 ++++
Documentation/devicetree/bindings/clock/vt8500.txt | 72 ++++++++++++++++++++
.../devicetree/bindings/gpio/gpio_vt8500.txt | 24 +++++++
.../devicetree/bindings/rtc/via,vt8500-rtc.txt | 15 ++++
.../bindings/tty/serial/via,vt8500-uart.txt | 15 ++++
.../devicetree/bindings/usb/platform-uhci.txt | 15 ++++
.../devicetree/bindings/usb/via,vt8500-ehci.txt | 15 ++++
.../devicetree/bindings/vendor-prefixes.txt | 2 +
.../devicetree/bindings/video/via,vt8500-fb.txt | 48 +++++++++++++
.../devicetree/bindings/video/wm,prizm-ge-rops.txt | 13 ++++
.../devicetree/bindings/video/wm,wm8505-fb.txt | 22 ++++++
14 files changed, 300 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/vt8500.txt
create mode 100644 Documentation/devicetree/bindings/arm/vt8500/via,vt8500-intc.txt
create mode 100644 Documentation/devicetree/bindings/arm/vt8500/via,vt8500-pmc.txt
create mode 100644 Documentation/devicetree/bindings/arm/vt8500/via,vt8500-timer.txt
create mode 100644 Documentation/devicetree/bindings/clock/vt8500.txt
create mode 100644 Documentation/devicetree/bindings/gpio/gpio_vt8500.txt
create mode 100644 Documentation/devicetree/bindings/rtc/via,vt8500-rtc.txt
create mode 100644 Documentation/devicetree/bindings/tty/serial/via,vt8500-uart.txt
create mode 100644 Documentation/devicetree/bindings/usb/platform-uhci.txt
create mode 100644 Documentation/devicetree/bindings/usb/via,vt8500-ehci.txt
create mode 100644 Documentation/devicetree/bindings/video/via,vt8500-fb.txt
create mode 100644 Documentation/devicetree/bindings/video/wm,prizm-ge-rops.txt
create mode 100644 Documentation/devicetree/bindings/video/wm,wm8505-fb.txt
diff --git a/Documentation/devicetree/bindings/arm/vt8500.txt b/Documentation/devicetree/bindings/arm/vt8500.txt
new file mode 100644
index 0000000..1b3b187
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/vt8500.txt
@@ -0,0 +1,15 @@
+VIA/Wondermedia VT8500 Platforms Device Tree Bindings
+---------------------------------------
+
+Boards with the VIA VT8500 SoC shall have the following properties:
+Required root node property:
+compatible = "via,vt8500";
+
+Boards with the Wondermedia WM8505 SoC shall have the following properties:
+Required root node property:
+compatible = "wm,wm8505";
+
+Boards with the Wondermedia WM8650 SoC shall have the following properties:
+Required root node property:
+compatible = "wm,wm8650";
+
diff --git a/Documentation/devicetree/bindings/arm/vt8500/via,vt8500-intc.txt b/Documentation/devicetree/bindings/arm/vt8500/via,vt8500-intc.txt
new file mode 100644
index 0000000..0a4ce10
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/vt8500/via,vt8500-intc.txt
@@ -0,0 +1,16 @@
+VIA/Wondermedia VT8500 Interrupt Controller
+-----------------------------------------------------
+
+Required properties:
+- compatible : "via,vt8500-intc"
+- reg : Should contain 1 register ranges(address and length)
+- #interrupt-cells : should be <1>
+
+Example:
+
+ intc: interrupt-controller@d8140000 {
+ compatible = "via,vt8500-intc";
+ interrupt-controller;
+ reg = <0xd8140000 0x10000>;
+ #interrupt-cells = <1>;
+ };
diff --git a/Documentation/devicetree/bindings/arm/vt8500/via,vt8500-pmc.txt b/Documentation/devicetree/bindings/arm/vt8500/via,vt8500-pmc.txt
new file mode 100644
index 0000000..521b9c7
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/vt8500/via,vt8500-pmc.txt
@@ -0,0 +1,13 @@
+VIA/Wondermedia VT8500 Power Management Controller
+-----------------------------------------------------
+
+Required properties:
+- compatible : "via,vt8500-pmc"
+- reg : Should contain 1 register ranges(address and length)
+
+Example:
+
+ pmc@d8130000 {
+ compatible = "via,vt8500-pmc";
+ reg = <0xd8130000 0x1000>;
+ };
diff --git a/Documentation/devicetree/bindings/arm/vt8500/via,vt8500-timer.txt b/Documentation/devicetree/bindings/arm/vt8500/via,vt8500-timer.txt
new file mode 100644
index 0000000..901c73f
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/vt8500/via,vt8500-timer.txt
@@ -0,0 +1,15 @@
+VIA/Wondermedia VT8500 Timer
+-----------------------------------------------------
+
+Required properties:
+- compatible : "via,vt8500-timer"
+- reg : Should contain 1 register ranges(address and length)
+- interrupts : interrupt for the timer
+
+Example:
+
+ timer@d8130100 {
+ compatible = "via,vt8500-timer";
+ reg = <0xd8130100 0x28>;
+ interrupts = <36>;
+ };
diff --git a/Documentation/devicetree/bindings/clock/vt8500.txt b/Documentation/devicetree/bindings/clock/vt8500.txt
new file mode 100644
index 0000000..a880c70
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/vt8500.txt
@@ -0,0 +1,72 @@
+Device Tree Clock bindings for arch-vt8500
+
+This binding uses the common clock binding[1].
+
+[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
+
+Required properties:
+- compatible : shall be one of the following:
+ "via,vt8500-pll-clock" - for a VT8500/WM8505 PLL clock
+ "wm,wm8650-pll-clock" - for a WM8650 PLL clock
+ "via,vt8500-device-clock" - for a VT/WM device clock
+
+Required properties for PLL clocks:
+- reg : shall be the control register offset from PMC base for the pll clock.
+- clocks : shall be the input parent clock phandle for the clock. This should
+ be the reference clock.
+- #clock-cells : from common clock binding; shall be set to 0.
+
+Required properties for device clocks:
+- clocks : shall be the input parent clock phandle for the clock. This should
+ be a pll output.
+- #clock-cells : from common clock binding; shall be set to 0.
+
+
+Device Clocks
+
+Device clocks are required to have one or both of the following sets of
+properties:
+
+
+Gated device clocks:
+
+Required properties:
+- enable-reg : shall be the register offset from PMC base for the enable
+ register.
+- enable-bit : shall be the bit within enable-reg to enable/disable the clock.
+
+
+Divisor device clocks:
+
+Required property:
+- divisor-reg : shall be the register offset from PMC base for the divisor
+ register.
+Optional property:
+- divisor-mask : shall be the mask for the divisor register. Defaults to 0x1f
+ if not specified.
+
+
+For example:
+
+ref25: ref25M {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <25000000>;
+};
+
+plla: plla {
+ #clock-cells = <0>;
+ compatible = "wm,wm8650-pll-clock";
+ clocks = <&ref25>;
+ reg = <0x200>;
+};
+
+sdhc: sdhc {
+ #clock-cells = <0>;
+ compatible = "via,vt8500-device-clock";
+ clocks = <&pllb>;
+ divisor-reg = <0x328>;
+ divisor-mask = <0x3f>;
+ enable-reg = <0x254>;
+ enable-bit = <18>;
+};
diff --git a/Documentation/devicetree/bindings/gpio/gpio_vt8500.txt b/Documentation/devicetree/bindings/gpio/gpio_vt8500.txt
new file mode 100644
index 0000000..1a122bf
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/gpio_vt8500.txt
@@ -0,0 +1,24 @@
+VIA/Wondermedia VT8500 GPIO Controller
+-----------------------------------------------------
+
+Required properties:
+- compatible : "via,vt8500-gpio", "wm,wm8505-gpio"
+ or "wm,wm8650-gpio" depending on your SoC
+- reg : Should contain 1 register range (address and length)
+- #gpio-cells : should be <3>.
+ 1) bank
+ 2) pin number
+ 3) flags
+
+Example:
+
+ gpio: gpio-controller@d8110000 {
+ compatible = "via,vt8500-gpio";
+ gpio-controller;
+ reg = <0xd8110000 0x10000>;
+ #gpio-cells = <3>;
+ };
+
+ vibrate {
+ gpios = <&gpio 0 1 0>; /* Bank 0, Pin 1, No flags */
+ };
diff --git a/Documentation/devicetree/bindings/rtc/via,vt8500-rtc.txt b/Documentation/devicetree/bindings/rtc/via,vt8500-rtc.txt
new file mode 100644
index 0000000..3c0484c
--- /dev/null
+++ b/Documentation/devicetree/bindings/rtc/via,vt8500-rtc.txt
@@ -0,0 +1,15 @@
+VIA/Wondermedia VT8500 Realtime Clock Controller
+-----------------------------------------------------
+
+Required properties:
+- compatible : "via,vt8500-rtc"
+- reg : Should contain 1 register ranges(address and length)
+- interrupts : alarm interrupt
+
+Example:
+
+ rtc@d8100000 {
+ compatible = "via,vt8500-rtc";
+ reg = <0xd8100000 0x10000>;
+ interrupts = <48>;
+ };
diff --git a/Documentation/devicetree/bindings/tty/serial/via,vt8500-uart.txt b/Documentation/devicetree/bindings/tty/serial/via,vt8500-uart.txt
new file mode 100644
index 0000000..3222502
--- /dev/null
+++ b/Documentation/devicetree/bindings/tty/serial/via,vt8500-uart.txt
@@ -0,0 +1,15 @@
+VIA/Wondermedia VT8500 UART Controller
+-----------------------------------------------------
+
+Required properties:
+- compatible : "via,vt8500-uart"
+- reg : Should contain 1 register ranges(address and length)
+- interrupts : UART interrupt
+
+Example:
+
+ uart@d8210000 {
+ compatible = "via,vt8500-uart";
+ reg = <0xd8210000 0x1040>;
+ interrupts = <47>;
+ };
diff --git a/Documentation/devicetree/bindings/usb/platform-uhci.txt b/Documentation/devicetree/bindings/usb/platform-uhci.txt
new file mode 100644
index 0000000..a4fb071
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/platform-uhci.txt
@@ -0,0 +1,15 @@
+Generic Platform UHCI Controller
+-----------------------------------------------------
+
+Required properties:
+- compatible : "platform-uhci"
+- reg : Should contain 1 register ranges(address and length)
+- interrupts : UHCI controller interrupt
+
+Example:
+
+ uhci@d8007b00 {
+ compatible = "platform-uhci";
+ reg = <0xd8007b00 0x200>;
+ interrupts = <43>;
+ };
diff --git a/Documentation/devicetree/bindings/usb/via,vt8500-ehci.txt b/Documentation/devicetree/bindings/usb/via,vt8500-ehci.txt
new file mode 100644
index 0000000..17b3ad1
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/via,vt8500-ehci.txt
@@ -0,0 +1,15 @@
+VIA/Wondermedia VT8500 EHCI Controller
+-----------------------------------------------------
+
+Required properties:
+- compatible : "via,vt8500-ehci"
+- reg : Should contain 1 register ranges(address and length)
+- interrupts : ehci controller interrupt
+
+Example:
+
+ ehci@d8007900 {
+ compatible = "via,vt8500-ehci";
+ reg = <0xd8007900 0x200>;
+ interrupts = <43>;
+ };
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index db4d3af..5c63da2 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -47,5 +47,7 @@ sirf SiRF Technology, Inc.
st STMicroelectronics
stericsson ST-Ericsson
ti Texas Instruments
+via VIA Technologies, Inc.
wlf Wolfson Microelectronics
+wm Wondermedia Technologies, Inc.
xlnx Xilinx
diff --git a/Documentation/devicetree/bindings/video/via,vt8500-fb.txt b/Documentation/devicetree/bindings/video/via,vt8500-fb.txt
new file mode 100644
index 0000000..98ad14c
--- /dev/null
+++ b/Documentation/devicetree/bindings/video/via,vt8500-fb.txt
@@ -0,0 +1,48 @@
+VIA VT8500 Framebuffer
+-----------------------------------------------------
+
+Required properties:
+- compatible : "via,vt8500-fb"
+- reg : Should contain 1 register ranges(address and length)
+- interrupts : framebuffer controller interrupt
+- via,display: a phandle pointing to the display node
+
+Required nodes:
+- display: a display node is required to initialize the lcd panel
+ This should be in the board dts.
+
+Example:
+
+ fb@d800e400 {
+ compatible = "via,vt8500-fb";
+ reg = <0xd800e400 0x400>;
+ interrupts = <12>;
+ via,display = <&display>;
+ };
+
+VIA VT8500 Display
+-----------------------------------------------------
+Required properties:
+- xres : lcd panel horizontal resolution
+- yres : lcd panel vertical resolution
+- left-margin,
+- right-margin,
+- hsync-len: lcd panel horizontal timings in pixels
+- upper-margin,
+- lower-margin,
+- vsync-len: lcd panel verticals timings in pixels
+- bpp: lcd panel bit-depth.
+ <16> for RGB565, <32> for RGB888
+
+Example:
+ display {
+ xres = <800>;
+ yres = <480>;
+ left-margin = <88>;
+ right-margin = <40>;
+ hsync-len = <0>;
+ upper-margin = <32>;
+ lower-margin = <11>;
+ vsync-len = <1>;
+ bpp = <16>;
+ };
diff --git a/Documentation/devicetree/bindings/video/wm,prizm-ge-rops.txt b/Documentation/devicetree/bindings/video/wm,prizm-ge-rops.txt
new file mode 100644
index 0000000..a850fa0
--- /dev/null
+++ b/Documentation/devicetree/bindings/video/wm,prizm-ge-rops.txt
@@ -0,0 +1,13 @@
+VIA/Wondermedia Graphics Engine Controller
+-----------------------------------------------------
+
+Required properties:
+- compatible : "wm,prizm-ge-rops"
+- reg : Should contain 1 register ranges(address and length)
+
+Example:
+
+ ge_rops@d8050400 {
+ compatible = "wm,prizm-ge-rops";
+ reg = <0xd8050400 0x100>;
+ };
diff --git a/Documentation/devicetree/bindings/video/wm,wm8505-fb.txt b/Documentation/devicetree/bindings/video/wm,wm8505-fb.txt
new file mode 100644
index 0000000..64f016a
--- /dev/null
+++ b/Documentation/devicetree/bindings/video/wm,wm8505-fb.txt
@@ -0,0 +1,22 @@
+Wondermedia WM8505 Framebuffer
+-----------------------------------------------------
+
+Required properties:
+- compatible : "wm,wm8505-fb"
+- reg : Should contain 1 register ranges(address and length)
+- via,display: a phandle pointing to the display node
+
+Required nodes:
+- display: a display node is required to initialize the lcd panel
+ This should be in the board dts. See definition in
+ Documentation/devicetree/bindings/video/via,vt8500-fb.txt
+
+
+Example:
+
+ fb@d8050800 {
+ compatible = "wm,wm8505-fb";
+ reg = <0xd8050800 0x200>;
+ via,display = <&display>;
+ };
+
--
1.7.9.5
^ permalink raw reply related
* [PATCHv3 6/9] arm: vt8500: Update arch-vt8500 to devicetree support.
From: Tony Prisk @ 2012-08-21 20:47 UTC (permalink / raw)
To: vt8500-wm8505-linux-kernel-/JYPxA39Uh6Zox4op4iWzw
Cc: Alessandro Zummo, linux-fbdev-u79uwXL29TY76Z2rM5mHXA,
Russell King, Linus Walleij, Florian Tobias Schandinat,
Greg Kroah-Hartman, devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
linux-usb-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, Rob Herring,
linux-serial-u79uwXL29TY76Z2rM5mHXA,
rtc-linux-/JYPxA39Uh5TLH3MbocFFw, Stephen Warren, Mike Turquette,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Alan Cox
In-Reply-To: <1345582058-2291-1-git-send-email-linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org>
Merged existing board files to a single dt-capable file.
Converted irq and timer code to devicetree.
Removed existing device files that are no longer required with
devicetree support.
All existing platform devices are converted to devicetree nodes
except PWM.
Removed restart.c and moved code into vt8500.c to remove
duplicate PMC code.
Signed-off-by: Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org>
---
arch/arm/Kconfig | 5 +
arch/arm/mach-vt8500/Kconfig | 72 +-----
arch/arm/mach-vt8500/Makefile | 9 +-
arch/arm/mach-vt8500/bv07.c | 80 -------
arch/arm/mach-vt8500/common.h | 28 +++
arch/arm/mach-vt8500/devices-vt8500.c | 91 --------
arch/arm/mach-vt8500/devices-wm8505.c | 99 ---------
arch/arm/mach-vt8500/devices.c | 270 -----------------------
arch/arm/mach-vt8500/devices.h | 88 --------
arch/arm/mach-vt8500/gpio.c | 240 --------------------
arch/arm/mach-vt8500/include/mach/restart.h | 4 +-
arch/arm/mach-vt8500/include/mach/vt8500_irqs.h | 88 --------
arch/arm/mach-vt8500/include/mach/vt8500_regs.h | 79 -------
arch/arm/mach-vt8500/include/mach/wm8505_irqs.h | 115 ----------
arch/arm/mach-vt8500/include/mach/wm8505_regs.h | 78 -------
arch/arm/mach-vt8500/irq.c | 209 +++++++++++-------
arch/arm/mach-vt8500/restart.c | 54 -----
arch/arm/mach-vt8500/timer.c | 67 ++++--
arch/arm/mach-vt8500/vt8500.c | 196 ++++++++++++++++
arch/arm/mach-vt8500/wm8505_7in.c | 79 -------
20 files changed, 413 insertions(+), 1538 deletions(-)
delete mode 100644 arch/arm/mach-vt8500/bv07.c
create mode 100644 arch/arm/mach-vt8500/common.h
delete mode 100644 arch/arm/mach-vt8500/devices-vt8500.c
delete mode 100644 arch/arm/mach-vt8500/devices-wm8505.c
delete mode 100644 arch/arm/mach-vt8500/devices.c
delete mode 100644 arch/arm/mach-vt8500/devices.h
delete mode 100644 arch/arm/mach-vt8500/gpio.c
delete mode 100644 arch/arm/mach-vt8500/include/mach/vt8500_irqs.h
delete mode 100644 arch/arm/mach-vt8500/include/mach/vt8500_regs.h
delete mode 100644 arch/arm/mach-vt8500/include/mach/wm8505_irqs.h
delete mode 100644 arch/arm/mach-vt8500/include/mach/wm8505_regs.h
delete mode 100644 arch/arm/mach-vt8500/restart.c
create mode 100644 arch/arm/mach-vt8500/vt8500.c
delete mode 100644 arch/arm/mach-vt8500/wm8505_7in.c
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 6774c80..ea8ec75 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -996,6 +996,10 @@ config ARCH_VT8500
select GENERIC_CLOCKEVENTS
select ARCH_REQUIRE_GPIOLIB
select HAVE_PWM
+ select USE_OF
+ select COMMON_CLK
+ select HAVE_CLK
+ select CLKDEV_LOOKUP
help
Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
@@ -1613,6 +1617,7 @@ config ARCH_NR_GPIO
default 355 if ARCH_U8500
default 264 if MACH_H4700
default 512 if SOC_OMAP5
+ default 288 if ARCH_VT8500
default 0
help
Maximum number of GPIOs in the system.
diff --git a/arch/arm/mach-vt8500/Kconfig b/arch/arm/mach-vt8500/Kconfig
index 2c20a34..44f9f9d 100644
--- a/arch/arm/mach-vt8500/Kconfig
+++ b/arch/arm/mach-vt8500/Kconfig
@@ -1,73 +1,15 @@
if ARCH_VT8500
-config VTWM_VERSION_VT8500
+config VTWM_VERSION_WMT_DT
bool
-config VTWM_VERSION_WM8505
- bool
-
-config MACH_BV07
- bool "Benign BV07-8500 Mini Netbook"
- depends on ARCH_VT8500
- select VTWM_VERSION_VT8500
- help
- Add support for the inexpensive 7-inch netbooks sold by many
- Chinese distributors under various names. Note that there are
- many hardware implementations in identical exterior, make sure
- that yours is indeed based on a VIA VT8500 chip.
-
-config MACH_WM8505_7IN_NETBOOK
- bool "WM8505 7-inch generic netbook"
+config MACH_WMT_DT
+ bool "VIA/Wondermedia SoC based boards (Device Tree Support)"
depends on ARCH_VT8500
- select VTWM_VERSION_WM8505
- help
- Add support for the inexpensive 7-inch netbooks sold by many
- Chinese distributors under various names. Note that there are
- many hardware implementations in identical exterior, make sure
- that yours is indeed based on a WonderMedia WM8505 chip.
-
-comment "LCD panel size"
-
-config WMT_PANEL_800X480
- bool "7-inch with 800x480 resolution"
- depends on (FB_VT8500 || FB_WM8505)
- default y
- help
- These are found in most of the netbooks in generic cases, as
- well as in Eken M001 tablets and possibly elsewhere.
-
- To select this panel at runtime, say y here and append
- 'panel=800x480' to your kernel command line. Otherwise, the
- largest one available will be used.
-
-config WMT_PANEL_800X600
- bool "8-inch with 800x600 resolution"
- depends on (FB_VT8500 || FB_WM8505)
- help
- These are found in Eken M003 tablets and possibly elsewhere.
-
- To select this panel at runtime, say y here and append
- 'panel=800x600' to your kernel command line. Otherwise, the
- largest one available will be used.
-
-config WMT_PANEL_1024X576
- bool "10-inch with 1024x576 resolution"
- depends on (FB_VT8500 || FB_WM8505)
+ select VTWM_VERSION_WMT_DT
help
- These are found in CherryPal netbooks and possibly elsewhere.
-
- To select this panel at runtime, say y here and append
- 'panel=1024x576' to your kernel command line. Otherwise, the
- largest one available will be used.
-
-config WMT_PANEL_1024X600
- bool "10-inch with 1024x600 resolution"
- depends on (FB_VT8500 || FB_WM8505)
- help
- These are found in Eken M006 tablets and possibly elsewhere.
-
- To select this panel at runtime, say y here and append
- 'panel=1024x600' to your kernel command line. Otherwise, the
- largest one available will be used.
+ Add support for netbooks, tablets and other devices based on
+ the reference board design as produced by VIA/WonderMedia, using
+ VT8500/WM8505/WM8650 System-on-Chip.
endif
diff --git a/arch/arm/mach-vt8500/Makefile b/arch/arm/mach-vt8500/Makefile
index 54e6997..1966183 100644
--- a/arch/arm/mach-vt8500/Makefile
+++ b/arch/arm/mach-vt8500/Makefile
@@ -1,9 +1,4 @@
-obj-y += devices.o gpio.o irq.o timer.o restart.o
-
-obj-$(CONFIG_VTWM_VERSION_VT8500) += devices-vt8500.o
-obj-$(CONFIG_VTWM_VERSION_WM8505) += devices-wm8505.o
-
-obj-$(CONFIG_MACH_BV07) += bv07.o
-obj-$(CONFIG_MACH_WM8505_7IN_NETBOOK) += wm8505_7in.o
+obj-$(CONFIG_VTWM_VERSION_WMT_DT) += irq.o timer.o
+obj-$(CONFIG_MACH_WMT_DT) += vt8500.o
obj-$(CONFIG_HAVE_PWM) += pwm.o
diff --git a/arch/arm/mach-vt8500/bv07.c b/arch/arm/mach-vt8500/bv07.c
deleted file mode 100644
index f9fbeb2..0000000
--- a/arch/arm/mach-vt8500/bv07.c
+++ /dev/null
@@ -1,80 +0,0 @@
-/*
- * arch/arm/mach-vt8500/bv07.c
- *
- * Copyright (C) 2010 Alexey Charkov <alchark-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-
-#include <linux/io.h>
-#include <linux/pm.h>
-
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <mach/restart.h>
-
-#include "devices.h"
-
-static void __iomem *pmc_hiber;
-
-static struct platform_device *devices[] __initdata = {
- &vt8500_device_uart0,
- &vt8500_device_lcdc,
- &vt8500_device_ehci,
- &vt8500_device_ge_rops,
- &vt8500_device_pwm,
- &vt8500_device_pwmbl,
- &vt8500_device_rtc,
-};
-
-static void vt8500_power_off(void)
-{
- local_irq_disable();
- writew(5, pmc_hiber);
- asm("mcr%? p15, 0, %0, c7, c0, 4" : : "r" (0));
-}
-
-void __init bv07_init(void)
-{
-#ifdef CONFIG_FB_VT8500
- void __iomem *gpio_mux_reg = ioremap(wmt_gpio_base + 0x200, 4);
- if (gpio_mux_reg) {
- writel(readl(gpio_mux_reg) | 1, gpio_mux_reg);
- iounmap(gpio_mux_reg);
- } else {
- printk(KERN_ERR "Could not remap the GPIO mux register, display may not work properly!\n");
- }
-#endif
- pmc_hiber = ioremap(wmt_pmc_base + 0x12, 2);
- if (pmc_hiber)
- pm_power_off = &vt8500_power_off;
- else
- printk(KERN_ERR "PMC Hibernation register could not be remapped, not enabling power off!\n");
-
- wmt_setup_restart();
- vt8500_set_resources();
- platform_add_devices(devices, ARRAY_SIZE(devices));
- vt8500_gpio_init();
-}
-
-MACHINE_START(BV07, "Benign BV07 Mini Netbook")
- .atag_offset = 0x100,
- .restart = wmt_restart,
- .reserve = vt8500_reserve_mem,
- .map_io = vt8500_map_io,
- .init_irq = vt8500_init_irq,
- .timer = &vt8500_timer,
- .init_machine = bv07_init,
-MACHINE_END
diff --git a/arch/arm/mach-vt8500/common.h b/arch/arm/mach-vt8500/common.h
new file mode 100644
index 0000000..2b24196
--- /dev/null
+++ b/arch/arm/mach-vt8500/common.h
@@ -0,0 +1,28 @@
+/* linux/arch/arm/mach-vt8500/dt_common.h
+ *
+ * Copyright (C) 2012 Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef __ARCH_ARM_MACH_VT8500_DT_COMMON_H
+#define __ARCH_ARM_MACH_VT8500_DT_COMMON_H
+
+#include <linux/of.h>
+
+void __init vt8500_timer_init(void);
+int __init vt8500_irq_init(struct device_node *node,
+ struct device_node *parent);
+
+/* defined in drivers/clk/clk-vt8500.c */
+void __init vtwm_clk_init(void __iomem *pmc_base);
+
+#endif
diff --git a/arch/arm/mach-vt8500/devices-vt8500.c b/arch/arm/mach-vt8500/devices-vt8500.c
deleted file mode 100644
index 19519ae..0000000
--- a/arch/arm/mach-vt8500/devices-vt8500.c
+++ /dev/null
@@ -1,91 +0,0 @@
-/* linux/arch/arm/mach-vt8500/devices-vt8500.c
- *
- * Copyright (C) 2010 Alexey Charkov <alchark-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- */
-
-#include <linux/platform_device.h>
-
-#include <mach/vt8500_regs.h>
-#include <mach/vt8500_irqs.h>
-#include <mach/i8042.h>
-#include "devices.h"
-
-void __init vt8500_set_resources(void)
-{
- struct resource tmp[3];
-
- tmp[0] = wmt_mmio_res(VT8500_LCDC_BASE, SZ_1K);
- tmp[1] = wmt_irq_res(IRQ_LCDC);
- wmt_res_add(&vt8500_device_lcdc, tmp, 2);
-
- tmp[0] = wmt_mmio_res(VT8500_UART0_BASE, 0x1040);
- tmp[1] = wmt_irq_res(IRQ_UART0);
- wmt_res_add(&vt8500_device_uart0, tmp, 2);
-
- tmp[0] = wmt_mmio_res(VT8500_UART1_BASE, 0x1040);
- tmp[1] = wmt_irq_res(IRQ_UART1);
- wmt_res_add(&vt8500_device_uart1, tmp, 2);
-
- tmp[0] = wmt_mmio_res(VT8500_UART2_BASE, 0x1040);
- tmp[1] = wmt_irq_res(IRQ_UART2);
- wmt_res_add(&vt8500_device_uart2, tmp, 2);
-
- tmp[0] = wmt_mmio_res(VT8500_UART3_BASE, 0x1040);
- tmp[1] = wmt_irq_res(IRQ_UART3);
- wmt_res_add(&vt8500_device_uart3, tmp, 2);
-
- tmp[0] = wmt_mmio_res(VT8500_EHCI_BASE, SZ_512);
- tmp[1] = wmt_irq_res(IRQ_EHCI);
- wmt_res_add(&vt8500_device_ehci, tmp, 2);
-
- tmp[0] = wmt_mmio_res(VT8500_GEGEA_BASE, SZ_256);
- wmt_res_add(&vt8500_device_ge_rops, tmp, 1);
-
- tmp[0] = wmt_mmio_res(VT8500_PWM_BASE, 0x44);
- wmt_res_add(&vt8500_device_pwm, tmp, 1);
-
- tmp[0] = wmt_mmio_res(VT8500_RTC_BASE, 0x2c);
- tmp[1] = wmt_irq_res(IRQ_RTC);
- tmp[2] = wmt_irq_res(IRQ_RTCSM);
- wmt_res_add(&vt8500_device_rtc, tmp, 3);
-}
-
-static void __init vt8500_set_externs(void)
-{
- /* Non-resource-aware stuff */
- wmt_ic_base = VT8500_IC_BASE;
- wmt_gpio_base = VT8500_GPIO_BASE;
- wmt_pmc_base = VT8500_PMC_BASE;
- wmt_i8042_base = VT8500_PS2_BASE;
-
- wmt_nr_irqs = VT8500_NR_IRQS;
- wmt_timer_irq = IRQ_PMCOS0;
- wmt_gpio_ext_irq[0] = IRQ_EXT0;
- wmt_gpio_ext_irq[1] = IRQ_EXT1;
- wmt_gpio_ext_irq[2] = IRQ_EXT2;
- wmt_gpio_ext_irq[3] = IRQ_EXT3;
- wmt_gpio_ext_irq[4] = IRQ_EXT4;
- wmt_gpio_ext_irq[5] = IRQ_EXT5;
- wmt_gpio_ext_irq[6] = IRQ_EXT6;
- wmt_gpio_ext_irq[7] = IRQ_EXT7;
- wmt_i8042_kbd_irq = IRQ_PS2KBD;
- wmt_i8042_aux_irq = IRQ_PS2MOUSE;
-}
-
-void __init vt8500_map_io(void)
-{
- iotable_init(wmt_io_desc, ARRAY_SIZE(wmt_io_desc));
-
- /* Should be done before interrupts and timers are initialized */
- vt8500_set_externs();
-}
diff --git a/arch/arm/mach-vt8500/devices-wm8505.c b/arch/arm/mach-vt8500/devices-wm8505.c
deleted file mode 100644
index db4594e..0000000
--- a/arch/arm/mach-vt8500/devices-wm8505.c
+++ /dev/null
@@ -1,99 +0,0 @@
-/* linux/arch/arm/mach-vt8500/devices-wm8505.c
- *
- * Copyright (C) 2010 Alexey Charkov <alchark-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- */
-
-#include <linux/platform_device.h>
-
-#include <mach/wm8505_regs.h>
-#include <mach/wm8505_irqs.h>
-#include <mach/i8042.h>
-#include "devices.h"
-
-void __init wm8505_set_resources(void)
-{
- struct resource tmp[3];
-
- tmp[0] = wmt_mmio_res(WM8505_GOVR_BASE, SZ_512);
- wmt_res_add(&vt8500_device_wm8505_fb, tmp, 1);
-
- tmp[0] = wmt_mmio_res(WM8505_UART0_BASE, 0x1040);
- tmp[1] = wmt_irq_res(IRQ_UART0);
- wmt_res_add(&vt8500_device_uart0, tmp, 2);
-
- tmp[0] = wmt_mmio_res(WM8505_UART1_BASE, 0x1040);
- tmp[1] = wmt_irq_res(IRQ_UART1);
- wmt_res_add(&vt8500_device_uart1, tmp, 2);
-
- tmp[0] = wmt_mmio_res(WM8505_UART2_BASE, 0x1040);
- tmp[1] = wmt_irq_res(IRQ_UART2);
- wmt_res_add(&vt8500_device_uart2, tmp, 2);
-
- tmp[0] = wmt_mmio_res(WM8505_UART3_BASE, 0x1040);
- tmp[1] = wmt_irq_res(IRQ_UART3);
- wmt_res_add(&vt8500_device_uart3, tmp, 2);
-
- tmp[0] = wmt_mmio_res(WM8505_UART4_BASE, 0x1040);
- tmp[1] = wmt_irq_res(IRQ_UART4);
- wmt_res_add(&vt8500_device_uart4, tmp, 2);
-
- tmp[0] = wmt_mmio_res(WM8505_UART5_BASE, 0x1040);
- tmp[1] = wmt_irq_res(IRQ_UART5);
- wmt_res_add(&vt8500_device_uart5, tmp, 2);
-
- tmp[0] = wmt_mmio_res(WM8505_EHCI_BASE, SZ_512);
- tmp[1] = wmt_irq_res(IRQ_EHCI);
- wmt_res_add(&vt8500_device_ehci, tmp, 2);
-
- tmp[0] = wmt_mmio_res(WM8505_GEGEA_BASE, SZ_256);
- wmt_res_add(&vt8500_device_ge_rops, tmp, 1);
-
- tmp[0] = wmt_mmio_res(WM8505_PWM_BASE, 0x44);
- wmt_res_add(&vt8500_device_pwm, tmp, 1);
-
- tmp[0] = wmt_mmio_res(WM8505_RTC_BASE, 0x2c);
- tmp[1] = wmt_irq_res(IRQ_RTC);
- tmp[2] = wmt_irq_res(IRQ_RTCSM);
- wmt_res_add(&vt8500_device_rtc, tmp, 3);
-}
-
-static void __init wm8505_set_externs(void)
-{
- /* Non-resource-aware stuff */
- wmt_ic_base = WM8505_IC_BASE;
- wmt_sic_base = WM8505_SIC_BASE;
- wmt_gpio_base = WM8505_GPIO_BASE;
- wmt_pmc_base = WM8505_PMC_BASE;
- wmt_i8042_base = WM8505_PS2_BASE;
-
- wmt_nr_irqs = WM8505_NR_IRQS;
- wmt_timer_irq = IRQ_PMCOS0;
- wmt_gpio_ext_irq[0] = IRQ_EXT0;
- wmt_gpio_ext_irq[1] = IRQ_EXT1;
- wmt_gpio_ext_irq[2] = IRQ_EXT2;
- wmt_gpio_ext_irq[3] = IRQ_EXT3;
- wmt_gpio_ext_irq[4] = IRQ_EXT4;
- wmt_gpio_ext_irq[5] = IRQ_EXT5;
- wmt_gpio_ext_irq[6] = IRQ_EXT6;
- wmt_gpio_ext_irq[7] = IRQ_EXT7;
- wmt_i8042_kbd_irq = IRQ_PS2KBD;
- wmt_i8042_aux_irq = IRQ_PS2MOUSE;
-}
-
-void __init wm8505_map_io(void)
-{
- iotable_init(wmt_io_desc, ARRAY_SIZE(wmt_io_desc));
-
- /* Should be done before interrupts and timers are initialized */
- wm8505_set_externs();
-}
diff --git a/arch/arm/mach-vt8500/devices.c b/arch/arm/mach-vt8500/devices.c
deleted file mode 100644
index 1fcdc36..0000000
--- a/arch/arm/mach-vt8500/devices.c
+++ /dev/null
@@ -1,270 +0,0 @@
-/* linux/arch/arm/mach-vt8500/devices.c
- *
- * Copyright (C) 2010 Alexey Charkov <alchark-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- */
-
-#include <linux/kernel.h>
-#include <linux/io.h>
-#include <linux/device.h>
-#include <linux/dma-mapping.h>
-#include <linux/platform_device.h>
-#include <linux/pwm_backlight.h>
-#include <linux/memblock.h>
-
-#include <asm/mach/arch.h>
-
-#include <mach/vt8500fb.h>
-#include <mach/i8042.h>
-#include "devices.h"
-
-/* These can't use resources currently */
-unsigned long wmt_ic_base __initdata;
-unsigned long wmt_sic_base __initdata;
-unsigned long wmt_gpio_base __initdata;
-unsigned long wmt_pmc_base __initdata;
-unsigned long wmt_i8042_base __initdata;
-
-int wmt_nr_irqs __initdata;
-int wmt_timer_irq __initdata;
-int wmt_gpio_ext_irq[8] __initdata;
-
-/* Should remain accessible after init.
- * i8042 driver desperately calls for attention...
- */
-int wmt_i8042_kbd_irq;
-int wmt_i8042_aux_irq;
-
-static u64 fb_dma_mask = DMA_BIT_MASK(32);
-
-struct platform_device vt8500_device_lcdc = {
- .name = "vt8500-lcd",
- .id = 0,
- .dev = {
- .dma_mask = &fb_dma_mask,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- },
-};
-
-struct platform_device vt8500_device_wm8505_fb = {
- .name = "wm8505-fb",
- .id = 0,
-};
-
-/* Smallest to largest */
-static struct vt8500fb_platform_data panels[] = {
-#ifdef CONFIG_WMT_PANEL_800X480
-{
- .xres_virtual = 800,
- .yres_virtual = 480 * 2,
- .mode = {
- .name = "800x480",
- .xres = 800,
- .yres = 480,
- .left_margin = 88,
- .right_margin = 40,
- .upper_margin = 32,
- .lower_margin = 11,
- .hsync_len = 0,
- .vsync_len = 1,
- .vmode = FB_VMODE_NONINTERLACED,
- },
-},
-#endif
-#ifdef CONFIG_WMT_PANEL_800X600
-{
- .xres_virtual = 800,
- .yres_virtual = 600 * 2,
- .mode = {
- .name = "800x600",
- .xres = 800,
- .yres = 600,
- .left_margin = 88,
- .right_margin = 40,
- .upper_margin = 32,
- .lower_margin = 11,
- .hsync_len = 0,
- .vsync_len = 1,
- .vmode = FB_VMODE_NONINTERLACED,
- },
-},
-#endif
-#ifdef CONFIG_WMT_PANEL_1024X576
-{
- .xres_virtual = 1024,
- .yres_virtual = 576 * 2,
- .mode = {
- .name = "1024x576",
- .xres = 1024,
- .yres = 576,
- .left_margin = 40,
- .right_margin = 24,
- .upper_margin = 32,
- .lower_margin = 11,
- .hsync_len = 96,
- .vsync_len = 2,
- .vmode = FB_VMODE_NONINTERLACED,
- },
-},
-#endif
-#ifdef CONFIG_WMT_PANEL_1024X600
-{
- .xres_virtual = 1024,
- .yres_virtual = 600 * 2,
- .mode = {
- .name = "1024x600",
- .xres = 1024,
- .yres = 600,
- .left_margin = 66,
- .right_margin = 2,
- .upper_margin = 19,
- .lower_margin = 1,
- .hsync_len = 23,
- .vsync_len = 8,
- .vmode = FB_VMODE_NONINTERLACED,
- },
-},
-#endif
-};
-
-static int current_panel_idx __initdata = ARRAY_SIZE(panels) - 1;
-
-static int __init panel_setup(char *str)
-{
- int i;
-
- for (i = 0; i < ARRAY_SIZE(panels); i++) {
- if (strcmp(panels[i].mode.name, str) == 0) {
- current_panel_idx = i;
- break;
- }
- }
- return 0;
-}
-
-early_param("panel", panel_setup);
-
-static inline void preallocate_fb(struct vt8500fb_platform_data *p,
- unsigned long align) {
- p->video_mem_len = (p->xres_virtual * p->yres_virtual * 4) >>
- (p->bpp > 16 ? 0 : (p->bpp > 8 ? 1 :
- (8 / p->bpp) + 1));
- p->video_mem_phys = (unsigned long)memblock_alloc(p->video_mem_len,
- align);
- p->video_mem_virt = phys_to_virt(p->video_mem_phys);
-}
-
-struct platform_device vt8500_device_uart0 = {
- .name = "vt8500_serial",
- .id = 0,
-};
-
-struct platform_device vt8500_device_uart1 = {
- .name = "vt8500_serial",
- .id = 1,
-};
-
-struct platform_device vt8500_device_uart2 = {
- .name = "vt8500_serial",
- .id = 2,
-};
-
-struct platform_device vt8500_device_uart3 = {
- .name = "vt8500_serial",
- .id = 3,
-};
-
-struct platform_device vt8500_device_uart4 = {
- .name = "vt8500_serial",
- .id = 4,
-};
-
-struct platform_device vt8500_device_uart5 = {
- .name = "vt8500_serial",
- .id = 5,
-};
-
-static u64 ehci_dma_mask = DMA_BIT_MASK(32);
-
-struct platform_device vt8500_device_ehci = {
- .name = "vt8500-ehci",
- .id = 0,
- .dev = {
- .dma_mask = &ehci_dma_mask,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- },
-};
-
-struct platform_device vt8500_device_ge_rops = {
- .name = "wmt_ge_rops",
- .id = -1,
-};
-
-struct platform_device vt8500_device_pwm = {
- .name = "vt8500-pwm",
- .id = 0,
-};
-
-static struct platform_pwm_backlight_data vt8500_pwmbl_data = {
- .pwm_id = 0,
- .max_brightness = 128,
- .dft_brightness = 70,
- .pwm_period_ns = 250000, /* revisit when clocks are implemented */
-};
-
-struct platform_device vt8500_device_pwmbl = {
- .name = "pwm-backlight",
- .id = 0,
- .dev = {
- .platform_data = &vt8500_pwmbl_data,
- },
-};
-
-struct platform_device vt8500_device_rtc = {
- .name = "vt8500-rtc",
- .id = 0,
-};
-
-struct map_desc wmt_io_desc[] __initdata = {
- /* SoC MMIO registers */
- [0] = {
- .virtual = 0xf8000000,
- .pfn = __phys_to_pfn(0xd8000000),
- .length = 0x00390000, /* max of all chip variants */
- .type = MT_DEVICE
- },
- /* PCI I/O space, numbers tied to those in <mach/io.h> */
- [1] = {
- .virtual = 0xf0000000,
- .pfn = __phys_to_pfn(0xc0000000),
- .length = SZ_64K,
- .type = MT_DEVICE
- },
-};
-
-void __init vt8500_reserve_mem(void)
-{
-#ifdef CONFIG_FB_VT8500
- panels[current_panel_idx].bpp = 16; /* Always use RGB565 */
- preallocate_fb(&panels[current_panel_idx], SZ_4M);
- vt8500_device_lcdc.dev.platform_data = &panels[current_panel_idx];
-#endif
-}
-
-void __init wm8505_reserve_mem(void)
-{
-#if defined CONFIG_FB_WM8505
- panels[current_panel_idx].bpp = 32; /* Always use RGB888 */
- preallocate_fb(&panels[current_panel_idx], 32);
- vt8500_device_wm8505_fb.dev.platform_data = &panels[current_panel_idx];
-#endif
-}
diff --git a/arch/arm/mach-vt8500/devices.h b/arch/arm/mach-vt8500/devices.h
deleted file mode 100644
index 188d4e1..0000000
--- a/arch/arm/mach-vt8500/devices.h
+++ /dev/null
@@ -1,88 +0,0 @@
-/* linux/arch/arm/mach-vt8500/devices.h
- *
- * Copyright (C) 2010 Alexey Charkov <alchark-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- */
-
-#ifndef __ARCH_ARM_MACH_VT8500_DEVICES_H
-#define __ARCH_ARM_MACH_VT8500_DEVICES_H
-
-#include <linux/platform_device.h>
-#include <asm/mach/map.h>
-
-void __init vt8500_init_irq(void);
-void __init wm8505_init_irq(void);
-void __init vt8500_map_io(void);
-void __init wm8505_map_io(void);
-void __init vt8500_reserve_mem(void);
-void __init wm8505_reserve_mem(void);
-void __init vt8500_gpio_init(void);
-void __init vt8500_set_resources(void);
-void __init wm8505_set_resources(void);
-
-extern unsigned long wmt_ic_base __initdata;
-extern unsigned long wmt_sic_base __initdata;
-extern unsigned long wmt_gpio_base __initdata;
-extern unsigned long wmt_pmc_base __initdata;
-
-extern int wmt_nr_irqs __initdata;
-extern int wmt_timer_irq __initdata;
-extern int wmt_gpio_ext_irq[8] __initdata;
-
-extern struct map_desc wmt_io_desc[2] __initdata;
-
-static inline struct resource wmt_mmio_res(u32 start, u32 size)
-{
- struct resource tmp = {
- .flags = IORESOURCE_MEM,
- .start = start,
- .end = start + size - 1,
- };
-
- return tmp;
-}
-
-static inline struct resource wmt_irq_res(int irq)
-{
- struct resource tmp = {
- .flags = IORESOURCE_IRQ,
- .start = irq,
- .end = irq,
- };
-
- return tmp;
-}
-
-static inline void wmt_res_add(struct platform_device *pdev,
- const struct resource *res, unsigned int num)
-{
- if (unlikely(platform_device_add_resources(pdev, res, num)))
- pr_err("Failed to assign resources\n");
-}
-
-extern struct sys_timer vt8500_timer;
-
-extern struct platform_device vt8500_device_uart0;
-extern struct platform_device vt8500_device_uart1;
-extern struct platform_device vt8500_device_uart2;
-extern struct platform_device vt8500_device_uart3;
-extern struct platform_device vt8500_device_uart4;
-extern struct platform_device vt8500_device_uart5;
-
-extern struct platform_device vt8500_device_lcdc;
-extern struct platform_device vt8500_device_wm8505_fb;
-extern struct platform_device vt8500_device_ehci;
-extern struct platform_device vt8500_device_ge_rops;
-extern struct platform_device vt8500_device_pwm;
-extern struct platform_device vt8500_device_pwmbl;
-extern struct platform_device vt8500_device_rtc;
-#endif
diff --git a/arch/arm/mach-vt8500/gpio.c b/arch/arm/mach-vt8500/gpio.c
deleted file mode 100644
index 2bcc0ec..0000000
--- a/arch/arm/mach-vt8500/gpio.c
+++ /dev/null
@@ -1,240 +0,0 @@
-/* linux/arch/arm/mach-vt8500/gpio.c
- *
- * Copyright (C) 2010 Alexey Charkov <alchark-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- */
-
-#include <linux/gpio.h>
-#include <linux/init.h>
-#include <linux/irq.h>
-#include <linux/io.h>
-
-#include "devices.h"
-
-#define to_vt8500(__chip) container_of(__chip, struct vt8500_gpio_chip, chip)
-
-#define ENABLE_REGS 0x0
-#define DIRECTION_REGS 0x20
-#define OUTVALUE_REGS 0x40
-#define INVALUE_REGS 0x60
-
-#define EXT_REGOFF 0x1c
-
-static void __iomem *regbase;
-
-struct vt8500_gpio_chip {
- struct gpio_chip chip;
- unsigned int shift;
- unsigned int regoff;
-};
-
-static int gpio_to_irq_map[8];
-
-static int vt8500_muxed_gpio_request(struct gpio_chip *chip,
- unsigned offset)
-{
- struct vt8500_gpio_chip *vt8500_chip = to_vt8500(chip);
- unsigned val = readl(regbase + ENABLE_REGS + vt8500_chip->regoff);
-
- val |= (1 << vt8500_chip->shift << offset);
- writel(val, regbase + ENABLE_REGS + vt8500_chip->regoff);
-
- return 0;
-}
-
-static void vt8500_muxed_gpio_free(struct gpio_chip *chip,
- unsigned offset)
-{
- struct vt8500_gpio_chip *vt8500_chip = to_vt8500(chip);
- unsigned val = readl(regbase + ENABLE_REGS + vt8500_chip->regoff);
-
- val &= ~(1 << vt8500_chip->shift << offset);
- writel(val, regbase + ENABLE_REGS + vt8500_chip->regoff);
-}
-
-static int vt8500_muxed_gpio_direction_input(struct gpio_chip *chip,
- unsigned offset)
-{
- struct vt8500_gpio_chip *vt8500_chip = to_vt8500(chip);
- unsigned val = readl(regbase + DIRECTION_REGS + vt8500_chip->regoff);
-
- val &= ~(1 << vt8500_chip->shift << offset);
- writel(val, regbase + DIRECTION_REGS + vt8500_chip->regoff);
-
- return 0;
-}
-
-static int vt8500_muxed_gpio_direction_output(struct gpio_chip *chip,
- unsigned offset, int value)
-{
- struct vt8500_gpio_chip *vt8500_chip = to_vt8500(chip);
- unsigned val = readl(regbase + DIRECTION_REGS + vt8500_chip->regoff);
-
- val |= (1 << vt8500_chip->shift << offset);
- writel(val, regbase + DIRECTION_REGS + vt8500_chip->regoff);
-
- if (value) {
- val = readl(regbase + OUTVALUE_REGS + vt8500_chip->regoff);
- val |= (1 << vt8500_chip->shift << offset);
- writel(val, regbase + OUTVALUE_REGS + vt8500_chip->regoff);
- }
- return 0;
-}
-
-static int vt8500_muxed_gpio_get_value(struct gpio_chip *chip,
- unsigned offset)
-{
- struct vt8500_gpio_chip *vt8500_chip = to_vt8500(chip);
-
- return (readl(regbase + INVALUE_REGS + vt8500_chip->regoff)
- >> vt8500_chip->shift >> offset) & 1;
-}
-
-static void vt8500_muxed_gpio_set_value(struct gpio_chip *chip,
- unsigned offset, int value)
-{
- struct vt8500_gpio_chip *vt8500_chip = to_vt8500(chip);
- unsigned val = readl(regbase + INVALUE_REGS + vt8500_chip->regoff);
-
- if (value)
- val |= (1 << vt8500_chip->shift << offset);
- else
- val &= ~(1 << vt8500_chip->shift << offset);
-
- writel(val, regbase + INVALUE_REGS + vt8500_chip->regoff);
-}
-
-#define VT8500_GPIO_BANK(__name, __shift, __off, __base, __num) \
-{ \
- .chip = { \
- .label = __name, \
- .request = vt8500_muxed_gpio_request, \
- .free = vt8500_muxed_gpio_free, \
- .direction_input = vt8500_muxed_gpio_direction_input, \
- .direction_output = vt8500_muxed_gpio_direction_output, \
- .get = vt8500_muxed_gpio_get_value, \
- .set = vt8500_muxed_gpio_set_value, \
- .can_sleep = 0, \
- .base = __base, \
- .ngpio = __num, \
- }, \
- .shift = __shift, \
- .regoff = __off, \
-}
-
-static struct vt8500_gpio_chip vt8500_muxed_gpios[] = {
- VT8500_GPIO_BANK("uart0", 0, 0x0, 8, 4),
- VT8500_GPIO_BANK("uart1", 4, 0x0, 12, 4),
- VT8500_GPIO_BANK("spi0", 8, 0x0, 16, 4),
- VT8500_GPIO_BANK("spi1", 12, 0x0, 20, 4),
- VT8500_GPIO_BANK("spi2", 16, 0x0, 24, 4),
- VT8500_GPIO_BANK("pwmout", 24, 0x0, 28, 2),
-
- VT8500_GPIO_BANK("sdmmc", 0, 0x4, 30, 11),
- VT8500_GPIO_BANK("ms", 16, 0x4, 41, 7),
- VT8500_GPIO_BANK("i2c0", 24, 0x4, 48, 2),
- VT8500_GPIO_BANK("i2c1", 26, 0x4, 50, 2),
-
- VT8500_GPIO_BANK("mii", 0, 0x8, 52, 20),
- VT8500_GPIO_BANK("see", 20, 0x8, 72, 4),
- VT8500_GPIO_BANK("ide", 24, 0x8, 76, 7),
-
- VT8500_GPIO_BANK("ccir", 0, 0xc, 83, 19),
-
- VT8500_GPIO_BANK("ts", 8, 0x10, 102, 11),
-
- VT8500_GPIO_BANK("lcd", 0, 0x14, 113, 23),
-};
-
-static int vt8500_gpio_direction_input(struct gpio_chip *chip,
- unsigned offset)
-{
- unsigned val = readl(regbase + DIRECTION_REGS + EXT_REGOFF);
-
- val &= ~(1 << offset);
- writel(val, regbase + DIRECTION_REGS + EXT_REGOFF);
- return 0;
-}
-
-static int vt8500_gpio_direction_output(struct gpio_chip *chip,
- unsigned offset, int value)
-{
- unsigned val = readl(regbase + DIRECTION_REGS + EXT_REGOFF);
-
- val |= (1 << offset);
- writel(val, regbase + DIRECTION_REGS + EXT_REGOFF);
-
- if (value) {
- val = readl(regbase + OUTVALUE_REGS + EXT_REGOFF);
- val |= (1 << offset);
- writel(val, regbase + OUTVALUE_REGS + EXT_REGOFF);
- }
- return 0;
-}
-
-static int vt8500_gpio_get_value(struct gpio_chip *chip,
- unsigned offset)
-{
- return (readl(regbase + INVALUE_REGS + EXT_REGOFF) >> offset) & 1;
-}
-
-static void vt8500_gpio_set_value(struct gpio_chip *chip,
- unsigned offset, int value)
-{
- unsigned val = readl(regbase + OUTVALUE_REGS + EXT_REGOFF);
-
- if (value)
- val |= (1 << offset);
- else
- val &= ~(1 << offset);
-
- writel(val, regbase + OUTVALUE_REGS + EXT_REGOFF);
-}
-
-static int vt8500_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
-{
- if (offset > 7)
- return -EINVAL;
-
- return gpio_to_irq_map[offset];
-}
-
-static struct gpio_chip vt8500_external_gpios = {
- .label = "extgpio",
- .direction_input = vt8500_gpio_direction_input,
- .direction_output = vt8500_gpio_direction_output,
- .get = vt8500_gpio_get_value,
- .set = vt8500_gpio_set_value,
- .to_irq = vt8500_gpio_to_irq,
- .can_sleep = 0,
- .base = 0,
- .ngpio = 8,
-};
-
-void __init vt8500_gpio_init(void)
-{
- int i;
-
- for (i = 0; i < 8; i++)
- gpio_to_irq_map[i] = wmt_gpio_ext_irq[i];
-
- regbase = ioremap(wmt_gpio_base, SZ_64K);
- if (!regbase) {
- printk(KERN_ERR "Failed to map MMIO registers for GPIO\n");
- return;
- }
-
- gpiochip_add(&vt8500_external_gpios);
-
- for (i = 0; i < ARRAY_SIZE(vt8500_muxed_gpios); i++)
- gpiochip_add(&vt8500_muxed_gpios[i].chip);
-}
diff --git a/arch/arm/mach-vt8500/include/mach/restart.h b/arch/arm/mach-vt8500/include/mach/restart.h
index 89f9b78..7389795 100644
--- a/arch/arm/mach-vt8500/include/mach/restart.h
+++ b/arch/arm/mach-vt8500/include/mach/restart.h
@@ -13,5 +13,5 @@
*
*/
-void wmt_setup_restart(void);
-void wmt_restart(char mode, const char *cmd);
+void vt8500_setup_restart(void);
+void vt8500_restart(char mode, const char *cmd);
diff --git a/arch/arm/mach-vt8500/include/mach/vt8500_irqs.h b/arch/arm/mach-vt8500/include/mach/vt8500_irqs.h
deleted file mode 100644
index ecfee91..0000000
--- a/arch/arm/mach-vt8500/include/mach/vt8500_irqs.h
+++ /dev/null
@@ -1,88 +0,0 @@
-/*
- * arch/arm/mach-vt8500/include/mach/vt8500_irqs.h
- *
- * Copyright (C) 2010 Alexey Charkov <alchark-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-
-/* VT8500 Interrupt Sources */
-
-#define IRQ_JPEGENC 0 /* JPEG Encoder */
-#define IRQ_JPEGDEC 1 /* JPEG Decoder */
- /* Reserved */
-#define IRQ_PATA 3 /* PATA Controller */
- /* Reserved */
-#define IRQ_DMA 5 /* DMA Controller */
-#define IRQ_EXT0 6 /* External Interrupt 0 */
-#define IRQ_EXT1 7 /* External Interrupt 1 */
-#define IRQ_GE 8 /* Graphic Engine */
-#define IRQ_GOV 9 /* Graphic Overlay Engine */
-#define IRQ_ETHER 10 /* Ethernet MAC */
-#define IRQ_MPEGTS 11 /* Transport Stream Interface */
-#define IRQ_LCDC 12 /* LCD Controller */
-#define IRQ_EXT2 13 /* External Interrupt 2 */
-#define IRQ_EXT3 14 /* External Interrupt 3 */
-#define IRQ_EXT4 15 /* External Interrupt 4 */
-#define IRQ_CIPHER 16 /* Cipher */
-#define IRQ_VPP 17 /* Video Post-Processor */
-#define IRQ_I2C1 18 /* I2C 1 */
-#define IRQ_I2C0 19 /* I2C 0 */
-#define IRQ_SDMMC 20 /* SD/MMC Controller */
-#define IRQ_SDMMC_DMA 21 /* SD/MMC Controller DMA */
-#define IRQ_PMC_WU 22 /* Power Management Controller Wakeup */
- /* Reserved */
-#define IRQ_SPI0 24 /* SPI 0 */
-#define IRQ_SPI1 25 /* SPI 1 */
-#define IRQ_SPI2 26 /* SPI 2 */
-#define IRQ_LCDDF 27 /* LCD Data Formatter */
-#define IRQ_NAND 28 /* NAND Flash Controller */
-#define IRQ_NAND_DMA 29 /* NAND Flash Controller DMA */
-#define IRQ_MS 30 /* MemoryStick Controller */
-#define IRQ_MS_DMA 31 /* MemoryStick Controller DMA */
-#define IRQ_UART0 32 /* UART 0 */
-#define IRQ_UART1 33 /* UART 1 */
-#define IRQ_I2S 34 /* I2S */
-#define IRQ_PCM 35 /* PCM */
-#define IRQ_PMCOS0 36 /* PMC OS Timer 0 */
-#define IRQ_PMCOS1 37 /* PMC OS Timer 1 */
-#define IRQ_PMCOS2 38 /* PMC OS Timer 2 */
-#define IRQ_PMCOS3 39 /* PMC OS Timer 3 */
-#define IRQ_VPU 40 /* Video Processing Unit */
-#define IRQ_VID 41 /* Video Digital Input Interface */
-#define IRQ_AC97 42 /* AC97 Interface */
-#define IRQ_EHCI 43 /* USB */
-#define IRQ_NOR 44 /* NOR Flash Controller */
-#define IRQ_PS2MOUSE 45 /* PS/2 Mouse */
-#define IRQ_PS2KBD 46 /* PS/2 Keyboard */
-#define IRQ_UART2 47 /* UART 2 */
-#define IRQ_RTC 48 /* RTC Interrupt */
-#define IRQ_RTCSM 49 /* RTC Second/Minute Update Interrupt */
-#define IRQ_UART3 50 /* UART 3 */
-#define IRQ_ADC 51 /* ADC */
-#define IRQ_EXT5 52 /* External Interrupt 5 */
-#define IRQ_EXT6 53 /* External Interrupt 6 */
-#define IRQ_EXT7 54 /* External Interrupt 7 */
-#define IRQ_CIR 55 /* CIR */
-#define IRQ_DMA0 56 /* DMA Channel 0 */
-#define IRQ_DMA1 57 /* DMA Channel 1 */
-#define IRQ_DMA2 58 /* DMA Channel 2 */
-#define IRQ_DMA3 59 /* DMA Channel 3 */
-#define IRQ_DMA4 60 /* DMA Channel 4 */
-#define IRQ_DMA5 61 /* DMA Channel 5 */
-#define IRQ_DMA6 62 /* DMA Channel 6 */
-#define IRQ_DMA7 63 /* DMA Channel 7 */
-
-#define VT8500_NR_IRQS 64
diff --git a/arch/arm/mach-vt8500/include/mach/vt8500_regs.h b/arch/arm/mach-vt8500/include/mach/vt8500_regs.h
deleted file mode 100644
index 29c63ec..0000000
--- a/arch/arm/mach-vt8500/include/mach/vt8500_regs.h
+++ /dev/null
@@ -1,79 +0,0 @@
-/*
- * arch/arm/mach-vt8500/include/mach/vt8500_regs.h
- *
- * Copyright (C) 2010 Alexey Charkov <alchark-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#ifndef __ASM_ARM_ARCH_VT8500_REGS_H
-#define __ASM_ARM_ARCH_VT8500_REGS_H
-
-/* VT8500 Registers Map */
-
-#define VT8500_REGS_START_PHYS 0xd8000000 /* Start of MMIO registers */
-#define VT8500_REGS_START_VIRT 0xf8000000 /* Virtual mapping start */
-
-#define VT8500_DDR_BASE 0xd8000000 /* 1k DDR/DDR2 Memory
- Controller */
-#define VT8500_DMA_BASE 0xd8001000 /* 1k DMA Controller */
-#define VT8500_SFLASH_BASE 0xd8002000 /* 1k Serial Flash Memory
- Controller */
-#define VT8500_ETHER_BASE 0xd8004000 /* 1k Ethernet MAC 0 */
-#define VT8500_CIPHER_BASE 0xd8006000 /* 4k Cipher */
-#define VT8500_USB_BASE 0xd8007800 /* 2k USB OTG */
-# define VT8500_EHCI_BASE 0xd8007900 /* EHCI */
-# define VT8500_UHCI_BASE 0xd8007b01 /* UHCI */
-#define VT8500_PATA_BASE 0xd8008000 /* 512 PATA */
-#define VT8500_PS2_BASE 0xd8008800 /* 1k PS/2 */
-#define VT8500_NAND_BASE 0xd8009000 /* 1k NAND Controller */
-#define VT8500_NOR_BASE 0xd8009400 /* 1k NOR Controller */
-#define VT8500_SDMMC_BASE 0xd800a000 /* 1k SD/MMC Controller */
-#define VT8500_MS_BASE 0xd800b000 /* 1k MS/MSPRO Controller */
-#define VT8500_LCDC_BASE 0xd800e400 /* 1k LCD Controller */
-#define VT8500_VPU_BASE 0xd8050000 /* 256 VPU */
-#define VT8500_GOV_BASE 0xd8050300 /* 256 GOV */
-#define VT8500_GEGEA_BASE 0xd8050400 /* 768 GE/GE Alpha Mixing */
-#define VT8500_LCDF_BASE 0xd8050900 /* 256 LCD Formatter */
-#define VT8500_VID_BASE 0xd8050a00 /* 256 VID */
-#define VT8500_VPP_BASE 0xd8050b00 /* 256 VPP */
-#define VT8500_TSBK_BASE 0xd80f4000 /* 4k TSBK */
-#define VT8500_JPEGDEC_BASE 0xd80fe000 /* 4k JPEG Decoder */
-#define VT8500_JPEGENC_BASE 0xd80ff000 /* 4k JPEG Encoder */
-#define VT8500_RTC_BASE 0xd8100000 /* 64k RTC */
-#define VT8500_GPIO_BASE 0xd8110000 /* 64k GPIO Configuration */
-#define VT8500_SCC_BASE 0xd8120000 /* 64k System Configuration*/
-#define VT8500_PMC_BASE 0xd8130000 /* 64k PMC Configuration */
-#define VT8500_IC_BASE 0xd8140000 /* 64k Interrupt Controller*/
-#define VT8500_UART0_BASE 0xd8200000 /* 64k UART 0 */
-#define VT8500_UART2_BASE 0xd8210000 /* 64k UART 2 */
-#define VT8500_PWM_BASE 0xd8220000 /* 64k PWM Configuration */
-#define VT8500_SPI0_BASE 0xd8240000 /* 64k SPI 0 */
-#define VT8500_SPI1_BASE 0xd8250000 /* 64k SPI 1 */
-#define VT8500_CIR_BASE 0xd8270000 /* 64k CIR */
-#define VT8500_I2C0_BASE 0xd8280000 /* 64k I2C 0 */
-#define VT8500_AC97_BASE 0xd8290000 /* 64k AC97 */
-#define VT8500_SPI2_BASE 0xd82a0000 /* 64k SPI 2 */
-#define VT8500_UART1_BASE 0xd82b0000 /* 64k UART 1 */
-#define VT8500_UART3_BASE 0xd82c0000 /* 64k UART 3 */
-#define VT8500_PCM_BASE 0xd82d0000 /* 64k PCM */
-#define VT8500_I2C1_BASE 0xd8320000 /* 64k I2C 1 */
-#define VT8500_I2S_BASE 0xd8330000 /* 64k I2S */
-#define VT8500_ADC_BASE 0xd8340000 /* 64k ADC */
-
-#define VT8500_REGS_END_PHYS 0xd834ffff /* End of MMIO registers */
-#define VT8500_REGS_LENGTH (VT8500_REGS_END_PHYS \
- - VT8500_REGS_START_PHYS + 1)
-
-#endif
diff --git a/arch/arm/mach-vt8500/include/mach/wm8505_irqs.h b/arch/arm/mach-vt8500/include/mach/wm8505_irqs.h
deleted file mode 100644
index 6128627..0000000
--- a/arch/arm/mach-vt8500/include/mach/wm8505_irqs.h
+++ /dev/null
@@ -1,115 +0,0 @@
-/*
- * arch/arm/mach-vt8500/include/mach/wm8505_irqs.h
- *
- * Copyright (C) 2010 Alexey Charkov <alchark-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-
-/* WM8505 Interrupt Sources */
-
-#define IRQ_UHCI 0 /* UHC FS (UHCI?) */
-#define IRQ_EHCI 1 /* UHC HS */
-#define IRQ_UDCDMA 2 /* UDC DMA */
- /* Reserved */
-#define IRQ_PS2MOUSE 4 /* PS/2 Mouse */
-#define IRQ_UDC 5 /* UDC */
-#define IRQ_EXT0 6 /* External Interrupt 0 */
-#define IRQ_EXT1 7 /* External Interrupt 1 */
-#define IRQ_KEYPAD 8 /* Keypad */
-#define IRQ_DMA 9 /* DMA Controller */
-#define IRQ_ETHER 10 /* Ethernet MAC */
- /* Reserved */
- /* Reserved */
-#define IRQ_EXT2 13 /* External Interrupt 2 */
-#define IRQ_EXT3 14 /* External Interrupt 3 */
-#define IRQ_EXT4 15 /* External Interrupt 4 */
-#define IRQ_APB 16 /* APB Bridge */
-#define IRQ_DMA0 17 /* DMA Channel 0 */
-#define IRQ_I2C1 18 /* I2C 1 */
-#define IRQ_I2C0 19 /* I2C 0 */
-#define IRQ_SDMMC 20 /* SD/MMC Controller */
-#define IRQ_SDMMC_DMA 21 /* SD/MMC Controller DMA */
-#define IRQ_PMC_WU 22 /* Power Management Controller Wakeup */
-#define IRQ_PS2KBD 23 /* PS/2 Keyboard */
-#define IRQ_SPI0 24 /* SPI 0 */
-#define IRQ_SPI1 25 /* SPI 1 */
-#define IRQ_SPI2 26 /* SPI 2 */
-#define IRQ_DMA1 27 /* DMA Channel 1 */
-#define IRQ_NAND 28 /* NAND Flash Controller */
-#define IRQ_NAND_DMA 29 /* NAND Flash Controller DMA */
-#define IRQ_UART5 30 /* UART 5 */
-#define IRQ_UART4 31 /* UART 4 */
-#define IRQ_UART0 32 /* UART 0 */
-#define IRQ_UART1 33 /* UART 1 */
-#define IRQ_DMA2 34 /* DMA Channel 2 */
-#define IRQ_I2S 35 /* I2S */
-#define IRQ_PMCOS0 36 /* PMC OS Timer 0 */
-#define IRQ_PMCOS1 37 /* PMC OS Timer 1 */
-#define IRQ_PMCOS2 38 /* PMC OS Timer 2 */
-#define IRQ_PMCOS3 39 /* PMC OS Timer 3 */
-#define IRQ_DMA3 40 /* DMA Channel 3 */
-#define IRQ_DMA4 41 /* DMA Channel 4 */
-#define IRQ_AC97 42 /* AC97 Interface */
- /* Reserved */
-#define IRQ_NOR 44 /* NOR Flash Controller */
-#define IRQ_DMA5 45 /* DMA Channel 5 */
-#define IRQ_DMA6 46 /* DMA Channel 6 */
-#define IRQ_UART2 47 /* UART 2 */
-#define IRQ_RTC 48 /* RTC Interrupt */
-#define IRQ_RTCSM 49 /* RTC Second/Minute Update Interrupt */
-#define IRQ_UART3 50 /* UART 3 */
-#define IRQ_DMA7 51 /* DMA Channel 7 */
-#define IRQ_EXT5 52 /* External Interrupt 5 */
-#define IRQ_EXT6 53 /* External Interrupt 6 */
-#define IRQ_EXT7 54 /* External Interrupt 7 */
-#define IRQ_CIR 55 /* CIR */
-#define IRQ_SIC0 56 /* SIC IRQ0 */
-#define IRQ_SIC1 57 /* SIC IRQ1 */
-#define IRQ_SIC2 58 /* SIC IRQ2 */
-#define IRQ_SIC3 59 /* SIC IRQ3 */
-#define IRQ_SIC4 60 /* SIC IRQ4 */
-#define IRQ_SIC5 61 /* SIC IRQ5 */
-#define IRQ_SIC6 62 /* SIC IRQ6 */
-#define IRQ_SIC7 63 /* SIC IRQ7 */
- /* Reserved */
-#define IRQ_JPEGDEC 65 /* JPEG Decoder */
-#define IRQ_SAE 66 /* SAE (?) */
- /* Reserved */
-#define IRQ_VPU 79 /* Video Processing Unit */
-#define IRQ_VPP 80 /* Video Post-Processor */
-#define IRQ_VID 81 /* Video Digital Input Interface */
-#define IRQ_SPU 82 /* SPU (?) */
-#define IRQ_PIP 83 /* PIP Error */
-#define IRQ_GE 84 /* Graphic Engine */
-#define IRQ_GOV 85 /* Graphic Overlay Engine */
-#define IRQ_DVO 86 /* Digital Video Output */
- /* Reserved */
-#define IRQ_DMA8 92 /* DMA Channel 8 */
-#define IRQ_DMA9 93 /* DMA Channel 9 */
-#define IRQ_DMA10 94 /* DMA Channel 10 */
-#define IRQ_DMA11 95 /* DMA Channel 11 */
-#define IRQ_DMA12 96 /* DMA Channel 12 */
-#define IRQ_DMA13 97 /* DMA Channel 13 */
-#define IRQ_DMA14 98 /* DMA Channel 14 */
-#define IRQ_DMA15 99 /* DMA Channel 15 */
- /* Reserved */
-#define IRQ_GOVW 111 /* GOVW (?) */
-#define IRQ_GOVRSDSCD 112 /* GOVR SDSCD (?) */
-#define IRQ_GOVRSDMIF 113 /* GOVR SDMIF (?) */
-#define IRQ_GOVRHDSCD 114 /* GOVR HDSCD (?) */
-#define IRQ_GOVRHDMIF 115 /* GOVR HDMIF (?) */
-
-#define WM8505_NR_IRQS 116
diff --git a/arch/arm/mach-vt8500/include/mach/wm8505_regs.h b/arch/arm/mach-vt8500/include/mach/wm8505_regs.h
deleted file mode 100644
index df15509..0000000
--- a/arch/arm/mach-vt8500/include/mach/wm8505_regs.h
+++ /dev/null
@@ -1,78 +0,0 @@
-/*
- * arch/arm/mach-vt8500/include/mach/wm8505_regs.h
- *
- * Copyright (C) 2010 Alexey Charkov <alchark-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#ifndef __ASM_ARM_ARCH_WM8505_REGS_H
-#define __ASM_ARM_ARCH_WM8505_REGS_H
-
-/* WM8505 Registers Map */
-
-#define WM8505_REGS_START_PHYS 0xd8000000 /* Start of MMIO registers */
-#define WM8505_REGS_START_VIRT 0xf8000000 /* Virtual mapping start */
-
-#define WM8505_DDR_BASE 0xd8000400 /* 1k DDR/DDR2 Memory
- Controller */
-#define WM8505_DMA_BASE 0xd8001800 /* 1k DMA Controller */
-#define WM8505_VDMA_BASE 0xd8001c00 /* 1k VDMA */
-#define WM8505_SFLASH_BASE 0xd8002000 /* 1k Serial Flash Memory
- Controller */
-#define WM8505_ETHER_BASE 0xd8004000 /* 1k Ethernet MAC 0 */
-#define WM8505_CIPHER_BASE 0xd8006000 /* 4k Cipher */
-#define WM8505_USB_BASE 0xd8007000 /* 2k USB 2.0 Host */
-# define WM8505_EHCI_BASE 0xd8007100 /* EHCI */
-# define WM8505_UHCI_BASE 0xd8007301 /* UHCI */
-#define WM8505_PS2_BASE 0xd8008800 /* 1k PS/2 */
-#define WM8505_NAND_BASE 0xd8009000 /* 1k NAND Controller */
-#define WM8505_NOR_BASE 0xd8009400 /* 1k NOR Controller */
-#define WM8505_SDMMC_BASE 0xd800a000 /* 1k SD/MMC Controller */
-#define WM8505_VPU_BASE 0xd8050000 /* 256 VPU */
-#define WM8505_GOV_BASE 0xd8050300 /* 256 GOV */
-#define WM8505_GEGEA_BASE 0xd8050400 /* 768 GE/GE Alpha Mixing */
-#define WM8505_GOVR_BASE 0xd8050800 /* 512 GOVR (frambuffer) */
-#define WM8505_VID_BASE 0xd8050a00 /* 256 VID */
-#define WM8505_SCL_BASE 0xd8050d00 /* 256 SCL */
-#define WM8505_VPP_BASE 0xd8050f00 /* 256 VPP */
-#define WM8505_JPEGDEC_BASE 0xd80fe000 /* 4k JPEG Decoder */
-#define WM8505_RTC_BASE 0xd8100000 /* 64k RTC */
-#define WM8505_GPIO_BASE 0xd8110000 /* 64k GPIO Configuration */
-#define WM8505_SCC_BASE 0xd8120000 /* 64k System Configuration*/
-#define WM8505_PMC_BASE 0xd8130000 /* 64k PMC Configuration */
-#define WM8505_IC_BASE 0xd8140000 /* 64k Interrupt Controller*/
-#define WM8505_SIC_BASE 0xd8150000 /* 64k Secondary IC */
-#define WM8505_UART0_BASE 0xd8200000 /* 64k UART 0 */
-#define WM8505_UART2_BASE 0xd8210000 /* 64k UART 2 */
-#define WM8505_PWM_BASE 0xd8220000 /* 64k PWM Configuration */
-#define WM8505_SPI0_BASE 0xd8240000 /* 64k SPI 0 */
-#define WM8505_SPI1_BASE 0xd8250000 /* 64k SPI 1 */
-#define WM8505_KEYPAD_BASE 0xd8260000 /* 64k Keypad control */
-#define WM8505_CIR_BASE 0xd8270000 /* 64k CIR */
-#define WM8505_I2C0_BASE 0xd8280000 /* 64k I2C 0 */
-#define WM8505_AC97_BASE 0xd8290000 /* 64k AC97 */
-#define WM8505_SPI2_BASE 0xd82a0000 /* 64k SPI 2 */
-#define WM8505_UART1_BASE 0xd82b0000 /* 64k UART 1 */
-#define WM8505_UART3_BASE 0xd82c0000 /* 64k UART 3 */
-#define WM8505_I2C1_BASE 0xd8320000 /* 64k I2C 1 */
-#define WM8505_I2S_BASE 0xd8330000 /* 64k I2S */
-#define WM8505_UART4_BASE 0xd8370000 /* 64k UART 4 */
-#define WM8505_UART5_BASE 0xd8380000 /* 64k UART 5 */
-
-#define WM8505_REGS_END_PHYS 0xd838ffff /* End of MMIO registers */
-#define WM8505_REGS_LENGTH (WM8505_REGS_END_PHYS \
- - WM8505_REGS_START_PHYS + 1)
-
-#endif
diff --git a/arch/arm/mach-vt8500/irq.c b/arch/arm/mach-vt8500/irq.c
index 642de04..f8f9ab9 100644
--- a/arch/arm/mach-vt8500/irq.c
+++ b/arch/arm/mach-vt8500/irq.c
@@ -1,6 +1,7 @@
/*
* arch/arm/mach-vt8500/irq.c
*
+ * Copyright (C) 2012 Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org>
* Copyright (C) 2010 Alexey Charkov <alchark-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
*
* This program is free software; you can redistribute it and/or modify
@@ -18,81 +19,102 @@
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
+/*
+ * This file is copied and modified from the original irq.c provided by
+ * Alexey Charkov. Minor changes have been made for Device Tree Support.
+ */
+
+#include <linux/slab.h>
#include <linux/io.h>
#include <linux/irq.h>
+#include <linux/irqdomain.h>
#include <linux/interrupt.h>
+#include <linux/bitops.h>
+
+#include <linux/of.h>
+#include <linux/of_irq.h>
+#include <linux/of_address.h>
#include <asm/irq.h>
-#include "devices.h"
-#define VT8500_IC_DCTR 0x40 /* Destination control
- register, 64*u8 */
-#define VT8500_INT_ENABLE (1 << 3)
-#define VT8500_TRIGGER_HIGH (0 << 4)
-#define VT8500_TRIGGER_RISING (1 << 4)
-#define VT8500_TRIGGER_FALLING (2 << 4)
+#define VT8500_ICPC_IRQ 0x20
+#define VT8500_ICPC_FIQ 0x24
+#define VT8500_ICDC 0x40 /* Destination Control 64*u32 */
+#define VT8500_ICIS 0x80 /* Interrupt status, 16*u32 */
+
+/* ICPC */
+#define ICPC_MASK 0x3F
+#define ICPC_ROTATE BIT(6)
+
+/* IC_DCTR */
+#define ICDC_IRQ 0x00
+#define ICDC_FIQ 0x01
+#define ICDC_DSS0 0x02
+#define ICDC_DSS1 0x03
+#define ICDC_DSS2 0x04
+#define ICDC_DSS3 0x05
+#define ICDC_DSS4 0x06
+#define ICDC_DSS5 0x07
+
+#define VT8500_INT_DISABLE 0
+#define VT8500_INT_ENABLE BIT(3)
+
+#define VT8500_TRIGGER_HIGH 0
+#define VT8500_TRIGGER_RISING BIT(5)
+#define VT8500_TRIGGER_FALLING BIT(6)
#define VT8500_EDGE ( VT8500_TRIGGER_RISING \
| VT8500_TRIGGER_FALLING)
-#define VT8500_IC_STATUS 0x80 /* Interrupt status, 2*u32 */
-static void __iomem *ic_regbase;
-static void __iomem *sic_regbase;
+static int irq_cnt;
+
+struct vt8500_irq_priv {
+ void __iomem *base;
+};
static void vt8500_irq_mask(struct irq_data *d)
{
- void __iomem *base = ic_regbase;
- unsigned irq = d->irq;
+ struct vt8500_irq_priv *priv =
+ (struct vt8500_irq_priv *)(d->domain->host_data);
+ void __iomem *base = priv->base;
u8 edge;
- if (irq >= 64) {
- base = sic_regbase;
- irq -= 64;
- }
- edge = readb(base + VT8500_IC_DCTR + irq) & VT8500_EDGE;
+ edge = readb(base + VT8500_ICDC + d->hwirq) & VT8500_EDGE;
if (edge) {
- void __iomem *stat_reg = base + VT8500_IC_STATUS
- + (irq < 32 ? 0 : 4);
+ void __iomem *stat_reg = base + VT8500_ICIS
+ + (d->hwirq < 32 ? 0 : 4);
unsigned status = readl(stat_reg);
- status |= (1 << (irq & 0x1f));
+ status |= (1 << (d->hwirq & 0x1f));
writel(status, stat_reg);
} else {
- u8 dctr = readb(base + VT8500_IC_DCTR + irq);
+ u8 dctr = readb(base + VT8500_ICDC + d->hwirq);
dctr &= ~VT8500_INT_ENABLE;
- writeb(dctr, base + VT8500_IC_DCTR + irq);
+ writeb(dctr, base + VT8500_ICDC + d->hwirq);
}
}
static void vt8500_irq_unmask(struct irq_data *d)
{
- void __iomem *base = ic_regbase;
- unsigned irq = d->irq;
+ struct vt8500_irq_priv *priv =
+ (struct vt8500_irq_priv *)(d->domain->host_data);
+ void __iomem *base = priv->base;
u8 dctr;
- if (irq >= 64) {
- base = sic_regbase;
- irq -= 64;
- }
- dctr = readb(base + VT8500_IC_DCTR + irq);
+ dctr = readb(base + VT8500_ICDC + d->hwirq);
dctr |= VT8500_INT_ENABLE;
- writeb(dctr, base + VT8500_IC_DCTR + irq);
+ writeb(dctr, base + VT8500_ICDC + d->hwirq);
}
static int vt8500_irq_set_type(struct irq_data *d, unsigned int flow_type)
{
- void __iomem *base = ic_regbase;
- unsigned irq = d->irq;
- unsigned orig_irq = irq;
+ struct vt8500_irq_priv *priv =
+ (struct vt8500_irq_priv *)(d->domain->host_data);
+ void __iomem *base = priv->base;
u8 dctr;
- if (irq >= 64) {
- base = sic_regbase;
- irq -= 64;
- }
-
- dctr = readb(base + VT8500_IC_DCTR + irq);
+ dctr = readb(base + VT8500_ICDC + d->hwirq);
dctr &= ~VT8500_EDGE;
switch (flow_type) {
@@ -100,18 +122,18 @@ static int vt8500_irq_set_type(struct irq_data *d, unsigned int flow_type)
return -EINVAL;
case IRQF_TRIGGER_HIGH:
dctr |= VT8500_TRIGGER_HIGH;
- __irq_set_handler_locked(orig_irq, handle_level_irq);
+ __irq_set_handler_locked(d->irq, handle_level_irq);
break;
case IRQF_TRIGGER_FALLING:
dctr |= VT8500_TRIGGER_FALLING;
- __irq_set_handler_locked(orig_irq, handle_edge_irq);
+ __irq_set_handler_locked(d->irq, handle_edge_irq);
break;
case IRQF_TRIGGER_RISING:
dctr |= VT8500_TRIGGER_RISING;
- __irq_set_handler_locked(orig_irq, handle_edge_irq);
+ __irq_set_handler_locked(d->irq, handle_edge_irq);
break;
}
- writeb(dctr, base + VT8500_IC_DCTR + irq);
+ writeb(dctr, base + VT8500_ICDC + d->hwirq);
return 0;
}
@@ -124,57 +146,76 @@ static struct irq_chip vt8500_irq_chip = {
.irq_set_type = vt8500_irq_set_type,
};
-void __init vt8500_init_irq(void)
+static void __init vt8500_init_irq_hw(void __iomem *base)
{
unsigned int i;
- ic_regbase = ioremap(wmt_ic_base, SZ_64K);
+ /* Enable rotating priority for IRQ */
+ writel(ICPC_ROTATE, base + VT8500_ICPC_IRQ);
+ writel(0x00, base + VT8500_ICPC_FIQ);
- if (ic_regbase) {
- /* Enable rotating priority for IRQ */
- writel((1 << 6), ic_regbase + 0x20);
- writel(0, ic_regbase + 0x24);
+ for (i = 0; i < 64; i++) {
+ /* Disable all interrupts and route them to IRQ */
+ writeb(VT8500_INT_DISABLE | ICDC_IRQ,
+ base + VT8500_ICDC + i);
+ }
+}
- for (i = 0; i < wmt_nr_irqs; i++) {
- /* Disable all interrupts and route them to IRQ */
- writeb(0x00, ic_regbase + VT8500_IC_DCTR + i);
+static int vt8500_irq_map(struct irq_domain *h, unsigned int virq,
+ irq_hw_number_t hw)
+{
+ irq_set_chip_and_handler(virq, &vt8500_irq_chip, handle_level_irq);
+ set_irq_flags(virq, IRQF_VALID);
- irq_set_chip_and_handler(i, &vt8500_irq_chip,
- handle_level_irq);
- set_irq_flags(i, IRQF_VALID);
- }
- } else {
- printk(KERN_ERR "Unable to remap the Interrupt Controller registers, not enabling IRQs!\n");
- }
+ return 0;
}
-void __init wm8505_init_irq(void)
+static struct irq_domain_ops vt8500_irq_domain_ops = {
+ .map = vt8500_irq_map,
+ .xlate = irq_domain_xlate_onecell,
+};
+
+int __init vt8500_irq_init(struct device_node *node, struct device_node *parent)
{
- unsigned int i;
+ struct irq_domain *vt8500_irq_domain;
+ struct vt8500_irq_priv *priv;
+ int irq, i;
+ struct device_node *np = node;
+
+ priv = kzalloc(sizeof(struct vt8500_irq_priv), GFP_KERNEL);
+ priv->base = of_iomap(np, 0);
+
+ vt8500_irq_domain = irq_domain_add_legacy(node, 64, irq_cnt, 0,
+ &vt8500_irq_domain_ops, priv);
+ if (!vt8500_irq_domain)
+ pr_err("%s: Unable to add wmt irq domain!\n", __func__);
+
+ irq_set_default_host(vt8500_irq_domain);
+
+ vt8500_init_irq_hw(priv->base);
- ic_regbase = ioremap(wmt_ic_base, SZ_64K);
- sic_regbase = ioremap(wmt_sic_base, SZ_64K);
-
- if (ic_regbase && sic_regbase) {
- /* Enable rotating priority for IRQ */
- writel((1 << 6), ic_regbase + 0x20);
- writel(0, ic_regbase + 0x24);
- writel((1 << 6), sic_regbase + 0x20);
- writel(0, sic_regbase + 0x24);
-
- for (i = 0; i < wmt_nr_irqs; i++) {
- /* Disable all interrupts and route them to IRQ */
- if (i < 64)
- writeb(0x00, ic_regbase + VT8500_IC_DCTR + i);
- else
- writeb(0x00, sic_regbase + VT8500_IC_DCTR
- + i - 64);
-
- irq_set_chip_and_handler(i, &vt8500_irq_chip,
- handle_level_irq);
- set_irq_flags(i, IRQF_VALID);
+ pr_info("Added IRQ Controller @ %x [virq_base = %d]\n",
+ (u32)(priv->base), irq_cnt);
+
+ /* check if this is a slaved controller */
+ if (of_irq_count(np) != 0) {
+ /* check that we have the correct number of interrupts */
+ if (of_irq_count(np) != 8) {
+ pr_err("%s: Incorrect IRQ map for slave controller\n",
+ __func__);
+ return -EINVAL;
}
- } else {
- printk(KERN_ERR "Unable to remap the Interrupt Controller registers, not enabling IRQs!\n");
+
+ for (i = 0; i < 8; i++) {
+ irq = irq_of_parse_and_map(np, i);
+ enable_irq(irq);
+ }
+
+ pr_info("vt8500-irq: Enabled slave->parent interrupts\n");
}
+
+ irq_cnt += 64;
+
+ return 0;
}
+
diff --git a/arch/arm/mach-vt8500/restart.c b/arch/arm/mach-vt8500/restart.c
deleted file mode 100644
index 497e89a..0000000
--- a/arch/arm/mach-vt8500/restart.c
+++ /dev/null
@@ -1,54 +0,0 @@
-/* linux/arch/arm/mach-vt8500/restart.c
- *
- * Copyright (C) 2012 Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org>
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- */
-#include <asm/io.h>
-#include <linux/of.h>
-#include <linux/of_address.h>
-
-#define LEGACY_PMC_BASE 0xD8130000
-#define WMT_PRIZM_PMSR_REG 0x60
-
-static void __iomem *pmc_base;
-
-void wmt_setup_restart(void)
-{
- struct device_node *np;
-
- /*
- * Check if Power Mgmt Controller node is present in device tree. If no
- * device tree node, use the legacy PMSR value (valid for all current
- * SoCs).
- */
- np = of_find_compatible_node(NULL, NULL, "wmt,prizm-pmc");
- if (np) {
- pmc_base = of_iomap(np, 0);
-
- if (!pmc_base)
- pr_err("%s:of_iomap(pmc) failed\n", __func__);
-
- of_node_put(np);
- } else {
- pmc_base = ioremap(LEGACY_PMC_BASE, 0x1000);
- if (!pmc_base) {
- pr_err("%s:ioremap(rstc) failed\n", __func__);
- return;
- }
- }
-}
-
-void wmt_restart(char mode, const char *cmd)
-{
- if (pmc_base)
- writel(1, pmc_base + WMT_PRIZM_PMSR_REG);
-}
diff --git a/arch/arm/mach-vt8500/timer.c b/arch/arm/mach-vt8500/timer.c
index d5376c5..050e183 100644
--- a/arch/arm/mach-vt8500/timer.c
+++ b/arch/arm/mach-vt8500/timer.c
@@ -1,6 +1,7 @@
/*
- * arch/arm/mach-vt8500/timer.c
+ * arch/arm/mach-vt8500/timer_dt.c
*
+ * Copyright (C) 2012 Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org>
* Copyright (C) 2010 Alexey Charkov <alchark-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
*
* This program is free software; you can redistribute it and/or modify
@@ -18,18 +19,25 @@
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
+/*
+ * This file is copied and modified from the original timer.c provided by
+ * Alexey Charkov. Minor changes have been made for Device Tree Support.
+ */
+
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/clocksource.h>
#include <linux/clockchips.h>
#include <linux/delay.h>
-
#include <asm/mach/time.h>
-#include "devices.h"
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
#define VT8500_TIMER_OFFSET 0x0100
+#define VT8500_TIMER_HZ 3000000
#define TIMER_MATCH_VAL 0x0000
#define TIMER_COUNT_VAL 0x0010
#define TIMER_STATUS_VAL 0x0014
@@ -39,7 +47,6 @@
#define TIMER_COUNT_R_ACTIVE (1 << 5) /* not ready for read */
#define TIMER_COUNT_W_ACTIVE (1 << 4) /* not ready for write */
#define TIMER_MATCH_W_ACTIVE (1 << 0) /* not ready for write */
-#define VT8500_TIMER_HZ 3000000
#define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
@@ -55,7 +62,7 @@ static cycle_t vt8500_timer_read(struct clocksource *cs)
return readl(regbase + TIMER_COUNT_VAL);
}
-struct clocksource clocksource = {
+static struct clocksource clocksource = {
.name = "vt8500_timer",
.rating = 200,
.read = vt8500_timer_read,
@@ -98,7 +105,7 @@ static void vt8500_timer_set_mode(enum clock_event_mode mode,
}
}
-struct clock_event_device clockevent = {
+static struct clock_event_device clockevent = {
.name = "vt8500_timer",
.features = CLOCK_EVT_FEAT_ONESHOT,
.rating = 200,
@@ -115,26 +122,51 @@ static irqreturn_t vt8500_timer_interrupt(int irq, void *dev_id)
return IRQ_HANDLED;
}
-struct irqaction irq = {
+static struct irqaction irq = {
.name = "vt8500_timer",
.flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
.handler = vt8500_timer_interrupt,
.dev_id = &clockevent,
};
-static void __init vt8500_timer_init(void)
+static struct of_device_id vt8500_timer_ids[] = {
+ { .compatible = "via,vt8500-timer" },
+ { }
+};
+
+void __init vt8500_timer_init(void)
{
- regbase = ioremap(wmt_pmc_base + VT8500_TIMER_OFFSET, 0x28);
- if (!regbase)
- printk(KERN_ERR "vt8500_timer_init: failed to map MMIO registers\n");
+ struct device_node *np;
+ int timer_irq;
+
+ np = of_find_matching_node(NULL, vt8500_timer_ids);
+ if (!np) {
+ pr_err("%s: Timer description missing from Device Tree\n",
+ __func__);
+ return;
+ }
+ regbase = of_iomap(np, 0);
+ if (!regbase) {
+ pr_err("%s: Missing iobase description in Device Tree\n",
+ __func__);
+ of_node_put(np);
+ return;
+ }
+ timer_irq = irq_of_parse_and_map(np, 0);
+ if (!timer_irq) {
+ pr_err("%s: Missing irq description in Device Tree\n",
+ __func__);
+ of_node_put(np);
+ return;
+ }
writel(1, regbase + TIMER_CTRL_VAL);
writel(0xf, regbase + TIMER_STATUS_VAL);
writel(~0, regbase + TIMER_MATCH_VAL);
if (clocksource_register_hz(&clocksource, VT8500_TIMER_HZ))
- printk(KERN_ERR "vt8500_timer_init: clocksource_register failed for %s\n",
- clocksource.name);
+ pr_err("%s: vt8500_timer_init: clocksource_register failed for %s\n",
+ __func__, clocksource.name);
clockevents_calc_mult_shift(&clockevent, VT8500_TIMER_HZ, 4);
@@ -144,12 +176,9 @@ static void __init vt8500_timer_init(void)
clockevent.min_delta_ns = clockevent_delta2ns(4, &clockevent);
clockevent.cpumask = cpumask_of(0);
- if (setup_irq(wmt_timer_irq, &irq))
- printk(KERN_ERR "vt8500_timer_init: setup_irq failed for %s\n",
- clockevent.name);
+ if (setup_irq(timer_irq, &irq))
+ pr_err("%s: setup_irq failed for %s\n", __func__,
+ clockevent.name);
clockevents_register_device(&clockevent);
}
-struct sys_timer vt8500_timer = {
- .init = vt8500_timer_init
-};
diff --git a/arch/arm/mach-vt8500/vt8500.c b/arch/arm/mach-vt8500/vt8500.c
new file mode 100644
index 0000000..4494993
--- /dev/null
+++ b/arch/arm/mach-vt8500/vt8500.c
@@ -0,0 +1,196 @@
+/*
+ * arch/arm/mach-vt8500/vt8500.c
+ *
+ * Copyright (C) 2012 Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include <linux/io.h>
+#include <linux/pm.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/time.h>
+#include <asm/mach/map.h>
+
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/of_platform.h>
+
+#include <mach/restart.h>
+#include <mach/gpio.h>
+
+#include "common.h"
+
+#define LEGACY_GPIO_BASE 0xD8110000
+#define LEGACY_PMC_BASE 0xD8130000
+
+/* Registers in GPIO Controller */
+#define VT8500_GPIO_MUX_REG 0x200
+
+/* Registers in Power Management Controller */
+#define VT8500_HCR_REG 0x12
+#define VT8500_PMSR_REG 0x60
+
+static void __iomem *pmc_base;
+
+void vt8500_restart(char mode, const char *cmd)
+{
+ if (pmc_base)
+ writel(1, pmc_base + VT8500_PMSR_REG);
+}
+
+static struct map_desc vt8500_io_desc[] __initdata = {
+ /* SoC MMIO registers */
+ [0] = {
+ .virtual = 0xf8000000,
+ .pfn = __phys_to_pfn(0xd8000000),
+ .length = 0x00390000, /* max of all chip variants */
+ .type = MT_DEVICE
+ },
+};
+
+void __init vt8500_map_io(void)
+{
+ iotable_init(vt8500_io_desc, ARRAY_SIZE(vt8500_io_desc));
+}
+
+static void vt8500_power_off(void)
+{
+ local_irq_disable();
+ writew(5, pmc_base + VT8500_HCR_REG);
+ asm("mcr%? p15, 0, %0, c7, c0, 4" : : "r" (0));
+}
+
+void __init vt8500_init(void)
+{
+ struct device_node *np, *fb;
+ void __iomem *gpio_base;
+
+#ifdef CONFIG_FB_VT8500
+ fb = of_find_compatible_node(NULL, NULL, "via,vt8500-fb");
+ if (fb) {
+ np = of_find_compatible_node(NULL, NULL, "via,vt8500-gpio");
+ if (np) {
+ gpio_base = of_iomap(np, 0);
+
+ if (!gpio_base)
+ pr_err("%s: of_iomap(gpio_mux) failed\n",
+ __func__);
+
+ of_node_put(np);
+ } else {
+ gpio_base = ioremap(LEGACY_GPIO_BASE, 0x1000);
+ if (!gpio_base)
+ pr_err("%s: ioremap(legacy_gpio_mux) failed\n",
+ __func__);
+ }
+ if (gpio_base) {
+ writel(readl(gpio_base + VT8500_GPIO_MUX_REG) | 1,
+ gpio_base + VT8500_GPIO_MUX_REG);
+ iounmap(gpio_base);
+ } else
+ pr_err("%s: Could not remap GPIO mux\n", __func__);
+
+ of_node_put(fb);
+ }
+#endif
+
+#ifdef CONFIG_FB_WM8505
+ fb = of_find_compatible_node(NULL, NULL, "wm,wm8505-fb");
+ if (fb) {
+ np = of_find_compatible_node(NULL, NULL, "wm,wm8505-gpio");
+ if (!np)
+ np = of_find_compatible_node(NULL, NULL,
+ "wm,wm8650-gpio");
+ if (np) {
+ gpio_base = of_iomap(np, 0);
+
+ if (!gpio_base)
+ pr_err("%s: of_iomap(gpio_mux) failed\n",
+ __func__);
+
+ of_node_put(np);
+ } else {
+ gpio_base = ioremap(LEGACY_GPIO_BASE, 0x1000);
+ if (!gpio_base)
+ pr_err("%s: ioremap(legacy_gpio_mux) failed\n",
+ __func__);
+ }
+ if (gpio_base) {
+ writel(readl(gpio_base + VT8500_GPIO_MUX_REG) |
+ 0x80000000, gpio_base + VT8500_GPIO_MUX_REG);
+ iounmap(gpio_base);
+ } else
+ pr_err("%s: Could not remap GPIO mux\n", __func__);
+
+ of_node_put(fb);
+ }
+#endif
+
+ np = of_find_compatible_node(NULL, NULL, "via,vt8500-pmc");
+ if (np) {
+ pmc_base = of_iomap(np, 0);
+
+ if (!pmc_base)
+ pr_err("%s:of_iomap(pmc) failed\n", __func__);
+
+ of_node_put(np);
+ } else {
+ pmc_base = ioremap(LEGACY_PMC_BASE, 0x1000);
+ if (!pmc_base)
+ pr_err("%s:ioremap(power_off) failed\n", __func__);
+ }
+ if (pmc_base)
+ pm_power_off = &vt8500_power_off;
+ else
+ pr_err("%s: PMC Hibernation register could not be remapped, not enabling power off!\n", __func__);
+
+ vtwm_clk_init(pmc_base);
+
+ of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+}
+
+static const struct of_device_id vt8500_irq_match[] __initconst = {
+ { .compatible = "via,vt8500-intc", .data = vt8500_irq_init, },
+ { /* sentinel */ },
+};
+
+static void __init vt8500_init_irq(void)
+{
+ of_irq_init(vt8500_irq_match);
+};
+
+static struct sys_timer vt8500_timer = {
+ .init = vt8500_timer_init,
+};
+
+static const char * const vt8500_dt_compat[] = {
+ "via,vt8500",
+ "wm,wm8650",
+ "wm,wm8505",
+};
+
+DT_MACHINE_START(WMT_DT, "VIA/Wondermedia SoC (Device Tree Support)")
+ .dt_compat = vt8500_dt_compat,
+ .map_io = vt8500_map_io,
+ .init_irq = vt8500_init_irq,
+ .timer = &vt8500_timer,
+ .init_machine = vt8500_init,
+ .restart = vt8500_restart,
+MACHINE_END
+
diff --git a/arch/arm/mach-vt8500/wm8505_7in.c b/arch/arm/mach-vt8500/wm8505_7in.c
deleted file mode 100644
index db19886..0000000
--- a/arch/arm/mach-vt8500/wm8505_7in.c
+++ /dev/null
@@ -1,79 +0,0 @@
-/*
- * arch/arm/mach-vt8500/wm8505_7in.c
- *
- * Copyright (C) 2010 Alexey Charkov <alchark-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-
-#include <linux/io.h>
-#include <linux/pm.h>
-
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <mach/restart.h>
-
-#include "devices.h"
-
-static void __iomem *pmc_hiber;
-
-static struct platform_device *devices[] __initdata = {
- &vt8500_device_uart0,
- &vt8500_device_ehci,
- &vt8500_device_wm8505_fb,
- &vt8500_device_ge_rops,
- &vt8500_device_pwm,
- &vt8500_device_pwmbl,
- &vt8500_device_rtc,
-};
-
-static void vt8500_power_off(void)
-{
- local_irq_disable();
- writew(5, pmc_hiber);
- asm("mcr%? p15, 0, %0, c7, c0, 4" : : "r" (0));
-}
-
-void __init wm8505_7in_init(void)
-{
-#ifdef CONFIG_FB_WM8505
- void __iomem *gpio_mux_reg = ioremap(wmt_gpio_base + 0x200, 4);
- if (gpio_mux_reg) {
- writel(readl(gpio_mux_reg) | 0x80000000, gpio_mux_reg);
- iounmap(gpio_mux_reg);
- } else {
- printk(KERN_ERR "Could not remap the GPIO mux register, display may not work properly!\n");
- }
-#endif
- pmc_hiber = ioremap(wmt_pmc_base + 0x12, 2);
- if (pmc_hiber)
- pm_power_off = &vt8500_power_off;
- else
- printk(KERN_ERR "PMC Hibernation register could not be remapped, not enabling power off!\n");
- wmt_setup_restart();
- wm8505_set_resources();
- platform_add_devices(devices, ARRAY_SIZE(devices));
- vt8500_gpio_init();
-}
-
-MACHINE_START(WM8505_7IN_NETBOOK, "WM8505 7-inch generic netbook")
- .atag_offset = 0x100,
- .restart = wmt_restart,
- .reserve = wm8505_reserve_mem,
- .map_io = wm8505_map_io,
- .init_irq = wm8505_init_irq,
- .timer = &vt8500_timer,
- .init_machine = wm8505_7in_init,
-MACHINE_END
--
1.7.9.5
^ permalink raw reply related
* [PATCHv3 5/9] video: vt8500: Add devicetree support for vt8500-fb and wm8505-fb
From: Tony Prisk @ 2012-08-21 20:47 UTC (permalink / raw)
To: vt8500-wm8505-linux-kernel-/JYPxA39Uh6Zox4op4iWzw
Cc: Tony Prisk, Russell King, Alessandro Zummo, Alan Cox,
Greg Kroah-Hartman, Florian Tobias Schandinat, Arnd Bergmann,
Grant Likely, Rob Herring, Rob Landley, Linus Walleij,
Mike Turquette, Stephen Warren,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-fbdev-u79uwXL29TY76Z2rM5mHXA,
linux-usb-u79uwXL29TY76Z2rM5mHXA,
linux-serial-u79uwXL29TY76Z2rM5mHXA,
rtc-linux-/JYPxA39Uh5TLH3MbocFFw,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ
In-Reply-To: <1345582058-2291-1-git-send-email-linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org>
Update vt8500-fb, wm8505-fb and wmt-ge-rops to support device
tree bindings.
Small change in wm8505-fb.c to support WM8650 framebuffer color
format.
Signed-off-by: Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org>
---
drivers/video/Kconfig | 6 +--
drivers/video/vt8500lcdfb.c | 79 ++++++++++++++++++++++++++++++-----
drivers/video/wm8505fb.c | 97 ++++++++++++++++++++++++++++++++++++-------
drivers/video/wmt_ge_rops.c | 9 +++-
4 files changed, 161 insertions(+), 30 deletions(-)
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 0217f74..b66d951 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -1788,7 +1788,7 @@ config FB_AU1200
config FB_VT8500
bool "VT8500 LCD Driver"
- depends on (FB = y) && ARM && ARCH_VT8500 && VTWM_VERSION_VT8500
+ depends on (FB = y) && ARM && ARCH_VT8500
select FB_WMT_GE_ROPS
select FB_SYS_IMAGEBLIT
help
@@ -1797,11 +1797,11 @@ config FB_VT8500
config FB_WM8505
bool "WM8505 frame buffer support"
- depends on (FB = y) && ARM && ARCH_VT8500 && VTWM_VERSION_WM8505
+ depends on (FB = y) && ARM && ARCH_VT8500
select FB_WMT_GE_ROPS
select FB_SYS_IMAGEBLIT
help
- This is the framebuffer driver for WonderMedia WM8505
+ This is the framebuffer driver for WonderMedia WM8505/WM8650
integrated LCD controller.
source "drivers/video/geode/Kconfig"
diff --git a/drivers/video/vt8500lcdfb.c b/drivers/video/vt8500lcdfb.c
index 2a5fe6e..758e359 100644
--- a/drivers/video/vt8500lcdfb.c
+++ b/drivers/video/vt8500lcdfb.c
@@ -35,6 +35,13 @@
#include "vt8500lcdfb.h"
#include "wmt_ge_rops.h"
+#ifdef CONFIG_OF
+#include <linux/of.h>
+#include <linux/of_fdt.h>
+#include <linux/memblock.h>
+#endif
+
+
#define to_vt8500lcd_info(__info) container_of(__info, \
struct vt8500lcd_info, fb)
@@ -270,15 +277,21 @@ static int __devinit vt8500lcd_probe(struct platform_device *pdev)
{
struct vt8500lcd_info *fbi;
struct resource *res;
- struct vt8500fb_platform_data *pdata = pdev->dev.platform_data;
void *addr;
int irq, ret;
+ struct fb_videomode of_mode;
+ struct device_node *np;
+ u32 bpp;
+ dma_addr_t fb_mem_phys;
+ unsigned long fb_mem_len;
+ void *fb_mem_virt;
+
ret = -ENOMEM;
fbi = NULL;
- fbi = kzalloc(sizeof(struct vt8500lcd_info) + sizeof(u32) * 16,
- GFP_KERNEL);
+ fbi = devm_kzalloc(&pdev->dev, sizeof(struct vt8500lcd_info)
+ + sizeof(u32) * 16, GFP_KERNEL);
if (!fbi) {
dev_err(&pdev->dev, "Failed to initialize framebuffer device\n");
ret = -ENOMEM;
@@ -333,9 +346,45 @@ static int __devinit vt8500lcd_probe(struct platform_device *pdev)
goto failed_free_res;
}
- fbi->fb.fix.smem_start = pdata->video_mem_phys;
- fbi->fb.fix.smem_len = pdata->video_mem_len;
- fbi->fb.screen_base = pdata->video_mem_virt;
+ np = of_parse_phandle(pdev->dev.of_node, "via,display", 0);
+ if (!np) {
+ pr_err("%s: No display description in Device Tree\n", __func__);
+ ret = -EINVAL;
+ goto failed_free_res;
+ }
+
+ /*
+ * This code is copied from Sascha Hauer's of_videomode helper
+ * and can be replaced with a call to the helper once mainlined
+ */
+ ret = 0;
+ ret |= of_property_read_u32(np, "xres", &of_mode.xres);
+ ret |= of_property_read_u32(np, "yres", &of_mode.yres);
+ ret |= of_property_read_u32(np, "left-margin", &of_mode.left_margin);
+ ret |= of_property_read_u32(np, "right-margin", &of_mode.right_margin);
+ ret |= of_property_read_u32(np, "hsync-len", &of_mode.hsync_len);
+ ret |= of_property_read_u32(np, "upper-margin", &of_mode.upper_margin);
+ ret |= of_property_read_u32(np, "lower-margin", &of_mode.lower_margin);
+ ret |= of_property_read_u32(np, "vsync-len", &of_mode.vsync_len);
+ ret |= of_property_read_u32(np, "bpp", &bpp);
+ if (ret) {
+ pr_err("%s: Unable to read display properties\n", __func__);
+ goto failed_free_res;
+ }
+ of_mode.vmode = FB_VMODE_NONINTERLACED;
+
+ /* try allocating the framebuffer */
+ fb_mem_len = of_mode.xres * of_mode.yres * 2 * (bpp / 8);
+ fb_mem_virt = dma_alloc_coherent(&pdev->dev, fb_mem_len, &fb_mem_phys,
+ GFP_KERNEL);
+ if (!fb_mem_virt) {
+ pr_err("%s: Failed to allocate framebuffer\n", __func__);
+ return -ENOMEM;
+ };
+
+ fbi->fb.fix.smem_start = fb_mem_phys;
+ fbi->fb.fix.smem_len = fb_mem_len;
+ fbi->fb.screen_base = fb_mem_virt;
fbi->palette_size = PAGE_ALIGN(512);
fbi->palette_cpu = dma_alloc_coherent(&pdev->dev,
@@ -370,10 +419,11 @@ static int __devinit vt8500lcd_probe(struct platform_device *pdev)
goto failed_free_irq;
}
- fb_videomode_to_var(&fbi->fb.var, &pdata->mode);
- fbi->fb.var.bits_per_pixel = pdata->bpp;
- fbi->fb.var.xres_virtual = pdata->xres_virtual;
- fbi->fb.var.yres_virtual = pdata->yres_virtual;
+ fb_videomode_to_var(&fbi->fb.var, &of_mode);
+
+ fbi->fb.var.xres_virtual = of_mode.xres;
+ fbi->fb.var.yres_virtual = of_mode.yres * 2;
+ fbi->fb.var.bits_per_pixel = bpp;
ret = vt8500lcd_set_par(&fbi->fb);
if (ret) {
@@ -448,12 +498,18 @@ static int __devexit vt8500lcd_remove(struct platform_device *pdev)
return 0;
}
+static const struct of_device_id via_dt_ids[] = {
+ { .compatible = "via,vt8500-fb", },
+ {}
+};
+
static struct platform_driver vt8500lcd_driver = {
.probe = vt8500lcd_probe,
.remove = __devexit_p(vt8500lcd_remove),
.driver = {
.owner = THIS_MODULE,
.name = "vt8500-lcd",
+ .of_match_table = of_match_ptr(via_dt_ids),
},
};
@@ -461,4 +517,5 @@ module_platform_driver(vt8500lcd_driver);
MODULE_AUTHOR("Alexey Charkov <alchark-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>");
MODULE_DESCRIPTION("LCD controller driver for VIA VT8500");
-MODULE_LICENSE("GPL");
+MODULE_LICENSE("GPL v2");
+MODULE_DEVICE_TABLE(of, via_dt_ids);
diff --git a/drivers/video/wm8505fb.c b/drivers/video/wm8505fb.c
index c8703bd..d4448b0 100644
--- a/drivers/video/wm8505fb.c
+++ b/drivers/video/wm8505fb.c
@@ -28,6 +28,9 @@
#include <linux/dma-mapping.h>
#include <linux/platform_device.h>
#include <linux/wait.h>
+#include <linux/of.h>
+#include <linux/of_fdt.h>
+#include <linux/memblock.h>
#include <mach/vt8500fb.h>
@@ -59,8 +62,12 @@ static int wm8505fb_init_hw(struct fb_info *info)
writel(fbi->fb.fix.smem_start, fbi->regbase + WMT_GOVR_FBADDR);
writel(fbi->fb.fix.smem_start, fbi->regbase + WMT_GOVR_FBADDR1);
- /* Set in-memory picture format to RGB 32bpp */
- writel(0x1c, fbi->regbase + WMT_GOVR_COLORSPACE);
+ /*
+ * Set in-memory picture format to RGB
+ * 0x31C sets the correct color mode (RGB565) for WM8650
+ * Bit 8+9 (0x300) are ignored on WM8505 as reserved
+ */
+ writel(0x31c, fbi->regbase + WMT_GOVR_COLORSPACE);
writel(1, fbi->regbase + WMT_GOVR_COLORSPACE1);
/* Virtual buffer size */
@@ -127,6 +134,18 @@ static int wm8505fb_set_par(struct fb_info *info)
info->var.blue.msb_right = 0;
info->fix.visual = FB_VISUAL_TRUECOLOR;
info->fix.line_length = info->var.xres_virtual << 2;
+ } else if (info->var.bits_per_pixel == 16) {
+ info->var.red.offset = 11;
+ info->var.red.length = 5;
+ info->var.red.msb_right = 0;
+ info->var.green.offset = 5;
+ info->var.green.length = 6;
+ info->var.green.msb_right = 0;
+ info->var.blue.offset = 0;
+ info->var.blue.length = 5;
+ info->var.blue.msb_right = 0;
+ info->fix.visual = FB_VISUAL_TRUECOLOR;
+ info->fix.line_length = info->var.xres_virtual << 1;
}
wm8505fb_set_timing(info);
@@ -246,16 +265,20 @@ static int __devinit wm8505fb_probe(struct platform_device *pdev)
struct wm8505fb_info *fbi;
struct resource *res;
void *addr;
- struct vt8500fb_platform_data *pdata;
int ret;
- pdata = pdev->dev.platform_data;
+ struct fb_videomode of_mode;
+ struct device_node *np;
+ u32 bpp;
+ dma_addr_t fb_mem_phys;
+ unsigned long fb_mem_len;
+ void *fb_mem_virt;
ret = -ENOMEM;
fbi = NULL;
- fbi = kzalloc(sizeof(struct wm8505fb_info) + sizeof(u32) * 16,
- GFP_KERNEL);
+ fbi = devm_kzalloc(&pdev->dev, sizeof(struct wm8505fb_info) +
+ sizeof(u32) * 16, GFP_KERNEL);
if (!fbi) {
dev_err(&pdev->dev, "Failed to initialize framebuffer device\n");
ret = -ENOMEM;
@@ -305,21 +328,58 @@ static int __devinit wm8505fb_probe(struct platform_device *pdev)
goto failed_free_res;
}
- fb_videomode_to_var(&fbi->fb.var, &pdata->mode);
+ np = of_parse_phandle(pdev->dev.of_node, "via,display", 0);
+ if (!np) {
+ pr_err("%s: No display description in Device Tree\n", __func__);
+ ret = -EINVAL;
+ goto failed_free_res;
+ }
+
+ /*
+ * This code is copied from Sascha Hauer's of_videomode helper
+ * and can be replaced with a call to the helper once mainlined
+ */
+ ret = 0;
+ ret |= of_property_read_u32(np, "xres", &of_mode.xres);
+ ret |= of_property_read_u32(np, "yres", &of_mode.yres);
+ ret |= of_property_read_u32(np, "left-margin", &of_mode.left_margin);
+ ret |= of_property_read_u32(np, "right-margin", &of_mode.right_margin);
+ ret |= of_property_read_u32(np, "hsync-len", &of_mode.hsync_len);
+ ret |= of_property_read_u32(np, "upper-margin", &of_mode.upper_margin);
+ ret |= of_property_read_u32(np, "lower-margin", &of_mode.lower_margin);
+ ret |= of_property_read_u32(np, "vsync-len", &of_mode.vsync_len);
+ ret |= of_property_read_u32(np, "bpp", &bpp);
+ if (ret) {
+ pr_err("%s: Unable to read display properties\n", __func__);
+ goto failed_free_res;
+ }
+
+ of_mode.vmode = FB_VMODE_NONINTERLACED;
+ fb_videomode_to_var(&fbi->fb.var, &of_mode);
fbi->fb.var.nonstd = 0;
fbi->fb.var.activate = FB_ACTIVATE_NOW;
fbi->fb.var.height = -1;
fbi->fb.var.width = -1;
- fbi->fb.var.xres_virtual = pdata->xres_virtual;
- fbi->fb.var.yres_virtual = pdata->yres_virtual;
- fbi->fb.var.bits_per_pixel = pdata->bpp;
- fbi->fb.fix.smem_start = pdata->video_mem_phys;
- fbi->fb.fix.smem_len = pdata->video_mem_len;
- fbi->fb.screen_base = pdata->video_mem_virt;
- fbi->fb.screen_size = pdata->video_mem_len;
+ /* try allocating the framebuffer */
+ fb_mem_len = of_mode.xres * of_mode.yres * 2 * (bpp / 8);
+ fb_mem_virt = dma_alloc_coherent(&pdev->dev, fb_mem_len, &fb_mem_phys,
+ GFP_KERNEL);
+ if (!fb_mem_virt) {
+ pr_err("%s: Failed to allocate framebuffer\n", __func__);
+ return -ENOMEM;
+ };
+
+ fbi->fb.var.xres_virtual = of_mode.xres;
+ fbi->fb.var.yres_virtual = of_mode.yres * 2;
+ fbi->fb.var.bits_per_pixel = bpp;
+
+ fbi->fb.fix.smem_start = fb_mem_phys;
+ fbi->fb.fix.smem_len = fb_mem_len;
+ fbi->fb.screen_base = fb_mem_virt;
+ fbi->fb.screen_size = fb_mem_len;
if (fb_alloc_cmap(&fbi->fb.cmap, 256, 0) < 0) {
dev_err(&pdev->dev, "Failed to allocate color map\n");
@@ -395,12 +455,18 @@ static int __devexit wm8505fb_remove(struct platform_device *pdev)
return 0;
}
+static const struct of_device_id wmt_dt_ids[] = {
+ { .compatible = "wm,wm8505-fb", },
+ {}
+};
+
static struct platform_driver wm8505fb_driver = {
.probe = wm8505fb_probe,
.remove = __devexit_p(wm8505fb_remove),
.driver = {
.owner = THIS_MODULE,
.name = DRIVER_NAME,
+ .of_match_table = of_match_ptr(wmt_dt_ids),
},
};
@@ -408,4 +474,5 @@ module_platform_driver(wm8505fb_driver);
MODULE_AUTHOR("Ed Spiridonov <edo.rus-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>");
MODULE_DESCRIPTION("Framebuffer driver for WMT WM8505");
-MODULE_LICENSE("GPL");
+MODULE_LICENSE("GPL v2");
+MODULE_DEVICE_TABLE(of, wmt_dt_ids);
diff --git a/drivers/video/wmt_ge_rops.c b/drivers/video/wmt_ge_rops.c
index 55be386..ba025b4 100644
--- a/drivers/video/wmt_ge_rops.c
+++ b/drivers/video/wmt_ge_rops.c
@@ -158,12 +158,18 @@ static int __devexit wmt_ge_rops_remove(struct platform_device *pdev)
return 0;
}
+static const struct of_device_id wmt_dt_ids[] = {
+ { .compatible = "wm,prizm-ge-rops", },
+ { /* sentinel */ }
+};
+
static struct platform_driver wmt_ge_rops_driver = {
.probe = wmt_ge_rops_probe,
.remove = __devexit_p(wmt_ge_rops_remove),
.driver = {
.owner = THIS_MODULE,
.name = "wmt_ge_rops",
+ .of_match_table = of_match_ptr(wmt_dt_ids),
},
};
@@ -172,4 +178,5 @@ module_platform_driver(wmt_ge_rops_driver);
MODULE_AUTHOR("Alexey Charkov <alchark-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org");
MODULE_DESCRIPTION("Accelerators for raster operations using "
"WonderMedia Graphics Engine");
-MODULE_LICENSE("GPL");
+MODULE_LICENSE("GPL v2");
+MODULE_DEVICE_TABLE(of, wmt_dt_ids);
--
1.7.9.5
--
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^ permalink raw reply related
* [PATCHv3 4/9] usb: vt8500: Add devicetree support for vt8500-ehci and -uhci.
From: Tony Prisk @ 2012-08-21 20:47 UTC (permalink / raw)
To: vt8500-wm8505-linux-kernel-/JYPxA39Uh6Zox4op4iWzw
Cc: Alessandro Zummo, linux-fbdev-u79uwXL29TY76Z2rM5mHXA,
Russell King, Linus Walleij, Florian Tobias Schandinat,
Greg Kroah-Hartman, devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
linux-usb-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, Rob Herring,
linux-serial-u79uwXL29TY76Z2rM5mHXA,
rtc-linux-/JYPxA39Uh5TLH3MbocFFw, Stephen Warren, Mike Turquette,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Alan Cox
In-Reply-To: <1345582058-2291-1-git-send-email-linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org>
Add devicetree support for vt8500-ehci.
Convert vt8500-uhci to a generic non-pci platform-uhci with
device tree support.
Signed-off-by: Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org>
---
drivers/usb/host/Kconfig | 4 +-
drivers/usb/host/ehci-vt8500.c | 25 ++++--
drivers/usb/host/uhci-hcd.c | 5 ++
drivers/usb/host/uhci-platform.c | 169 ++++++++++++++++++++++++++++++++++++++
4 files changed, 195 insertions(+), 8 deletions(-)
create mode 100644 drivers/usb/host/uhci-platform.c
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index dcfaaa9..d7a6b10 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -450,7 +450,7 @@ config USB_OHCI_LITTLE_ENDIAN
config USB_UHCI_HCD
tristate "UHCI HCD (most Intel and VIA) support"
- depends on USB && (PCI || SPARC_LEON)
+ depends on USB && (PCI || SPARC_LEON || ARCH_VT8500)
---help---
The Universal Host Controller Interface is a standard by Intel for
accessing the USB hardware in the PC (which is also called the USB
@@ -468,7 +468,7 @@ config USB_UHCI_HCD
config USB_UHCI_SUPPORT_NON_PCI_HC
bool
depends on USB_UHCI_HCD
- default y if SPARC_LEON
+ default y if (SPARC_LEON || ARCH_VT8500)
config USB_UHCI_BIG_ENDIAN_MMIO
bool
diff --git a/drivers/usb/host/ehci-vt8500.c b/drivers/usb/host/ehci-vt8500.c
index c1eda73..0e1637b 100644
--- a/drivers/usb/host/ehci-vt8500.c
+++ b/drivers/usb/host/ehci-vt8500.c
@@ -16,6 +16,7 @@
*
*/
+#include <linux/of.h>
#include <linux/platform_device.h>
static int ehci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
@@ -84,20 +85,23 @@ static const struct hc_driver vt8500_ehci_hc_driver = {
.clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
};
+static u64 wmt_ehci_dma_mask = DMA_BIT_MASK(32);
+
static int vt8500_ehci_drv_probe(struct platform_device *pdev)
{
struct usb_hcd *hcd;
struct ehci_hcd *ehci;
struct resource *res;
+ int irq;
int ret;
if (usb_disabled())
return -ENODEV;
- if (pdev->resource[1].flags != IORESOURCE_IRQ) {
- pr_debug("resource[1] is not IORESOURCE_IRQ");
- return -ENOMEM;
- }
+ /* devicetree created devices don't specify a dma mask */
+ if (!pdev->dev.dma_mask)
+ pdev->dev.dma_mask = &wmt_ehci_dma_mask;
+
hcd = usb_create_hcd(&vt8500_ehci_hc_driver, &pdev->dev, "VT8500");
if (!hcd)
return -ENOMEM;
@@ -134,8 +138,9 @@ static int vt8500_ehci_drv_probe(struct platform_device *pdev)
ehci_reset(ehci);
- ret = usb_add_hcd(hcd, pdev->resource[1].start,
- IRQF_SHARED);
+ irq = platform_get_irq(pdev, 0);
+
+ ret = usb_add_hcd(hcd, irq, IRQF_SHARED);
if (ret == 0) {
platform_set_drvdata(pdev, hcd);
return ret;
@@ -162,6 +167,11 @@ static int vt8500_ehci_drv_remove(struct platform_device *pdev)
return 0;
}
+static const struct of_device_id vt8500_ehci_ids[] = {
+ { .compatible = "via,vt8500-ehci", },
+ {}
+};
+
static struct platform_driver vt8500_ehci_driver = {
.probe = vt8500_ehci_drv_probe,
.remove = vt8500_ehci_drv_remove,
@@ -169,7 +179,10 @@ static struct platform_driver vt8500_ehci_driver = {
.driver = {
.name = "vt8500-ehci",
.owner = THIS_MODULE,
+ .of_match_table = of_match_ptr(vt8500_ehci_ids),
}
};
MODULE_ALIAS("platform:vt8500-ehci");
+MODULE_LICENSE("GPL v2");
+MODULE_DEVICE_TABLE(of, vt8500_ehci_ids);
diff --git a/drivers/usb/host/uhci-hcd.c b/drivers/usb/host/uhci-hcd.c
index e4db350..5da5c99 100644
--- a/drivers/usb/host/uhci-hcd.c
+++ b/drivers/usb/host/uhci-hcd.c
@@ -846,6 +846,11 @@ static const char hcd_name[] = "uhci_hcd";
#define PLATFORM_DRIVER uhci_grlib_driver
#endif
+#ifdef CONFIG_ARCH_VT8500
+#include "uhci-platform.c"
+#define PLATFORM_DRIVER uhci_platform_driver
+#endif
+
#if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER)
#error "missing bus glue for uhci-hcd"
#endif
diff --git a/drivers/usb/host/uhci-platform.c b/drivers/usb/host/uhci-platform.c
new file mode 100644
index 0000000..35ca094
--- /dev/null
+++ b/drivers/usb/host/uhci-platform.c
@@ -0,0 +1,169 @@
+/*
+ * Generic UHCI HCD (Host Controller Driver) for Platform Devices
+ *
+ * Copyright (c) 2011 Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org>
+ *
+ * This file is based on uhci-grlib.c
+ * (C) Copyright 2004-2007 Alan Stern, stern-nwvwT67g6+6dFdvTe/nMLpVzexx5G7lz@public.gmane.org
+ */
+
+#include <linux/of.h>
+#include <linux/platform_device.h>
+
+static int uhci_platform_init(struct usb_hcd *hcd)
+{
+ struct uhci_hcd *uhci = hcd_to_uhci(hcd);
+
+ uhci->rh_numports = uhci_count_ports(hcd);
+
+ /* Set up pointers to to generic functions */
+ uhci->reset_hc = uhci_generic_reset_hc;
+ uhci->check_and_reset_hc = uhci_generic_check_and_reset_hc;
+
+ /* No special actions need to be taken for the functions below */
+ uhci->configure_hc = NULL;
+ uhci->resume_detect_interrupts_are_broken = NULL;
+ uhci->global_suspend_mode_is_broken = NULL;
+
+ /* Reset if the controller isn't already safely quiescent. */
+ check_and_reset_hc(uhci);
+ return 0;
+}
+
+static const struct hc_driver uhci_platform_hc_driver = {
+ .description = hcd_name,
+ .product_desc = "Generic UHCI Host Controller",
+ .hcd_priv_size = sizeof(struct uhci_hcd),
+
+ /* Generic hardware linkage */
+ .irq = uhci_irq,
+ .flags = HCD_MEMORY | HCD_USB11,
+
+ /* Basic lifecycle operations */
+ .reset = uhci_platform_init,
+ .start = uhci_start,
+#ifdef CONFIG_PM
+ .pci_suspend = NULL,
+ .pci_resume = NULL,
+ .bus_suspend = uhci_rh_suspend,
+ .bus_resume = uhci_rh_resume,
+#endif
+ .stop = uhci_stop,
+
+ .urb_enqueue = uhci_urb_enqueue,
+ .urb_dequeue = uhci_urb_dequeue,
+
+ .endpoint_disable = uhci_hcd_endpoint_disable,
+ .get_frame_number = uhci_hcd_get_frame_number,
+
+ .hub_status_data = uhci_hub_status_data,
+ .hub_control = uhci_hub_control,
+};
+
+static u64 platform_uhci_dma_mask = DMA_BIT_MASK(32);
+
+static int __devinit uhci_hcd_platform_probe(struct platform_device *pdev)
+{
+ struct usb_hcd *hcd;
+ struct uhci_hcd *uhci;
+ struct resource *res;
+ int ret;
+
+ if (usb_disabled())
+ return -ENODEV;
+
+ /* Right now device-tree probed devices don't get dma_mask set.
+ * Since shared usb code relies on it, set it here for now.
+ * Once we have dma capability bindings this can go away.
+ */
+ if (!pdev->dev.dma_mask)
+ pdev->dev.dma_mask = &platform_uhci_dma_mask;
+
+ hcd = usb_create_hcd(&uhci_platform_hc_driver, &pdev->dev,
+ pdev->name);
+ if (!hcd)
+ return -ENOMEM;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ hcd->rsrc_start = res->start;
+ hcd->rsrc_len = resource_size(res);
+
+ if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
+ pr_err("%s: request_mem_region failed\n", __func__);
+ ret = -EBUSY;
+ goto err_rmr;
+ }
+
+ hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
+ if (!hcd->regs) {
+ pr_err("%s: ioremap failed\n", __func__);
+ ret = -ENOMEM;
+ goto err_irq;
+ }
+ uhci = hcd_to_uhci(hcd);
+
+ uhci->regs = hcd->regs;
+
+ ret = usb_add_hcd(hcd, pdev->resource[1].start, IRQF_DISABLED |
+ IRQF_SHARED);
+ if (ret)
+ goto err_uhci;
+
+ return 0;
+
+err_uhci:
+ iounmap(hcd->regs);
+err_irq:
+ release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
+err_rmr:
+ usb_put_hcd(hcd);
+
+ return ret;
+}
+
+static int uhci_hcd_platform_remove(struct platform_device *pdev)
+{
+ struct usb_hcd *hcd = platform_get_drvdata(pdev);
+
+ usb_remove_hcd(hcd);
+ iounmap(hcd->regs);
+ release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
+ usb_put_hcd(hcd);
+ platform_set_drvdata(pdev, NULL);
+
+ return 0;
+}
+
+/* Make sure the controller is quiescent and that we're not using it
+ * any more. This is mainly for the benefit of programs which, like kexec,
+ * expect the hardware to be idle: not doing DMA or generating IRQs.
+ *
+ * This routine may be called in a damaged or failing kernel. Hence we
+ * do not acquire the spinlock before shutting down the controller.
+ */
+static void uhci_hcd_platform_shutdown(struct platform_device *op)
+{
+ struct usb_hcd *hcd = dev_get_drvdata(&op->dev);
+
+ uhci_hc_died(hcd_to_uhci(hcd));
+}
+
+static const struct of_device_id platform_uhci_ids[] = {
+ { .compatible = "platform-uhci", },
+ {}
+};
+
+static struct platform_driver uhci_platform_driver = {
+ .probe = uhci_hcd_platform_probe,
+ .remove = uhci_hcd_platform_remove,
+ .shutdown = uhci_hcd_platform_shutdown,
+ .driver = {
+ .name = "platform-uhci",
+ .owner = THIS_MODULE,
+ .of_match_table = of_match_ptr(platform_uhci_ids),
+ },
+};
+
+MODULE_ALIAS("platform:platform-uhci");
+MODULE_LICENSE("GPL v2");
+MODULE_DEVICE_TABLE(of, platform_uhci_ids);
--
1.7.9.5
^ permalink raw reply related
* [PATCHv3 3/9] serial: vt8500: Add devicetree support for vt8500-serial
From: Tony Prisk @ 2012-08-21 20:47 UTC (permalink / raw)
To: vt8500-wm8505-linux-kernel-/JYPxA39Uh6Zox4op4iWzw
Cc: Alessandro Zummo, linux-fbdev-u79uwXL29TY76Z2rM5mHXA,
Russell King, Linus Walleij, Florian Tobias Schandinat,
Greg Kroah-Hartman, devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
linux-usb-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, Rob Herring,
linux-serial-u79uwXL29TY76Z2rM5mHXA,
rtc-linux-/JYPxA39Uh5TLH3MbocFFw, Stephen Warren, Mike Turquette,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Alan Cox
In-Reply-To: <1345582058-2291-1-git-send-email-linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org>
Signed-off-by: Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org>
---
drivers/tty/serial/vt8500_serial.c | 37 ++++++++++++++++++++++++++++++++----
1 file changed, 33 insertions(+), 4 deletions(-)
diff --git a/drivers/tty/serial/vt8500_serial.c b/drivers/tty/serial/vt8500_serial.c
index 2be006f..72e32db 100644
--- a/drivers/tty/serial/vt8500_serial.c
+++ b/drivers/tty/serial/vt8500_serial.c
@@ -34,6 +34,7 @@
#include <linux/slab.h>
#include <linux/clk.h>
#include <linux/platform_device.h>
+#include <linux/of.h>
/*
* UART Register offsets
@@ -76,6 +77,8 @@
#define RX_FIFO_INTS (RXFAF | RXFF | RXOVER | PER | FER | RXTOUT)
#define TX_FIFO_INTS (TXFAE | TXFE | TXUDR)
+#define VT8500_MAX_PORTS 6
+
struct vt8500_port {
struct uart_port uart;
char name[16];
@@ -83,6 +86,13 @@ struct vt8500_port {
unsigned int ier;
};
+/*
+ * we use this variable to keep track of which ports
+ * have been allocated as we can't use pdev->id in
+ * devicetree
+ */
+static unsigned long vt8500_ports_in_use;
+
static inline void vt8500_write(struct uart_port *port, unsigned int val,
unsigned int off)
{
@@ -431,7 +441,7 @@ static int vt8500_verify_port(struct uart_port *port,
return 0;
}
-static struct vt8500_port *vt8500_uart_ports[4];
+static struct vt8500_port *vt8500_uart_ports[VT8500_MAX_PORTS];
static struct uart_driver vt8500_uart_driver;
#ifdef CONFIG_SERIAL_VT8500_CONSOLE
@@ -549,6 +559,7 @@ static int __devinit vt8500_serial_probe(struct platform_device *pdev)
struct vt8500_port *vt8500_port;
struct resource *mmres, *irqres;
int ret;
+ int port;
mmres = platform_get_resource(pdev, IORESOURCE_MEM, 0);
irqres = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
@@ -559,13 +570,25 @@ static int __devinit vt8500_serial_probe(struct platform_device *pdev)
if (!vt8500_port)
return -ENOMEM;
+ /* calculate the port id */
+ port = find_first_zero_bit(&vt8500_ports_in_use,
+ sizeof(vt8500_ports_in_use));
+ if (port > VT8500_MAX_PORTS)
+ return -ENODEV;
+
+ /* reserve the port id */
+ if (test_and_set_bit(port, &vt8500_ports_in_use)) {
+ /* port already in use - shouldn't really happen */
+ return -EBUSY;
+ }
+
vt8500_port->uart.type = PORT_VT8500;
vt8500_port->uart.iotype = UPIO_MEM;
vt8500_port->uart.mapbase = mmres->start;
vt8500_port->uart.irq = irqres->start;
vt8500_port->uart.fifosize = 16;
vt8500_port->uart.ops = &vt8500_uart_pops;
- vt8500_port->uart.line = pdev->id;
+ vt8500_port->uart.line = port;
vt8500_port->uart.dev = &pdev->dev;
vt8500_port->uart.flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
vt8500_port->uart.uartclk = 24000000;
@@ -579,7 +602,7 @@ static int __devinit vt8500_serial_probe(struct platform_device *pdev)
goto err;
}
- vt8500_uart_ports[pdev->id] = vt8500_port;
+ vt8500_uart_ports[port] = vt8500_port;
uart_add_one_port(&vt8500_uart_driver, &vt8500_port->uart);
@@ -603,12 +626,18 @@ static int __devexit vt8500_serial_remove(struct platform_device *pdev)
return 0;
}
+static const struct of_device_id wmt_dt_ids[] = {
+ { .compatible = "via,vt8500-uart", },
+ {}
+};
+
static struct platform_driver vt8500_platform_driver = {
.probe = vt8500_serial_probe,
.remove = __devexit_p(vt8500_serial_remove),
.driver = {
.name = "vt8500_serial",
.owner = THIS_MODULE,
+ .of_match_table = of_match_ptr(wmt_dt_ids),
},
};
@@ -642,4 +671,4 @@ module_exit(vt8500_serial_exit);
MODULE_AUTHOR("Alexey Charkov <alchark-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>");
MODULE_DESCRIPTION("Driver for vt8500 serial device");
-MODULE_LICENSE("GPL");
+MODULE_LICENSE("GPL v2");
--
1.7.9.5
^ permalink raw reply related
* [PATCHv3 2/9] rtc: vt8500: Add devicetree support for vt8500-rtc
From: Tony Prisk @ 2012-08-21 20:47 UTC (permalink / raw)
To: vt8500-wm8505-linux-kernel
Cc: Alessandro Zummo, linux-fbdev, Russell King, Linus Walleij,
Arnd Bergmann, Florian Tobias Schandinat, Greg Kroah-Hartman,
devicetree-discuss, linux-usb, linux-kernel, Grant Likely,
Tony Prisk, Rob Herring, Rob Landley, linux-serial, rtc-linux,
Stephen Warren, Mike Turquette, linux-arm-kernel, Alan Cox
In-Reply-To: <1345582058-2291-1-git-send-email-linux@prisktech.co.nz>
Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
---
drivers/rtc/rtc-vt8500.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/rtc/rtc-vt8500.c b/drivers/rtc/rtc-vt8500.c
index 9e94fb1..07bf193 100644
--- a/drivers/rtc/rtc-vt8500.c
+++ b/drivers/rtc/rtc-vt8500.c
@@ -23,6 +23,7 @@
#include <linux/bcd.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
+#include <linux/of.h>
/*
* Register definitions
@@ -302,12 +303,18 @@ static int __devexit vt8500_rtc_remove(struct platform_device *pdev)
return 0;
}
+static const struct of_device_id wmt_dt_ids[] = {
+ { .compatible = "via,vt8500-rtc", },
+ {}
+};
+
static struct platform_driver vt8500_rtc_driver = {
.probe = vt8500_rtc_probe,
.remove = __devexit_p(vt8500_rtc_remove),
.driver = {
.name = "vt8500-rtc",
.owner = THIS_MODULE,
+ .of_match_table = of_match_ptr(wmt_dt_ids),
},
};
@@ -315,5 +322,5 @@ module_platform_driver(vt8500_rtc_driver);
MODULE_AUTHOR("Alexey Charkov <alchark@gmail.com>");
MODULE_DESCRIPTION("VIA VT8500 SoC Realtime Clock Driver (RTC)");
-MODULE_LICENSE("GPL");
+MODULE_LICENSE("GPL v2");
MODULE_ALIAS("platform:vt8500-rtc");
--
1.7.9.5
^ permalink raw reply related
* [PATCHv3 1/9] arm: vt8500: Add device tree files for VIA/Wondermedia SoC's
From: Tony Prisk @ 2012-08-21 20:47 UTC (permalink / raw)
To: vt8500-wm8505-linux-kernel
Cc: Alessandro Zummo, linux-fbdev, Russell King, Linus Walleij,
Arnd Bergmann, Florian Tobias Schandinat, Greg Kroah-Hartman,
devicetree-discuss, linux-usb, linux-kernel, Grant Likely,
Tony Prisk, Rob Herring, Rob Landley, linux-serial, rtc-linux,
Stephen Warren, Mike Turquette, linux-arm-kernel, Alan Cox
In-Reply-To: <1345582058-2291-1-git-send-email-linux@prisktech.co.nz>
Add device tree files for VT8500, WM8505 and WM8650 SoC's and
reference boards.
Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
---
arch/arm/boot/dts/vt8500-bv07.dts | 31 +++++++++
arch/arm/boot/dts/vt8500.dtsi | 100 +++++++++++++++++++++++++++
arch/arm/boot/dts/wm8505-ref.dts | 31 +++++++++
arch/arm/boot/dts/wm8505.dtsi | 126 +++++++++++++++++++++++++++++++++
arch/arm/boot/dts/wm8650-mid.dts | 31 +++++++++
arch/arm/boot/dts/wm8650.dtsi | 138 +++++++++++++++++++++++++++++++++++++
6 files changed, 457 insertions(+)
create mode 100644 arch/arm/boot/dts/vt8500-bv07.dts
create mode 100644 arch/arm/boot/dts/vt8500.dtsi
create mode 100644 arch/arm/boot/dts/wm8505-ref.dts
create mode 100644 arch/arm/boot/dts/wm8505.dtsi
create mode 100644 arch/arm/boot/dts/wm8650-mid.dts
create mode 100644 arch/arm/boot/dts/wm8650.dtsi
diff --git a/arch/arm/boot/dts/vt8500-bv07.dts b/arch/arm/boot/dts/vt8500-bv07.dts
new file mode 100644
index 0000000..339a664
--- /dev/null
+++ b/arch/arm/boot/dts/vt8500-bv07.dts
@@ -0,0 +1,31 @@
+/*
+ * vt8500-bv07.dts - Device tree file for Benign BV07 Netbook
+ *
+ * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
+ *
+ * Licensed under GPLv2 or later
+ */
+
+/dts-v1/;
+/include/ "vt8500.dtsi"
+
+/ {
+ model = "Benign BV07 Netbook";
+
+ /*
+ * Display node is based on Sascha Hauer's patch on dri-devel.
+ * Added a bpp property to calculate the size of the framebuffer
+ * until the binding is formalized.
+ */
+ display: display {
+ xres = <800>;
+ yres = <480>;
+ left-margin = <88>;
+ right-margin = <40>;
+ hsync-len = <0>;
+ upper-margin = <32>;
+ lower-margin = <11>;
+ vsync-len = <1>;
+ bpp = <16>;
+ };
+};
diff --git a/arch/arm/boot/dts/vt8500.dtsi b/arch/arm/boot/dts/vt8500.dtsi
new file mode 100644
index 0000000..78571d5
--- /dev/null
+++ b/arch/arm/boot/dts/vt8500.dtsi
@@ -0,0 +1,100 @@
+/*
+ * vt8500.dtsi - Device tree file for VIA VT8500 SoC
+ *
+ * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
+ *
+ * Licensed under GPLv2 or later
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+ compatible = "via,vt8500";
+
+ soc {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "simple-bus";
+ ranges;
+ interrupt-parent = <&intc>;
+
+ intc: interrupt-controller@d8140000 {
+ compatible = "via,vt8500-intc";
+ interrupt-controller;
+ reg = <0xd8140000 0x10000>;
+ #interrupt-cells = <1>;
+ };
+
+ gpio: gpio-controller@d8110000 {
+ compatible = "via,vt8500-gpio";
+ gpio-controller;
+ reg = <0xd8110000 0x10000>;
+ #gpio-cells = <3>;
+ };
+
+ pmc@d8130000 {
+ compatible = "via,vt8500-pmc";
+ reg = <0xd8130000 0x1000>;
+ };
+
+ timer@d8130100 {
+ compatible = "via,vt8500-timer";
+ reg = <0xd8130100 0x28>;
+ interrupts = <36>;
+ };
+
+ ehci@d8007900 {
+ compatible = "via,vt8500-ehci";
+ reg = <0xd8007900 0x200>;
+ interrupts = <43>;
+ };
+
+ uhci@d8007b00 {
+ compatible = "platform-uhci";
+ reg = <0xd8007b00 0x200>;
+ interrupts = <43>;
+ };
+
+ fb@d800e400 {
+ compatible = "via,vt8500-fb";
+ reg = <0xd800e400 0x400>;
+ interrupts = <12>;
+ via,display = <&display>;
+ };
+
+ ge_rops@d8050400 {
+ compatible = "wm,prizm-ge-rops";
+ reg = <0xd8050400 0x100>;
+ };
+
+ uart@d8200000 {
+ compatible = "via,vt8500-uart";
+ reg = <0xd8200000 0x1040>;
+ interrupts = <32>;
+ };
+
+ uart@d82b0000 {
+ compatible = "via,vt8500-uart";
+ reg = <0xd82b0000 0x1040>;
+ interrupts = <33>;
+ };
+
+ uart@d8210000 {
+ compatible = "via,vt8500-uart";
+ reg = <0xd8210000 0x1040>;
+ interrupts = <47>;
+ };
+
+ uart@d82c0000 {
+ compatible = "via,vt8500-uart";
+ reg = <0xd82c0000 0x1040>;
+ interrupts = <50>;
+ };
+
+ rtc@d8100000 {
+ compatible = "via,vt8500-rtc";
+ reg = <0xd8100000 0x10000>;
+ interrupts = <48>;
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/wm8505-ref.dts b/arch/arm/boot/dts/wm8505-ref.dts
new file mode 100644
index 0000000..fcd9836
--- /dev/null
+++ b/arch/arm/boot/dts/wm8505-ref.dts
@@ -0,0 +1,31 @@
+/*
+ * wm8505-ref.dts - Device tree file for Wondermedia WM8505 reference netbook
+ *
+ * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
+ *
+ * Licensed under GPLv2 or later
+ */
+
+/dts-v1/;
+/include/ "wm8505.dtsi"
+
+/ {
+ model = "Wondermedia WM8505 Netbook";
+
+ /*
+ * Display node is based on Sascha Hauer's patch on dri-devel.
+ * Added a bpp property to calculate the size of the framebuffer
+ * until the binding is formalized.
+ */
+ display: display {
+ xres = <800>;
+ yres = <480>;
+ left-margin = <88>;
+ right-margin = <40>;
+ hsync-len = <0>;
+ upper-margin = <32>;
+ lower-margin = <11>;
+ vsync-len = <1>;
+ bpp = <32>;
+ };
+};
diff --git a/arch/arm/boot/dts/wm8505.dtsi b/arch/arm/boot/dts/wm8505.dtsi
new file mode 100644
index 0000000..64a3d7f
--- /dev/null
+++ b/arch/arm/boot/dts/wm8505.dtsi
@@ -0,0 +1,126 @@
+/*
+ * wm8505.dtsi - Device tree file for Wondermedia WM8505 SoC
+ *
+ * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
+ *
+ * Licensed under GPLv2 or later
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+ compatible = "wm,wm8505";
+
+ cpus {
+ cpu@0 {
+ compatible = "arm,arm926ejs";
+ };
+ };
+
+ soc {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "simple-bus";
+ ranges;
+ interrupt-parent = <&intc0>;
+
+ intc0: interrupt-controller@d8140000 {
+ compatible = "via,vt8500-intc";
+ interrupt-controller;
+ reg = <0xd8140000 0x10000>;
+ #interrupt-cells = <1>;
+ };
+
+ /* Secondary IC cascaded to intc0 */
+ intc1: interrupt-controller@d8150000 {
+ compatible = "via,vt8500-intc";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ reg = <0xD8150000 0x10000>;
+ interrupts = <56 57 58 59 60 61 62 63>;
+ };
+
+ gpio: gpio-controller@d8110000 {
+ compatible = "wm,wm8505-gpio";
+ gpio-controller;
+ reg = <0xd8110000 0x10000>;
+ #gpio-cells = <3>;
+ };
+
+ pmc@d8130000 {
+ compatible = "via,vt8500-pmc";
+ reg = <0xd8130000 0x1000>;
+ };
+
+ timer@d8130100 {
+ compatible = "via,vt8500-timer";
+ reg = <0xd8130100 0x28>;
+ interrupts = <36>;
+ };
+
+ ehci@d8007100 {
+ compatible = "via,vt8500-ehci";
+ reg = <0xd8007100 0x200>;
+ interrupts = <43>;
+ };
+
+ uhci@d8007300 {
+ compatible = "platform-uhci";
+ reg = <0xd8007300 0x200>;
+ interrupts = <43>;
+ };
+
+ fb@d8050800 {
+ compatible = "wm,wm8505-fb";
+ reg = <0xd8050800 0x200>;
+ via,display = <&display>;
+ };
+
+ ge_rops@d8050400 {
+ compatible = "wm,prizm-ge-rops";
+ reg = <0xd8050400 0x100>;
+ };
+
+ uart@d8200000 {
+ compatible = "via,vt8500-uart";
+ reg = <0xd8200000 0x1040>;
+ interrupts = <32>;
+ };
+
+ uart@d82b0000 {
+ compatible = "via,vt8500-uart";
+ reg = <0xd82b0000 0x1040>;
+ interrupts = <33>;
+ };
+
+ uart@d8210000 {
+ compatible = "via,vt8500-uart";
+ reg = <0xd8210000 0x1040>;
+ interrupts = <47>;
+ };
+
+ uart@d82c0000 {
+ compatible = "via,vt8500-uart";
+ reg = <0xd82c0000 0x1040>;
+ interrupts = <50>;
+ };
+
+ uart@d8370000 {
+ compatible = "via,vt8500-uart";
+ reg = <0xd8370000 0x1040>;
+ interrupts = <31>;
+ };
+
+ uart@d8380000 {
+ compatible = "via,vt8500-uart";
+ reg = <0xd8380000 0x1040>;
+ interrupts = <30>;
+ };
+
+ rtc@d8100000 {
+ compatible = "via,vt8500-rtc";
+ reg = <0xd8100000 0x10000>;
+ interrupts = <48>;
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/wm8650-mid.dts b/arch/arm/boot/dts/wm8650-mid.dts
new file mode 100644
index 0000000..d37dbf0
--- /dev/null
+++ b/arch/arm/boot/dts/wm8650-mid.dts
@@ -0,0 +1,31 @@
+/*
+ * wm8650-mid.dts - Device tree file for Wondermedia WM8650-MID Tablet
+ *
+ * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
+ *
+ * Licensed under GPLv2 or later
+ */
+
+/dts-v1/;
+/include/ "wm8650.dtsi"
+
+/ {
+ model = "Wondermedia WM8650-MID Tablet";
+
+ /*
+ * Display node is based on Sascha Hauer's patch on dri-devel.
+ * Added a bpp property to calculate the size of the framebuffer
+ * until the binding is formalized.
+ */
+ display: display {
+ xres = <800>;
+ yres = <480>;
+ left-margin = <88>;
+ right-margin = <40>;
+ hsync-len = <0>;
+ upper-margin = <32>;
+ lower-margin = <11>;
+ vsync-len = <1>;
+ bpp = <16>;
+ };
+};
diff --git a/arch/arm/boot/dts/wm8650.dtsi b/arch/arm/boot/dts/wm8650.dtsi
new file mode 100644
index 0000000..e4ca840
--- /dev/null
+++ b/arch/arm/boot/dts/wm8650.dtsi
@@ -0,0 +1,138 @@
+/*
+ * wm8650.dtsi - Device tree file for Wondermedia WM8650 SoC
+ *
+ * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
+ *
+ * Licensed under GPLv2 or later
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+ compatible = "wm,wm8650";
+
+ soc {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "simple-bus";
+ ranges;
+ interrupt-parent = <&intc0>;
+
+ intc0: interrupt-controller@d8140000 {
+ compatible = "via,vt8500-intc";
+ interrupt-controller;
+ reg = <0xd8140000 0x10000>;
+ #interrupt-cells = <1>;
+ };
+
+ /* Secondary IC cascaded to intc0 */
+ intc1: interrupt-controller@d8150000 {
+ compatible = "via,vt8500-intc";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ reg = <0xD8150000 0x10000>;
+ interrupts = <56 57 58 59 60 61 62 63>;
+ };
+
+ gpio: gpio-controller@d8110000 {
+ compatible = "wm,wm8650-gpio";
+ gpio-controller;
+ reg = <0xd8110000 0x10000>;
+ #gpio-cells = <3>;
+ };
+
+ pmc@d8130000 {
+ compatible = "via,vt8500-pmc";
+ reg = <0xd8130000 0x1000>;
+
+ clocks {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ref25: ref25M {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <25000000>;
+ };
+
+ plla: plla {
+ #clock-cells = <0>;
+ compatible = "wm,wm8650-pll-clock";
+ clocks = <&ref25>;
+ reg = <0x200>;
+ };
+
+ pllb: pllb {
+ #clock-cells = <0>;
+ compatible = "wm,wm8650-pll-clock";
+ clocks = <&ref25>;
+ reg = <0x204>;
+ };
+
+ arm: arm {
+ #clock-cells = <0>;
+ compatible = "via,vt8500-device-clock";
+ clocks = <&plla>;
+ divisor-reg = <0x300>;
+ };
+
+ sdhc: sdhc {
+ #clock-cells = <0>;
+ compatible = "via,vt8500-device-clock";
+ clocks = <&pllb>;
+ divisor-reg = <0x328>;
+ divisor-mask = <0x3f>;
+ enable-reg = <0x254>;
+ enable-bit = <18>;
+ };
+ };
+ };
+
+ timer@d8130100 {
+ compatible = "via,vt8500-timer";
+ reg = <0xd8130100 0x28>;
+ interrupts = <36>;
+ };
+
+ ehci@d8007900 {
+ compatible = "via,vt8500-ehci";
+ reg = <0xd8007900 0x200>;
+ interrupts = <43>;
+ };
+
+ uhci@d8007b00 {
+ compatible = "platform-uhci";
+ reg = <0xd8007b00 0x200>;
+ interrupts = <43>;
+ };
+
+ fb@d8050800 {
+ compatible = "wm,wm8505-fb";
+ reg = <0xd8050800 0x200>;
+ via,display = <&display>;
+ };
+
+ ge_rops@d8050400 {
+ compatible = "wm,prizm-ge-rops";
+ reg = <0xd8050400 0x100>;
+ };
+
+ uart@d8200000 {
+ compatible = "via,vt8500-uart";
+ reg = <0xd8200000 0x1040>;
+ interrupts = <32>;
+ };
+
+ uart@d82b0000 {
+ compatible = "via,vt8500-uart";
+ reg = <0xd82b0000 0x1040>;
+ interrupts = <33>;
+ };
+
+ rtc@d8100000 {
+ compatible = "via,vt8500-rtc";
+ reg = <0xd8100000 0x10000>;
+ interrupts = <48>;
+ };
+ };
+};
--
1.7.9.5
^ permalink raw reply related
* [PATCHv3 0/9] *** ARM: Update arch-vt8500 to Devicetree ***
From: Tony Prisk @ 2012-08-21 20:47 UTC (permalink / raw)
To: vt8500-wm8505-linux-kernel-/JYPxA39Uh6Zox4op4iWzw
Cc: Alessandro Zummo, linux-fbdev-u79uwXL29TY76Z2rM5mHXA,
Russell King, Linus Walleij, Florian Tobias Schandinat,
Greg Kroah-Hartman, devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
linux-usb-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, Rob Herring,
linux-serial-u79uwXL29TY76Z2rM5mHXA,
rtc-linux-/JYPxA39Uh5TLH3MbocFFw, Stephen Warren, Mike Turquette,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Alan Cox
This patchset updates arch-vt8500 to devicetree and removes all the old-style
code. Support for WM8650 has also been added.
Example dts/dtsi files are given for the three currently supported models.
Major changes:
GPIO code has been converted to a platform_device and rewritten as WM8505
support was broken. Add support for WM8650 gpio controller.
UHCI support was missing. Added this as a generic non-pci uhci controller as
it doesn't require anything special. Should be usable by any system that doesn't
have special requirements to get the UHCI controller working.
Framebuffer code patched to support WM8650. The bindings for this are of concern
but there doesn't seem to be a formalized binding yet. This patch is based off
Sascha Hauer's current patch on the dri-devel mailing list and should be easily
patched out when its finalized.
Patchset based on Arnd's arm-soc/for-next branch.
Could I get this reviewed, hopefully for inclusion into v3.7.
Regards
Tony Prisk
Changes
v2:
Cleanup style/formatting errors
Removed erroneous commit message about GPIO not being converted to devicetree
Corrected arch-vt8500/irq.c header to correct filename
Changed GPIO driver to use module_platform_driver()
Renamed vt8500_gpio_bank_regs -> vt8500_gpio_bank_regoffsets
Changed vt8500_gpio_bank_regoffset fields to unsigned int
Changed bit-setting code to use BIT() macro
Removed of_find_compatible() and use pdev->dev.of_node in _probe()
Removed regoff field and related code - leftover from old design
Added kerneldoc regarding struct vt8500_gpio_bank_regoffsets fields
Update MODULE_LICENSE on all platform devices to "GPL v2" to match their headers
Renamed dts board files to clarify product names
v3:
Corrected serial driver issue after porting to device tree. pdev->id no longer
valid.
Corrected irq.c to properly initialize slaved interrupt controller.
Updated framebuffer drivers to use phandles for display node.
Corrected dts definitions for updated framebuffer driver.
EHCI/UHCI patch (Patch 4/9) already in -next via usb-next tree.
Included common clock frame support.
Added initialization code to arch/arm/mach-vt8500/vt8500.c for clocks.
Updated wm8650.dtsi to include basic clocks.
Tony Prisk (9):
arm: vt8500: Add device tree files for VIA/Wondermedia SoC's
rtc: vt8500: Add devicetree support for vt8500-rtc
serial: vt8500: Add devicetree support for vt8500-serial
usb: vt8500: Add devicetree support for vt8500-ehci and -uhci.
video: vt8500: Add devicetree support for vt8500-fb and wm8505-fb
arm: vt8500: Update arch-vt8500 to devicetree support.
arm: vt8500: doc: Add device tree bindings for arch-vt8500 devices
arm: vt8500: gpio: Devicetree support for arch-vt8500
arm: vt8500: clk: Add Common Clock Framework support
Documentation/devicetree/bindings/arm/vt8500.txt | 15 +
.../bindings/arm/vt8500/via,vt8500-intc.txt | 16 +
.../bindings/arm/vt8500/via,vt8500-pmc.txt | 13 +
.../bindings/arm/vt8500/via,vt8500-timer.txt | 15 +
Documentation/devicetree/bindings/clock/vt8500.txt | 72 +++
.../devicetree/bindings/gpio/gpio_vt8500.txt | 24 +
.../devicetree/bindings/rtc/via,vt8500-rtc.txt | 15 +
.../bindings/tty/serial/via,vt8500-uart.txt | 15 +
.../devicetree/bindings/usb/platform-uhci.txt | 15 +
.../devicetree/bindings/usb/via,vt8500-ehci.txt | 15 +
.../devicetree/bindings/vendor-prefixes.txt | 2 +
.../devicetree/bindings/video/via,vt8500-fb.txt | 48 ++
.../devicetree/bindings/video/wm,prizm-ge-rops.txt | 13 +
.../devicetree/bindings/video/wm,wm8505-fb.txt | 22 +
arch/arm/Kconfig | 5 +
arch/arm/boot/dts/vt8500-bv07.dts | 31 ++
arch/arm/boot/dts/vt8500.dtsi | 100 ++++
arch/arm/boot/dts/wm8505-ref.dts | 31 ++
arch/arm/boot/dts/wm8505.dtsi | 126 +++++
arch/arm/boot/dts/wm8650-mid.dts | 31 ++
arch/arm/boot/dts/wm8650.dtsi | 138 ++++++
arch/arm/mach-vt8500/Kconfig | 72 +--
arch/arm/mach-vt8500/Makefile | 9 +-
arch/arm/mach-vt8500/bv07.c | 80 ----
arch/arm/mach-vt8500/common.h | 28 ++
arch/arm/mach-vt8500/devices-vt8500.c | 91 ----
arch/arm/mach-vt8500/devices-wm8505.c | 99 ----
arch/arm/mach-vt8500/devices.c | 270 -----------
arch/arm/mach-vt8500/devices.h | 88 ----
arch/arm/mach-vt8500/gpio.c | 240 ----------
arch/arm/mach-vt8500/include/mach/restart.h | 4 +-
arch/arm/mach-vt8500/include/mach/vt8500_irqs.h | 88 ----
arch/arm/mach-vt8500/include/mach/vt8500_regs.h | 79 ----
arch/arm/mach-vt8500/include/mach/wm8505_irqs.h | 115 -----
arch/arm/mach-vt8500/include/mach/wm8505_regs.h | 78 ---
arch/arm/mach-vt8500/irq.c | 209 +++++----
arch/arm/mach-vt8500/restart.c | 54 ---
arch/arm/mach-vt8500/timer.c | 67 ++-
arch/arm/mach-vt8500/vt8500.c | 196 ++++++++
arch/arm/mach-vt8500/wm8505_7in.c | 79 ----
drivers/clk/Makefile | 1 +
drivers/clk/clk-vt8500.c | 496 ++++++++++++++++++++
drivers/gpio/Kconfig | 6 +
drivers/gpio/Makefile | 1 +
drivers/gpio/gpio-vt8500.c | 313 ++++++++++++
drivers/rtc/rtc-vt8500.c | 9 +-
drivers/tty/serial/vt8500_serial.c | 37 +-
drivers/usb/host/Kconfig | 4 +-
drivers/usb/host/ehci-vt8500.c | 25 +-
drivers/usb/host/uhci-hcd.c | 5 +
drivers/usb/host/uhci-platform.c | 169 +++++++
drivers/video/Kconfig | 6 +-
drivers/video/vt8500lcdfb.c | 79 +++-
drivers/video/wm8505fb.c | 97 +++-
drivers/video/wmt_ge_rops.c | 9 +-
55 files changed, 2384 insertions(+), 1581 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/vt8500.txt
create mode 100644 Documentation/devicetree/bindings/arm/vt8500/via,vt8500-intc.txt
create mode 100644 Documentation/devicetree/bindings/arm/vt8500/via,vt8500-pmc.txt
create mode 100644 Documentation/devicetree/bindings/arm/vt8500/via,vt8500-timer.txt
create mode 100644 Documentation/devicetree/bindings/clock/vt8500.txt
create mode 100644 Documentation/devicetree/bindings/gpio/gpio_vt8500.txt
create mode 100644 Documentation/devicetree/bindings/rtc/via,vt8500-rtc.txt
create mode 100644 Documentation/devicetree/bindings/tty/serial/via,vt8500-uart.txt
create mode 100644 Documentation/devicetree/bindings/usb/platform-uhci.txt
create mode 100644 Documentation/devicetree/bindings/usb/via,vt8500-ehci.txt
create mode 100644 Documentation/devicetree/bindings/video/via,vt8500-fb.txt
create mode 100644 Documentation/devicetree/bindings/video/wm,prizm-ge-rops.txt
create mode 100644 Documentation/devicetree/bindings/video/wm,wm8505-fb.txt
create mode 100644 arch/arm/boot/dts/vt8500-bv07.dts
create mode 100644 arch/arm/boot/dts/vt8500.dtsi
create mode 100644 arch/arm/boot/dts/wm8505-ref.dts
create mode 100644 arch/arm/boot/dts/wm8505.dtsi
create mode 100644 arch/arm/boot/dts/wm8650-mid.dts
create mode 100644 arch/arm/boot/dts/wm8650.dtsi
delete mode 100644 arch/arm/mach-vt8500/bv07.c
create mode 100644 arch/arm/mach-vt8500/common.h
delete mode 100644 arch/arm/mach-vt8500/devices-vt8500.c
delete mode 100644 arch/arm/mach-vt8500/devices-wm8505.c
delete mode 100644 arch/arm/mach-vt8500/devices.c
delete mode 100644 arch/arm/mach-vt8500/devices.h
delete mode 100644 arch/arm/mach-vt8500/gpio.c
delete mode 100644 arch/arm/mach-vt8500/include/mach/vt8500_irqs.h
delete mode 100644 arch/arm/mach-vt8500/include/mach/vt8500_regs.h
delete mode 100644 arch/arm/mach-vt8500/include/mach/wm8505_irqs.h
delete mode 100644 arch/arm/mach-vt8500/include/mach/wm8505_regs.h
delete mode 100644 arch/arm/mach-vt8500/restart.c
create mode 100644 arch/arm/mach-vt8500/vt8500.c
delete mode 100644 arch/arm/mach-vt8500/wm8505_7in.c
create mode 100644 drivers/clk/clk-vt8500.c
create mode 100644 drivers/gpio/gpio-vt8500.c
create mode 100644 drivers/usb/host/uhci-platform.c
--
1.7.9.5
^ permalink raw reply
* Re: [PATCH v2] serial: pl011: honour serial aliases in device tree
From: Will Deacon @ 2012-08-21 20:42 UTC (permalink / raw)
To: Matthew Leach
Cc: gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org,
linux-serial-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
In-Reply-To: <1345564094-16565-1-git-send-email-matthew.leach-5wv7dgnIgG8@public.gmane.org>
Hi Matthew,
On Tue, Aug 21, 2012 at 04:48:14PM +0100, Matthew Leach wrote:
> diff --git a/drivers/tty/serial/amba-pl011.c b/drivers/tty/serial/amba-pl011.c
> index d3553b5..33c90f6 100644
> --- a/drivers/tty/serial/amba-pl011.c
> +++ b/drivers/tty/serial/amba-pl011.c
> @@ -52,6 +52,8 @@
> #include <linux/scatterlist.h>
> #include <linux/delay.h>
> #include <linux/types.h>
> +#include <linux/of.h>
> +#include <linux/of_device.h>
> #include <linux/pinctrl/consumer.h>
> #include <linux/sizes.h>
>
> @@ -1869,6 +1871,38 @@ static struct uart_driver amba_reg = {
> .cons = AMBA_CONSOLE,
> };
>
> +static int pl011_probe_dt_alias(int index, struct device *dev)
> +{
> + struct device_node *np;
> + static bool seen_dev_with_alias = false;
> + static bool seen_dev_without_alias = false;
> + int ret = index;
> +
> + if (!IS_ENABLED(CONFIG_OF))
> + return index;
May as well return ret here for consistency. With that:
Reviewed-by: Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>
I guess this goes via Greg's tree rather than the ARM one?
Will
^ permalink raw reply
* Re: [PATCH] serial: Remove orphaned header sc26198.h
From: Paul Bolle @ 2012-08-21 16:43 UTC (permalink / raw)
To: Alexander Shiyan; +Cc: linux-serial, linux-kernel, Greg Kroah-Hartman, Alan Cox
In-Reply-To: <1345564193-25994-1-git-send-email-shc_work@mail.ru>
On Tue, 2012-08-21 at 19:49 +0400, Alexander Shiyan wrote:
> This header was used by the driver "stallion", but the driver has
> been removed as a result of migration 2.4 -> 2.6 and the header is
> still present in the system and is not currently used by any driver.
> We can safely remove it.
>
> Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
> ---
> include/linux/sc26198.h | 533 -----------------------------------------------
commit afbaade3dc99838a0c39699bea175674f27322a1 ("delete seven tty
headers"), in - I think - tty.git's tty-next branch, already deleted
this and six other headers.
> 1 files changed, 0 insertions(+), 533 deletions(-)
> delete mode 100644 include/linux/sc26198.h
Paul Bolle
^ permalink raw reply
* [PATCH v2] serial: pl011: honour serial aliases in device tree
From: Matthew Leach @ 2012-08-21 15:48 UTC (permalink / raw)
To: linux-arm-kernel
Cc: linux-serial, will.deacon, gregkh, devicetree-discuss,
robherring2, Matthew Leach
If the order of UART nodes is changed in the device tree, then tty dev
devices are attached to different serial ports causing the console to
be directed to a different physical serial port. The "serial" aliases
in the device tree should prevent this.
This patch ensures that the UART driver creates tty devices that
honour these aliases if a device tree is present.
Acked-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Matthew Leach <matthew.leach@arm.com>
---
v2: use IS_ENABLED instead of ifdefs
drivers/tty/serial/amba-pl011.c | 36 ++++++++++++++++++++++++++++++++++++
1 files changed, 36 insertions(+), 0 deletions(-)
diff --git a/drivers/tty/serial/amba-pl011.c b/drivers/tty/serial/amba-pl011.c
index d3553b5..33c90f6 100644
--- a/drivers/tty/serial/amba-pl011.c
+++ b/drivers/tty/serial/amba-pl011.c
@@ -52,6 +52,8 @@
#include <linux/scatterlist.h>
#include <linux/delay.h>
#include <linux/types.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
#include <linux/pinctrl/consumer.h>
#include <linux/sizes.h>
@@ -1869,6 +1871,38 @@ static struct uart_driver amba_reg = {
.cons = AMBA_CONSOLE,
};
+static int pl011_probe_dt_alias(int index, struct device *dev)
+{
+ struct device_node *np;
+ static bool seen_dev_with_alias = false;
+ static bool seen_dev_without_alias = false;
+ int ret = index;
+
+ if (!IS_ENABLED(CONFIG_OF))
+ return index;
+
+ np = dev->of_node;
+ if (!np)
+ return ret;
+
+ ret = of_alias_get_id(np, "serial");
+ if (IS_ERR_VALUE(ret)) {
+ seen_dev_without_alias = true;
+ ret = index;
+ } else {
+ seen_dev_with_alias = true;
+ if (ret >= ARRAY_SIZE(amba_ports) || amba_ports[ret] != NULL) {
+ dev_warn(dev, "requested serial port %d not available.\n", ret);
+ ret = index;
+ }
+ }
+
+ if (seen_dev_with_alias && seen_dev_without_alias)
+ dev_warn(dev, "aliased and non-aliased serial devices found in device tree. Serial port enumeration may be unpredictable.\n");
+
+ return ret;
+}
+
static int pl011_probe(struct amba_device *dev, const struct amba_id *id)
{
struct uart_amba_port *uap;
@@ -1891,6 +1925,8 @@ static int pl011_probe(struct amba_device *dev, const struct amba_id *id)
goto out;
}
+ i = pl011_probe_dt_alias(i, &dev->dev);
+
base = ioremap(dev->res.start, resource_size(&dev->res));
if (!base) {
ret = -ENOMEM;
--
1.7.0.4
^ permalink raw reply related
* [PATCH] serial: Remove orphaned header sc26198.h
From: Alexander Shiyan @ 2012-08-21 15:49 UTC (permalink / raw)
To: linux-serial; +Cc: linux-kernel, Greg Kroah-Hartman, Alan Cox, Alexander Shiyan
This header was used by the driver "stallion", but the driver has
been removed as a result of migration 2.4 -> 2.6 and the header is
still present in the system and is not currently used by any driver.
We can safely remove it.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
---
include/linux/sc26198.h | 533 -----------------------------------------------
1 files changed, 0 insertions(+), 533 deletions(-)
delete mode 100644 include/linux/sc26198.h
diff --git a/include/linux/sc26198.h b/include/linux/sc26198.h
deleted file mode 100644
index 7ca35ab..0000000
--- a/include/linux/sc26198.h
+++ /dev/null
@@ -1,533 +0,0 @@
-/*****************************************************************************/
-
-/*
- * sc26198.h -- SC26198 UART hardware info.
- *
- * Copyright (C) 1995-1998 Stallion Technologies
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-/*****************************************************************************/
-#ifndef _SC26198_H
-#define _SC26198_H
-/*****************************************************************************/
-
-/*
- * Define the number of async ports per sc26198 uart device.
- */
-#define SC26198_PORTS 8
-
-/*
- * Baud rate timing clocks. All derived from a master 14.7456 MHz clock.
- */
-#define SC26198_MASTERCLOCK 14745600L
-#define SC26198_DCLK (SC26198_MASTERCLOCK)
-#define SC26198_CCLK (SC26198_MASTERCLOCK / 2)
-#define SC26198_BCLK (SC26198_MASTERCLOCK / 4)
-
-/*
- * Define internal FIFO sizes for the 26198 ports.
- */
-#define SC26198_TXFIFOSIZE 16
-#define SC26198_RXFIFOSIZE 16
-
-/*****************************************************************************/
-
-/*
- * Global register definitions. These registers are global to each 26198
- * device, not specific ports on it.
- */
-#define TSTR 0x0d
-#define GCCR 0x0f
-#define ICR 0x1b
-#define WDTRCR 0x1d
-#define IVR 0x1f
-#define BRGTRUA 0x84
-#define GPOSR 0x87
-#define GPOC 0x8b
-#define UCIR 0x8c
-#define CIR 0x8c
-#define BRGTRUB 0x8d
-#define GRXFIFO 0x8e
-#define GTXFIFO 0x8e
-#define GCCR2 0x8f
-#define BRGTRLA 0x94
-#define GPOR 0x97
-#define GPOD 0x9b
-#define BRGTCR 0x9c
-#define GICR 0x9c
-#define BRGTRLB 0x9d
-#define GIBCR 0x9d
-#define GITR 0x9f
-
-/*
- * Per port channel registers. These are the register offsets within
- * the port address space, so need to have the port address (0 to 7)
- * inserted in bit positions 4:6.
- */
-#define MR0 0x00
-#define MR1 0x01
-#define IOPCR 0x02
-#define BCRBRK 0x03
-#define BCRCOS 0x04
-#define BCRX 0x06
-#define BCRA 0x07
-#define XONCR 0x08
-#define XOFFCR 0x09
-#define ARCR 0x0a
-#define RXCSR 0x0c
-#define TXCSR 0x0e
-#define MR2 0x80
-#define SR 0x81
-#define SCCR 0x81
-#define ISR 0x82
-#define IMR 0x82
-#define TXFIFO 0x83
-#define RXFIFO 0x83
-#define IPR 0x84
-#define IOPIOR 0x85
-#define XISR 0x86
-
-/*
- * For any given port calculate the address to use to access a specified
- * register. This is only used for unusual access, mostly this is done
- * through the assembler access routines.
- */
-#define SC26198_PORTREG(port,reg) ((((port) & 0x07) << 4) | (reg))
-
-/*****************************************************************************/
-
-/*
- * Global configuration control register bit definitions.
- */
-#define GCCR_NOACK 0x00
-#define GCCR_IVRACK 0x02
-#define GCCR_IVRCHANACK 0x04
-#define GCCR_IVRTYPCHANACK 0x06
-#define GCCR_ASYNCCYCLE 0x00
-#define GCCR_SYNCCYCLE 0x40
-
-/*****************************************************************************/
-
-/*
- * Mode register 0 bit definitions.
- */
-#define MR0_ADDRNONE 0x00
-#define MR0_AUTOWAKE 0x01
-#define MR0_AUTODOZE 0x02
-#define MR0_AUTOWAKEDOZE 0x03
-#define MR0_SWFNONE 0x00
-#define MR0_SWFTX 0x04
-#define MR0_SWFRX 0x08
-#define MR0_SWFRXTX 0x0c
-#define MR0_TXMASK 0x30
-#define MR0_TXEMPTY 0x00
-#define MR0_TXHIGH 0x10
-#define MR0_TXHALF 0x20
-#define MR0_TXRDY 0x00
-#define MR0_ADDRNT 0x00
-#define MR0_ADDRT 0x40
-#define MR0_SWFNT 0x00
-#define MR0_SWFT 0x80
-
-/*
- * Mode register 1 bit definitions.
- */
-#define MR1_CS5 0x00
-#define MR1_CS6 0x01
-#define MR1_CS7 0x02
-#define MR1_CS8 0x03
-#define MR1_PAREVEN 0x00
-#define MR1_PARODD 0x04
-#define MR1_PARENB 0x00
-#define MR1_PARFORCE 0x08
-#define MR1_PARNONE 0x10
-#define MR1_PARSPECIAL 0x18
-#define MR1_ERRCHAR 0x00
-#define MR1_ERRBLOCK 0x20
-#define MR1_ISRUNMASKED 0x00
-#define MR1_ISRMASKED 0x40
-#define MR1_AUTORTS 0x80
-
-/*
- * Mode register 2 bit definitions.
- */
-#define MR2_STOP1 0x00
-#define MR2_STOP15 0x01
-#define MR2_STOP2 0x02
-#define MR2_STOP916 0x03
-#define MR2_RXFIFORDY 0x00
-#define MR2_RXFIFOHALF 0x04
-#define MR2_RXFIFOHIGH 0x08
-#define MR2_RXFIFOFULL 0x0c
-#define MR2_AUTOCTS 0x10
-#define MR2_TXRTS 0x20
-#define MR2_MODENORM 0x00
-#define MR2_MODEAUTOECHO 0x40
-#define MR2_MODELOOP 0x80
-#define MR2_MODEREMECHO 0xc0
-
-/*****************************************************************************/
-
-/*
- * Baud Rate Generator (BRG) selector values.
- */
-#define BRG_50 0x00
-#define BRG_75 0x01
-#define BRG_150 0x02
-#define BRG_200 0x03
-#define BRG_300 0x04
-#define BRG_450 0x05
-#define BRG_600 0x06
-#define BRG_900 0x07
-#define BRG_1200 0x08
-#define BRG_1800 0x09
-#define BRG_2400 0x0a
-#define BRG_3600 0x0b
-#define BRG_4800 0x0c
-#define BRG_7200 0x0d
-#define BRG_9600 0x0e
-#define BRG_14400 0x0f
-#define BRG_19200 0x10
-#define BRG_28200 0x11
-#define BRG_38400 0x12
-#define BRG_57600 0x13
-#define BRG_115200 0x14
-#define BRG_230400 0x15
-#define BRG_GIN0 0x16
-#define BRG_GIN1 0x17
-#define BRG_CT0 0x18
-#define BRG_CT1 0x19
-#define BRG_RX2TX316 0x1b
-#define BRG_RX2TX31 0x1c
-
-#define SC26198_MAXBAUD 921600
-
-/*****************************************************************************/
-
-/*
- * Command register command definitions.
- */
-#define CR_NULL 0x04
-#define CR_ADDRNORMAL 0x0c
-#define CR_RXRESET 0x14
-#define CR_TXRESET 0x1c
-#define CR_CLEARRXERR 0x24
-#define CR_BREAKRESET 0x2c
-#define CR_TXSTARTBREAK 0x34
-#define CR_TXSTOPBREAK 0x3c
-#define CR_RTSON 0x44
-#define CR_RTSOFF 0x4c
-#define CR_ADDRINIT 0x5c
-#define CR_RXERRBLOCK 0x6c
-#define CR_TXSENDXON 0x84
-#define CR_TXSENDXOFF 0x8c
-#define CR_GANGXONSET 0x94
-#define CR_GANGXOFFSET 0x9c
-#define CR_GANGXONINIT 0xa4
-#define CR_GANGXOFFINIT 0xac
-#define CR_HOSTXON 0xb4
-#define CR_HOSTXOFF 0xbc
-#define CR_CANCELXOFF 0xc4
-#define CR_ADDRRESET 0xdc
-#define CR_RESETALLPORTS 0xf4
-#define CR_RESETALL 0xfc
-
-#define CR_RXENABLE 0x01
-#define CR_TXENABLE 0x02
-
-/*****************************************************************************/
-
-/*
- * Channel status register.
- */
-#define SR_RXRDY 0x01
-#define SR_RXFULL 0x02
-#define SR_TXRDY 0x04
-#define SR_TXEMPTY 0x08
-#define SR_RXOVERRUN 0x10
-#define SR_RXPARITY 0x20
-#define SR_RXFRAMING 0x40
-#define SR_RXBREAK 0x80
-
-#define SR_RXERRS (SR_RXPARITY | SR_RXFRAMING | SR_RXOVERRUN)
-
-/*****************************************************************************/
-
-/*
- * Interrupt status register and interrupt mask register bit definitions.
- */
-#define IR_TXRDY 0x01
-#define IR_RXRDY 0x02
-#define IR_RXBREAK 0x04
-#define IR_XONXOFF 0x10
-#define IR_ADDRRECOG 0x20
-#define IR_RXWATCHDOG 0x40
-#define IR_IOPORT 0x80
-
-/*****************************************************************************/
-
-/*
- * Interrupt vector register field definitions.
- */
-#define IVR_CHANMASK 0x07
-#define IVR_TYPEMASK 0x18
-#define IVR_CONSTMASK 0xc0
-
-#define IVR_RXDATA 0x10
-#define IVR_RXBADDATA 0x18
-#define IVR_TXDATA 0x08
-#define IVR_OTHER 0x00
-
-/*****************************************************************************/
-
-/*
- * BRG timer control register bit definitions.
- */
-#define BRGCTCR_DISABCLK0 0x00
-#define BRGCTCR_ENABCLK0 0x08
-#define BRGCTCR_DISABCLK1 0x00
-#define BRGCTCR_ENABCLK1 0x80
-
-#define BRGCTCR_0SCLK16 0x00
-#define BRGCTCR_0SCLK32 0x01
-#define BRGCTCR_0SCLK64 0x02
-#define BRGCTCR_0SCLK128 0x03
-#define BRGCTCR_0X1 0x04
-#define BRGCTCR_0X12 0x05
-#define BRGCTCR_0IO1A 0x06
-#define BRGCTCR_0GIN0 0x07
-
-#define BRGCTCR_1SCLK16 0x00
-#define BRGCTCR_1SCLK32 0x10
-#define BRGCTCR_1SCLK64 0x20
-#define BRGCTCR_1SCLK128 0x30
-#define BRGCTCR_1X1 0x40
-#define BRGCTCR_1X12 0x50
-#define BRGCTCR_1IO1B 0x60
-#define BRGCTCR_1GIN1 0x70
-
-/*****************************************************************************/
-
-/*
- * Watch dog timer enable register.
- */
-#define WDTRCR_ENABALL 0xff
-
-/*****************************************************************************/
-
-/*
- * XON/XOFF interrupt status register.
- */
-#define XISR_TXCHARMASK 0x03
-#define XISR_TXCHARNORMAL 0x00
-#define XISR_TXWAIT 0x01
-#define XISR_TXXOFFPEND 0x02
-#define XISR_TXXONPEND 0x03
-
-#define XISR_TXFLOWMASK 0x0c
-#define XISR_TXNORMAL 0x00
-#define XISR_TXSTOPPEND 0x04
-#define XISR_TXSTARTED 0x08
-#define XISR_TXSTOPPED 0x0c
-
-#define XISR_RXFLOWMASK 0x30
-#define XISR_RXFLOWNONE 0x00
-#define XISR_RXXONSENT 0x10
-#define XISR_RXXOFFSENT 0x20
-
-#define XISR_RXXONGOT 0x40
-#define XISR_RXXOFFGOT 0x80
-
-/*****************************************************************************/
-
-/*
- * Current interrupt register.
- */
-#define CIR_TYPEMASK 0xc0
-#define CIR_TYPEOTHER 0x00
-#define CIR_TYPETX 0x40
-#define CIR_TYPERXGOOD 0x80
-#define CIR_TYPERXBAD 0xc0
-
-#define CIR_RXDATA 0x80
-#define CIR_RXBADDATA 0x40
-#define CIR_TXDATA 0x40
-
-#define CIR_CHANMASK 0x07
-#define CIR_CNTMASK 0x38
-
-#define CIR_SUBTYPEMASK 0x38
-#define CIR_SUBNONE 0x00
-#define CIR_SUBCOS 0x08
-#define CIR_SUBADDR 0x10
-#define CIR_SUBXONXOFF 0x18
-#define CIR_SUBBREAK 0x28
-
-/*****************************************************************************/
-
-/*
- * Global interrupting channel register.
- */
-#define GICR_CHANMASK 0x07
-
-/*****************************************************************************/
-
-/*
- * Global interrupting byte count register.
- */
-#define GICR_COUNTMASK 0x0f
-
-/*****************************************************************************/
-
-/*
- * Global interrupting type register.
- */
-#define GITR_RXMASK 0xc0
-#define GITR_RXNONE 0x00
-#define GITR_RXBADDATA 0x80
-#define GITR_RXGOODDATA 0xc0
-#define GITR_TXDATA 0x20
-
-#define GITR_SUBTYPEMASK 0x07
-#define GITR_SUBNONE 0x00
-#define GITR_SUBCOS 0x01
-#define GITR_SUBADDR 0x02
-#define GITR_SUBXONXOFF 0x03
-#define GITR_SUBBREAK 0x05
-
-/*****************************************************************************/
-
-/*
- * Input port change register.
- */
-#define IPR_CTS 0x01
-#define IPR_DTR 0x02
-#define IPR_RTS 0x04
-#define IPR_DCD 0x08
-#define IPR_CTSCHANGE 0x10
-#define IPR_DTRCHANGE 0x20
-#define IPR_RTSCHANGE 0x40
-#define IPR_DCDCHANGE 0x80
-
-#define IPR_CHANGEMASK 0xf0
-
-/*****************************************************************************/
-
-/*
- * IO port interrupt and output register.
- */
-#define IOPR_CTS 0x01
-#define IOPR_DTR 0x02
-#define IOPR_RTS 0x04
-#define IOPR_DCD 0x08
-#define IOPR_CTSCOS 0x10
-#define IOPR_DTRCOS 0x20
-#define IOPR_RTSCOS 0x40
-#define IOPR_DCDCOS 0x80
-
-/*****************************************************************************/
-
-/*
- * IO port configuration register.
- */
-#define IOPCR_SETCTS 0x00
-#define IOPCR_SETDTR 0x04
-#define IOPCR_SETRTS 0x10
-#define IOPCR_SETDCD 0x00
-
-#define IOPCR_SETSIGS (IOPCR_SETRTS | IOPCR_SETRTS | IOPCR_SETDTR | IOPCR_SETDCD)
-
-/*****************************************************************************/
-
-/*
- * General purpose output select register.
- */
-#define GPORS_TXC1XA 0x08
-#define GPORS_TXC16XA 0x09
-#define GPORS_RXC16XA 0x0a
-#define GPORS_TXC16XB 0x0b
-#define GPORS_GPOR3 0x0c
-#define GPORS_GPOR2 0x0d
-#define GPORS_GPOR1 0x0e
-#define GPORS_GPOR0 0x0f
-
-/*****************************************************************************/
-
-/*
- * General purpose output register.
- */
-#define GPOR_0 0x01
-#define GPOR_1 0x02
-#define GPOR_2 0x04
-#define GPOR_3 0x08
-
-/*****************************************************************************/
-
-/*
- * General purpose output clock register.
- */
-#define GPORC_0NONE 0x00
-#define GPORC_0GIN0 0x01
-#define GPORC_0GIN1 0x02
-#define GPORC_0IO3A 0x02
-
-#define GPORC_1NONE 0x00
-#define GPORC_1GIN0 0x04
-#define GPORC_1GIN1 0x08
-#define GPORC_1IO3C 0x0c
-
-#define GPORC_2NONE 0x00
-#define GPORC_2GIN0 0x10
-#define GPORC_2GIN1 0x20
-#define GPORC_2IO3E 0x20
-
-#define GPORC_3NONE 0x00
-#define GPORC_3GIN0 0x40
-#define GPORC_3GIN1 0x80
-#define GPORC_3IO3G 0xc0
-
-/*****************************************************************************/
-
-/*
- * General purpose output data register.
- */
-#define GPOD_0MASK 0x03
-#define GPOD_0SET1 0x00
-#define GPOD_0SET0 0x01
-#define GPOD_0SETR0 0x02
-#define GPOD_0SETIO3B 0x03
-
-#define GPOD_1MASK 0x0c
-#define GPOD_1SET1 0x00
-#define GPOD_1SET0 0x04
-#define GPOD_1SETR0 0x08
-#define GPOD_1SETIO3D 0x0c
-
-#define GPOD_2MASK 0x30
-#define GPOD_2SET1 0x00
-#define GPOD_2SET0 0x10
-#define GPOD_2SETR0 0x20
-#define GPOD_2SETIO3F 0x30
-
-#define GPOD_3MASK 0xc0
-#define GPOD_3SET1 0x00
-#define GPOD_3SET0 0x40
-#define GPOD_3SETR0 0x80
-#define GPOD_3SETIO3H 0xc0
-
-/*****************************************************************************/
-#endif
--
1.7.8.6
^ permalink raw reply related
* Re: [PATCH] tty: move the async flags from the serial code into the tty includes
From: Huang Shijie @ 2012-08-21 15:13 UTC (permalink / raw)
To: Alan Cox; +Cc: linux-serial, linux-kernel
In-Reply-To: <20120821133455.9090.24759.stgit@localhost.localdomain>
On Tue, Aug 21, 2012 at 9:35 PM, Alan Cox <alan@lxorguk.ukuu.org.uk> wrote:
> Huang - how about we add this patch first which moves the flags somewhere more sensible
thanks.
I am really happy with this patch.
Huang Shijie
> and then your helper function (and probably a few others) would merge cleanly ?
>
> Alan
> --
>
>
> From: Alan Cox <alan@linux.intel.com>
>
> These are used with the tty_port flags which are tty generic so move the
> flags into a more sensible place. This then makes it possible to add
> helpers such as those suggested by Huang Shijie.
>
> Signed-off-by: Alan Cox <alan@linux.intel.com>
> ---
>
> include/linux/serial.h | 2 +
> include/linux/tty.h | 1 +
> include/linux/tty_flags.h | 78 +++++++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 81 insertions(+)
> create mode 100644 include/linux/tty_flags.h
>
> diff --git a/include/linux/serial.h b/include/linux/serial.h
> index 90e9f98..d63866d 100644
> --- a/include/linux/serial.h
> +++ b/include/linux/serial.h
> @@ -15,6 +15,8 @@
> #ifdef __KERNEL__
> #include <asm/page.h>
>
> +#include <linux/tty_flags.h>
> +
> /*
> * Counters of the input lines (CTS, DSR, RI, CD) interrupts
> */
> diff --git a/include/linux/tty.h b/include/linux/tty.h
> index 69a787f..dbebd1e 100644
> --- a/include/linux/tty.h
> +++ b/include/linux/tty.h
> @@ -43,6 +43,7 @@
> #include <linux/tty_driver.h>
> #include <linux/tty_ldisc.h>
> #include <linux/mutex.h>
> +#include <linux/tty_flags.h>
>
>
>
> diff --git a/include/linux/tty_flags.h b/include/linux/tty_flags.h
> new file mode 100644
> index 0000000..eefcb48
> --- /dev/null
> +++ b/include/linux/tty_flags.h
> @@ -0,0 +1,78 @@
> +#ifndef _LINUX_TTY_FLAGS_H
> +#define _LINUX_TTY_FLAGS_H
> +
> +/*
> + * Definitions for async_struct (and serial_struct) flags field also
> + * shared by the tty_port flags structures.
> + *
> + * Define ASYNCB_* for convenient use with {test,set,clear}_bit.
> + */
> +#define ASYNCB_HUP_NOTIFY 0 /* Notify getty on hangups and closes
> + * on the callout port */
> +#define ASYNCB_FOURPORT 1 /* Set OU1, OUT2 per AST Fourport settings */
> +#define ASYNCB_SAK 2 /* Secure Attention Key (Orange book) */
> +#define ASYNCB_SPLIT_TERMIOS 3 /* Separate termios for dialin/callout */
> +#define ASYNCB_SPD_HI 4 /* Use 56000 instead of 38400 bps */
> +#define ASYNCB_SPD_VHI 5 /* Use 115200 instead of 38400 bps */
> +#define ASYNCB_SKIP_TEST 6 /* Skip UART test during autoconfiguration */
> +#define ASYNCB_AUTO_IRQ 7 /* Do automatic IRQ during
> + * autoconfiguration */
> +#define ASYNCB_SESSION_LOCKOUT 8 /* Lock out cua opens based on session */
> +#define ASYNCB_PGRP_LOCKOUT 9 /* Lock out cua opens based on pgrp */
> +#define ASYNCB_CALLOUT_NOHUP 10 /* Don't do hangups for cua device */
> +#define ASYNCB_HARDPPS_CD 11 /* Call hardpps when CD goes high */
> +#define ASYNCB_SPD_SHI 12 /* Use 230400 instead of 38400 bps */
> +#define ASYNCB_LOW_LATENCY 13 /* Request low latency behaviour */
> +#define ASYNCB_BUGGY_UART 14 /* This is a buggy UART, skip some safety
> + * checks. Note: can be dangerous! */
> +#define ASYNCB_AUTOPROBE 15 /* Port was autoprobed by PCI or PNP code */
> +#define ASYNCB_LAST_USER 15
> +
> +/* Internal flags used only by kernel */
> +#define ASYNCB_INITIALIZED 31 /* Serial port was initialized */
> +#define ASYNCB_SUSPENDED 30 /* Serial port is suspended */
> +#define ASYNCB_NORMAL_ACTIVE 29 /* Normal device is active */
> +#define ASYNCB_BOOT_AUTOCONF 28 /* Autoconfigure port on bootup */
> +#define ASYNCB_CLOSING 27 /* Serial port is closing */
> +#define ASYNCB_CTS_FLOW 26 /* Do CTS flow control */
> +#define ASYNCB_CHECK_CD 25 /* i.e., CLOCAL */
> +#define ASYNCB_SHARE_IRQ 24 /* for multifunction cards, no longer used */
> +#define ASYNCB_CONS_FLOW 23 /* flow control for console */
> +#define ASYNCB_FIRST_KERNEL 22
> +
> +#define ASYNC_HUP_NOTIFY (1U << ASYNCB_HUP_NOTIFY)
> +#define ASYNC_SUSPENDED (1U << ASYNCB_SUSPENDED)
> +#define ASYNC_FOURPORT (1U << ASYNCB_FOURPORT)
> +#define ASYNC_SAK (1U << ASYNCB_SAK)
> +#define ASYNC_SPLIT_TERMIOS (1U << ASYNCB_SPLIT_TERMIOS)
> +#define ASYNC_SPD_HI (1U << ASYNCB_SPD_HI)
> +#define ASYNC_SPD_VHI (1U << ASYNCB_SPD_VHI)
> +#define ASYNC_SKIP_TEST (1U << ASYNCB_SKIP_TEST)
> +#define ASYNC_AUTO_IRQ (1U << ASYNCB_AUTO_IRQ)
> +#define ASYNC_SESSION_LOCKOUT (1U << ASYNCB_SESSION_LOCKOUT)
> +#define ASYNC_PGRP_LOCKOUT (1U << ASYNCB_PGRP_LOCKOUT)
> +#define ASYNC_CALLOUT_NOHUP (1U << ASYNCB_CALLOUT_NOHUP)
> +#define ASYNC_HARDPPS_CD (1U << ASYNCB_HARDPPS_CD)
> +#define ASYNC_SPD_SHI (1U << ASYNCB_SPD_SHI)
> +#define ASYNC_LOW_LATENCY (1U << ASYNCB_LOW_LATENCY)
> +#define ASYNC_BUGGY_UART (1U << ASYNCB_BUGGY_UART)
> +#define ASYNC_AUTOPROBE (1U << ASYNCB_AUTOPROBE)
> +
> +#define ASYNC_FLAGS ((1U << (ASYNCB_LAST_USER + 1)) - 1)
> +#define ASYNC_USR_MASK (ASYNC_SPD_MASK|ASYNC_CALLOUT_NOHUP| \
> + ASYNC_LOW_LATENCY)
> +#define ASYNC_SPD_CUST (ASYNC_SPD_HI|ASYNC_SPD_VHI)
> +#define ASYNC_SPD_WARP (ASYNC_SPD_HI|ASYNC_SPD_SHI)
> +#define ASYNC_SPD_MASK (ASYNC_SPD_HI|ASYNC_SPD_VHI|ASYNC_SPD_SHI)
> +
> +#define ASYNC_INITIALIZED (1U << ASYNCB_INITIALIZED)
> +#define ASYNC_NORMAL_ACTIVE (1U << ASYNCB_NORMAL_ACTIVE)
> +#define ASYNC_BOOT_AUTOCONF (1U << ASYNCB_BOOT_AUTOCONF)
> +#define ASYNC_CLOSING (1U << ASYNCB_CLOSING)
> +#define ASYNC_CTS_FLOW (1U << ASYNCB_CTS_FLOW)
> +#define ASYNC_CHECK_CD (1U << ASYNCB_CHECK_CD)
> +#define ASYNC_SHARE_IRQ (1U << ASYNCB_SHARE_IRQ)
> +#define ASYNC_CONS_FLOW (1U << ASYNCB_CONS_FLOW)
> +#define ASYNC_INTERNAL_FLAGS (~((1U << ASYNCB_FIRST_KERNEL) - 1))
> +
> +#endif
>
^ permalink raw reply
* Re: [PATCH v2 00/13] OMAP Serial patches
From: Felipe Balbi @ 2012-08-21 15:07 UTC (permalink / raw)
To: Felipe Balbi
Cc: alan, Tony Lindgren, Kevin Hilman, Linux OMAP Mailing List,
Linux ARM Kernel Mailing List, linux-serial,
Linux Kernel Mailing List, Santosh Shilimkar, Shubhrajyoti Datta
In-Reply-To: <20120821130134.GH10347@arwen.pp.htv.fi>
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Hi,
On Tue, Aug 21, 2012 at 04:01:36PM +0300, Felipe Balbi wrote:
> Hi,
>
> On Tue, Aug 21, 2012 at 03:15:58PM +0300, Felipe Balbi wrote:
> > Hi guys,
> >
> > here's a series of cleanup patches to the OMAP serial
> > driver. A later series could be made re-implementing
> > DMA using the DMA Engine API. Note that for RX DMA
> > we could be using RX Timeout IRQ as a hint that we better
> > use PIO instead ;-)
> >
> > All patches were tested on my pandaboard, but I'd really
> > like to receive Tested-by on other platforms.
> >
> > After this goes in, I'll probably try to get UART wakeup
> > working again and only after that look at DMA.
> >
> > Changes since v1:
> >
> > . improved commit log on patch 9/13 (formerly 10/13)
> > . removed patch 2/13
> > . added a new patch switching from spin_lock_irqsave() to spin_lock and
> > spin_unlock_irqrestore to spin_unlock
> >
> > Retested with my pandaboard, UART continues to work:
> >
> > # grep -i uart /proc/interrupts
> > 106: 124 0 GIC OMAP UART2
> > # grep -i uart /proc/interrupts
> > 106: 189 0 GIC OMAP UART2
> > # grep -i uart /proc/interrupts
> > 106: 255 0 GIC OMAP UART2
> > # grep -i uart /proc/interrupts
> > 106: 321 0 GIC OMAP UART2
> > # grep -i uart /proc/interrupts
> > 106: 387 0 GIC OMAP UART2
> > # grep -i uart /proc/interrupts
> > 106: 453 0 GIC OMAP UART2
> > # grep -i uart /proc/interrupts
> > 106: 519 0 GIC OMAP UART2
> >
> > cheers
> >
> > ps: if anyone knows a better test for UART, let me know.
> >
> > for convenience of anyone testing, patches are available on my git tree [1] on
> > branch uart
> >
> > [1] git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git uart
>
> I have added one extra patch to this series:
>
> From 6921efdb13dda7af216b331bb35535d4b53f004a Mon Sep 17 00:00:00 2001
> From: Felipe Balbi <balbi@ti.com>
> Date: Tue, 21 Aug 2012 15:48:35 +0300
> Subject: [PATCH] serial: omap: drop pm_runtime_irq_safe() usage
>
> pm_runtime_irq_safe() will essentially do an
> unbalanced pm_runtime_get_sync() on our parent
> device, which might cause problems when trying
> to suspend.
>
> In order to prevent that we drop pm_runtime_irq_safe
> usage in exchange for a little performance hit
> when we enter our IRQ handler while still suspended.
>
> If that happens, what we will do is set the irq_pending
> flag, do an asynchronous pm_runtime_get() call and
> return IRQ_HANDLED. When our runtime_resume() callback
> is executed, we check for that flag, and run our
> IRQ handler so that we receive/transmit the pending
> characters.
>
> Signed-off-by: Felipe Balbi <balbi@ti.com>
> ---
>
> One extra patch to OMAP UART driver. This seems to be working
> pretty well even after echo mem > /sys/power/state. I can
> see that I can even wake my pandaboard up by sending a character
> through serial:
>
> # echo mem > /sys/power/state
> [ 1335.679260] PM: Syncing filesystems ... done.
> [ 1335.684387] Freezing user space processes ... (elapsed 0.00 seconds) done.
> [ 1335.691741] Freezing remaining freezable tasks ... (elapsed 0.02 seconds) done.
> [ 1335.720886] Suspending console(s) (use no_console_suspend to debug)
>
> [ 1335.734405] PM: suspend of devices complete after 5.492 msecs
> [ 1335.735534] PM: late suspend of devices complete after 1.128 msecs
> [ 1335.737518] PM: noirq suspend of devices complete after 1.952 msecs
> [ 1335.737518] Disabling non-boot CPUs ...
> [ 1335.738525] CPU1: shutdown
> [ 1338.543762] Successfully put all powerdomains to target state
> [ 1338.543853] Enabling non-boot CPUs ...
> [ 1338.545654] CPU1: Booted secondary processor
> [ 1338.546020] CPU1 is up
> [ 1338.547027] PM: noirq resume of devices complete after 0.976 msecs
> [ 1338.548400] PM: early resume of devices complete after 0.762 msecs
> [ 1339.827087] PM: resume of devices complete after 1278.686 msecs
> [ 1339.890960] Restarting tasks ... done.
> # # grep -i uart /proc/interrupts
> 106: 3385 0 GIC OMAP UART2
> # echo mem > /sys/power/state
> [ 1358.015624] PM: Syncing filesystems ... done.
> [ 1358.020812] Freezing user space processes ... (elapsed 0.00 seconds) done.
> [ 1358.028167] Freezing remaining freezable tasks ... (elapsed 0.01 seconds) done.
> [ 1358.055084] Suspending console(s) (use no_console_suspend to debug)
>
> [ 1358.068847] PM: suspend of devices complete after 5.633 msecs
> [ 1358.070007] PM: late suspend of devices complete after 1.126 msecs
> [ 1358.072051] PM: noirq suspend of devices complete after 2.040 msecs
> [ 1358.072051] Disabling non-boot CPUs ...
> [ 1358.073211] CPU1: shutdown
> [ 1359.104156] Successfully put all powerdomains to target state
> [ 1359.104278] Enabling non-boot CPUs ...
> [ 1359.106079] CPU1: Booted secondary processor
> [ 1359.106475] CPU1 is up
> [ 1359.107482] PM: noirq resume of devices complete after 1.004 msecs
> [ 1359.108886] PM: early resume of devices complete after 0.761 msecs
> [ 1360.414794] PM: resume of devices complete after 1305.836 msecs
> [ 1360.478668] Restarting tasks ... done.
> # # grep -i uart /proc/interrupts
> 106: 3511 0 GIC OMAP UART2
>
> arch/arm/plat-omap/include/plat/omap-serial.h | 1 +
> drivers/tty/serial/omap-serial.c | 16 +++++++++++++---
> 2 files changed, 14 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/plat-omap/include/plat/omap-serial.h b/arch/arm/plat-omap/include/plat/omap-serial.h
> index 743ac80..52328ca 100644
> --- a/arch/arm/plat-omap/include/plat/omap-serial.h
> +++ b/arch/arm/plat-omap/include/plat/omap-serial.h
> @@ -130,6 +130,7 @@ struct uart_omap_port {
> u32 context_loss_cnt;
> u32 errata;
> u8 wakeups_enabled;
> + unsigned int irq_pending:1;
>
> struct pm_qos_request pm_qos_request;
> u32 latency;
> diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c
> index a79658d..7e237f3 100644
> --- a/drivers/tty/serial/omap-serial.c
> +++ b/drivers/tty/serial/omap-serial.c
> @@ -353,9 +353,13 @@ static inline irqreturn_t serial_omap_irq(int irq, void *dev_id)
> irqreturn_t ret = IRQ_HANDLED;
> int max_count = 256;
>
> - spin_lock(&up->port.lock);
> - pm_runtime_get_sync(up->dev);
> + if (pm_runtime_suspended(up->dev)) {
> + up->irq_pending = true;
> + pm_runtime_get(up->dev);
> + return IRQ_HANDLED;
> + }
>
> + spin_lock(&up->port.lock);
> do {
> iir = serial_in(up, UART_IIR);
> if (iir & UART_IIR_NO_INT) {
> @@ -400,6 +404,7 @@ static inline irqreturn_t serial_omap_irq(int irq, void *dev_id)
> pm_runtime_mark_last_busy(up->dev);
> pm_runtime_put_autosuspend(up->dev);
> up->port_activity = jiffies;
> + up->irq_pending = false;
>
> return ret;
> }
> @@ -1305,7 +1310,6 @@ static int serial_omap_probe(struct platform_device *pdev)
> pm_runtime_set_autosuspend_delay(&pdev->dev,
> omap_up_info->autosuspend_timeout);
>
> - pm_runtime_irq_safe(&pdev->dev);
> pm_runtime_enable(&pdev->dev);
> pm_runtime_get_sync(&pdev->dev);
>
> @@ -1416,6 +1420,9 @@ static int serial_omap_runtime_suspend(struct device *dev)
> if (!up)
> return -EINVAL;
>
> + if (up->irq_pending)
> + return -EBUSY;
> +
> if (!pdata)
> return 0;
>
> @@ -1452,6 +1459,9 @@ static int serial_omap_runtime_resume(struct device *dev)
>
> up->latency = up->calc_latency;
> schedule_work(&up->qos_work);
> +
> + if (up->irq_pending)
> + serial_omap_irq(up->port.irq, up);
> }
>
> return 0;
let's not apply this extra patch. It actually caused a regression which
was pretty difficult to trigger. I have now dropped it from my series.
Sorry for the noise.
--
balbi
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^ permalink raw reply
* Re: [PATCHv4 1/1] [RFC] uartclk from serial_core exposed to sysfs
From: Alan Cox @ 2012-08-21 13:44 UTC (permalink / raw)
To: Tomas Hlavacek; +Cc: gregkh, alan, linux-serial, linux-kernel, marek.vasut
In-Reply-To: <CAEB7QLDBjUp9GswRB20KdFNVLJme3WeX2Xd79-ovP6SWxVORpA@mail.gmail.com>
> I have updated the patch to a new v4 in order to remove the race in
> sysfs file creation and add sysfs file description to a Documentation
> directory. But still the patch creates the sysfs file separately for
> each serial TTY device by assigning attribute_groups to the struct
> device and not for the whole driver at once as Greg advised because I
> was unable to figure out how to do that (even though I tried pretty
> hard). Does it make sense like this? Or do you have any hint for a
> better way to do it, please?
I'm fine with it - dunno about GregKH. Given the way tty 'drivers' and
tty devices fit together I'm not 100% sure it makes sense to do it per
driver. Plus once we have the basis we can fix a lot of the detail
afterwards.
Alan
^ permalink raw reply
* Re: [PATCH] serial: pl011: honour serial aliases in device tree
From: Rob Herring @ 2012-08-21 13:26 UTC (permalink / raw)
To: Matthew Leach
Cc: linux-arm-kernel, linux-serial, devicetree-discuss, Arnd Bergmann
In-Reply-To: <1345544302-12406-1-git-send-email-matthew.leach@arm.com>
On 08/21/2012 05:18 AM, Matthew Leach wrote:
> If the order of UART nodes is changed in the device tree, then tty dev
> devices are attached to different serial ports causing the console to
> be directed to a different physical serial port. The "serial" aliases
> in the device tree should prevent this.
>
> This patch ensures that the UART driver creates tty devices that
> honour these aliases if a device tree is present.
>
> Signed-off-by: Matthew Leach <matthew.leach@arm.com>
One comment/question below, but otherwise:
Acked-by: Rob Herring <rob.herring@calxeda.com>
> ---
> drivers/tty/serial/amba-pl011.c | 39 +++++++++++++++++++++++++++++++++++++++
> 1 files changed, 39 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/tty/serial/amba-pl011.c b/drivers/tty/serial/amba-pl011.c
> index c17923e..5919599 100644
> --- a/drivers/tty/serial/amba-pl011.c
> +++ b/drivers/tty/serial/amba-pl011.c
> @@ -52,6 +52,7 @@
> #include <linux/scatterlist.h>
> #include <linux/delay.h>
> #include <linux/types.h>
> +#include <linux/of_device.h>
> #include <linux/pinctrl/consumer.h>
>
> #include <asm/io.h>
> @@ -1869,6 +1870,42 @@ static struct uart_driver amba_reg = {
> .cons = AMBA_CONSOLE,
> };
>
> +#ifdef CONFIG_OF
Now that we have IS_ENABLED, perhaps we want to put this inside the
function instead?
if (!IS_ENABLED(CONFIG_OF))
return index;
> +static int pl011_probe_dt_alias(int index, struct device *dev)
> +{
> + struct device_node *np;
> + static bool seen_dev_with_alias = false;
> + static bool seen_dev_without_alias = false;
> + int ret = index;
> +
> + np = dev->of_node;
> + if (!np)
> + return ret;
> +
> + ret = of_alias_get_id(np, "serial");
> + if (IS_ERR_VALUE(ret)) {
> + seen_dev_without_alias = true;
> + ret = index;
> + } else {
> + seen_dev_with_alias = true;
> + if (ret >= ARRAY_SIZE(amba_ports) || amba_ports[ret] != NULL) {
> + dev_warn(dev, "requested serial port %d not available.\n", ret);
> + ret = index;
> + }
> + }
> +
> + if (seen_dev_with_alias && seen_dev_without_alias)
> + dev_warn(dev, "aliased and non-aliased serial devices found in device tree. Serial port enumeration may be unpredictable.\n");
> +
> + return ret;
> +}
> +#else
> +static int pl011_probe_dt_alias(int index, struct device *dev)
> +{
> + return index;
> +}
> +#endif
> +
> static int pl011_probe(struct amba_device *dev, const struct amba_id *id)
> {
> struct uart_amba_port *uap;
> @@ -1891,6 +1928,8 @@ static int pl011_probe(struct amba_device *dev, const struct amba_id *id)
> goto out;
> }
>
> + i = pl011_probe_dt_alias(i, &dev->dev);
> +
> base = ioremap(dev->res.start, resource_size(&dev->res));
> if (!base) {
> ret = -ENOMEM;
>
^ permalink raw reply
* Re: [PATCHv4 1/1] [RFC] uartclk from serial_core exposed to sysfs
From: Tomas Hlavacek @ 2012-08-21 13:24 UTC (permalink / raw)
To: gregkh, alan, linux-serial, linux-kernel; +Cc: marek.vasut
In-Reply-To: <1345401285-14473-1-git-send-email-tmshlvck@gmail.com>
Hello!
On Sun, Aug 19, 2012 at 8:34 PM, Tomas Hlavacek <tmshlvck@gmail.com> wrote:
> Added file /sys/devices/.../tty/ttySX/uartclk to allow reading
> uartclk value in struct uart_port in serial_core via sysfs.
>
> It simplifies initialization verification of no-name cards that
> have non-standard oscillator speed while having no distinguishing
> PCI IDs to allow autodetection.
>
> tty_register_device() has been generalized and refactored in order
> to add support for setting drvdata and attribute_group to the device.
>
I have updated the patch to a new v4 in order to remove the race in
sysfs file creation and add sysfs file description to a Documentation
directory. But still the patch creates the sysfs file separately for
each serial TTY device by assigning attribute_groups to the struct
device and not for the whole driver at once as Greg advised because I
was unable to figure out how to do that (even though I tried pretty
hard). Does it make sense like this? Or do you have any hint for a
better way to do it, please?
Thanks,
Tomas
^ permalink raw reply
* [PATCH] tty: move the async flags from the serial code into the tty includes
From: Alan Cox @ 2012-08-21 13:35 UTC (permalink / raw)
To: shijie8, linux-serial, linux-kernel
Huang - how about we add this patch first which moves the flags somewhere more sensible
and then your helper function (and probably a few others) would merge cleanly ?
Alan
--
From: Alan Cox <alan@linux.intel.com>
These are used with the tty_port flags which are tty generic so move the
flags into a more sensible place. This then makes it possible to add
helpers such as those suggested by Huang Shijie.
Signed-off-by: Alan Cox <alan@linux.intel.com>
---
include/linux/serial.h | 2 +
include/linux/tty.h | 1 +
include/linux/tty_flags.h | 78 +++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 81 insertions(+)
create mode 100644 include/linux/tty_flags.h
diff --git a/include/linux/serial.h b/include/linux/serial.h
index 90e9f98..d63866d 100644
--- a/include/linux/serial.h
+++ b/include/linux/serial.h
@@ -15,6 +15,8 @@
#ifdef __KERNEL__
#include <asm/page.h>
+#include <linux/tty_flags.h>
+
/*
* Counters of the input lines (CTS, DSR, RI, CD) interrupts
*/
diff --git a/include/linux/tty.h b/include/linux/tty.h
index 69a787f..dbebd1e 100644
--- a/include/linux/tty.h
+++ b/include/linux/tty.h
@@ -43,6 +43,7 @@
#include <linux/tty_driver.h>
#include <linux/tty_ldisc.h>
#include <linux/mutex.h>
+#include <linux/tty_flags.h>
diff --git a/include/linux/tty_flags.h b/include/linux/tty_flags.h
new file mode 100644
index 0000000..eefcb48
--- /dev/null
+++ b/include/linux/tty_flags.h
@@ -0,0 +1,78 @@
+#ifndef _LINUX_TTY_FLAGS_H
+#define _LINUX_TTY_FLAGS_H
+
+/*
+ * Definitions for async_struct (and serial_struct) flags field also
+ * shared by the tty_port flags structures.
+ *
+ * Define ASYNCB_* for convenient use with {test,set,clear}_bit.
+ */
+#define ASYNCB_HUP_NOTIFY 0 /* Notify getty on hangups and closes
+ * on the callout port */
+#define ASYNCB_FOURPORT 1 /* Set OU1, OUT2 per AST Fourport settings */
+#define ASYNCB_SAK 2 /* Secure Attention Key (Orange book) */
+#define ASYNCB_SPLIT_TERMIOS 3 /* Separate termios for dialin/callout */
+#define ASYNCB_SPD_HI 4 /* Use 56000 instead of 38400 bps */
+#define ASYNCB_SPD_VHI 5 /* Use 115200 instead of 38400 bps */
+#define ASYNCB_SKIP_TEST 6 /* Skip UART test during autoconfiguration */
+#define ASYNCB_AUTO_IRQ 7 /* Do automatic IRQ during
+ * autoconfiguration */
+#define ASYNCB_SESSION_LOCKOUT 8 /* Lock out cua opens based on session */
+#define ASYNCB_PGRP_LOCKOUT 9 /* Lock out cua opens based on pgrp */
+#define ASYNCB_CALLOUT_NOHUP 10 /* Don't do hangups for cua device */
+#define ASYNCB_HARDPPS_CD 11 /* Call hardpps when CD goes high */
+#define ASYNCB_SPD_SHI 12 /* Use 230400 instead of 38400 bps */
+#define ASYNCB_LOW_LATENCY 13 /* Request low latency behaviour */
+#define ASYNCB_BUGGY_UART 14 /* This is a buggy UART, skip some safety
+ * checks. Note: can be dangerous! */
+#define ASYNCB_AUTOPROBE 15 /* Port was autoprobed by PCI or PNP code */
+#define ASYNCB_LAST_USER 15
+
+/* Internal flags used only by kernel */
+#define ASYNCB_INITIALIZED 31 /* Serial port was initialized */
+#define ASYNCB_SUSPENDED 30 /* Serial port is suspended */
+#define ASYNCB_NORMAL_ACTIVE 29 /* Normal device is active */
+#define ASYNCB_BOOT_AUTOCONF 28 /* Autoconfigure port on bootup */
+#define ASYNCB_CLOSING 27 /* Serial port is closing */
+#define ASYNCB_CTS_FLOW 26 /* Do CTS flow control */
+#define ASYNCB_CHECK_CD 25 /* i.e., CLOCAL */
+#define ASYNCB_SHARE_IRQ 24 /* for multifunction cards, no longer used */
+#define ASYNCB_CONS_FLOW 23 /* flow control for console */
+#define ASYNCB_FIRST_KERNEL 22
+
+#define ASYNC_HUP_NOTIFY (1U << ASYNCB_HUP_NOTIFY)
+#define ASYNC_SUSPENDED (1U << ASYNCB_SUSPENDED)
+#define ASYNC_FOURPORT (1U << ASYNCB_FOURPORT)
+#define ASYNC_SAK (1U << ASYNCB_SAK)
+#define ASYNC_SPLIT_TERMIOS (1U << ASYNCB_SPLIT_TERMIOS)
+#define ASYNC_SPD_HI (1U << ASYNCB_SPD_HI)
+#define ASYNC_SPD_VHI (1U << ASYNCB_SPD_VHI)
+#define ASYNC_SKIP_TEST (1U << ASYNCB_SKIP_TEST)
+#define ASYNC_AUTO_IRQ (1U << ASYNCB_AUTO_IRQ)
+#define ASYNC_SESSION_LOCKOUT (1U << ASYNCB_SESSION_LOCKOUT)
+#define ASYNC_PGRP_LOCKOUT (1U << ASYNCB_PGRP_LOCKOUT)
+#define ASYNC_CALLOUT_NOHUP (1U << ASYNCB_CALLOUT_NOHUP)
+#define ASYNC_HARDPPS_CD (1U << ASYNCB_HARDPPS_CD)
+#define ASYNC_SPD_SHI (1U << ASYNCB_SPD_SHI)
+#define ASYNC_LOW_LATENCY (1U << ASYNCB_LOW_LATENCY)
+#define ASYNC_BUGGY_UART (1U << ASYNCB_BUGGY_UART)
+#define ASYNC_AUTOPROBE (1U << ASYNCB_AUTOPROBE)
+
+#define ASYNC_FLAGS ((1U << (ASYNCB_LAST_USER + 1)) - 1)
+#define ASYNC_USR_MASK (ASYNC_SPD_MASK|ASYNC_CALLOUT_NOHUP| \
+ ASYNC_LOW_LATENCY)
+#define ASYNC_SPD_CUST (ASYNC_SPD_HI|ASYNC_SPD_VHI)
+#define ASYNC_SPD_WARP (ASYNC_SPD_HI|ASYNC_SPD_SHI)
+#define ASYNC_SPD_MASK (ASYNC_SPD_HI|ASYNC_SPD_VHI|ASYNC_SPD_SHI)
+
+#define ASYNC_INITIALIZED (1U << ASYNCB_INITIALIZED)
+#define ASYNC_NORMAL_ACTIVE (1U << ASYNCB_NORMAL_ACTIVE)
+#define ASYNC_BOOT_AUTOCONF (1U << ASYNCB_BOOT_AUTOCONF)
+#define ASYNC_CLOSING (1U << ASYNCB_CLOSING)
+#define ASYNC_CTS_FLOW (1U << ASYNCB_CTS_FLOW)
+#define ASYNC_CHECK_CD (1U << ASYNCB_CHECK_CD)
+#define ASYNC_SHARE_IRQ (1U << ASYNCB_SHARE_IRQ)
+#define ASYNC_CONS_FLOW (1U << ASYNCB_CONS_FLOW)
+#define ASYNC_INTERNAL_FLAGS (~((1U << ASYNCB_FIRST_KERNEL) - 1))
+
+#endif
^ permalink raw reply related
* Re: [PATCH] tty: Added a CONFIG_TTY option to allow removal of TTY
From: Alan Cox @ 2012-08-21 13:20 UTC (permalink / raw)
To: Joe Millenbach
Cc: Greg Kroah-Hartman, Alan Cox, linux-serial, linux-kernel,
Josh Triplett, team-fjord
In-Reply-To: <1345499431-21658-1-git-send-email-jmillenbach@gmail.com>
> --- a/drivers/char/Kconfig
> +++ b/drivers/char/Kconfig
> @@ -53,7 +53,7 @@ source "drivers/tty/serial/Kconfig"
>
> config TTY_PRINTK
> bool "TTY driver to output user messages via printk"
> - depends on EXPERT
> + depends on EXPERT && TTY
A lot of these could be done better with an if I think - notably the
serial one and perhaps some of the input ones if the tty users were
bunched together.
> config MOUSE_PS2
> tristate "PS/2 mouse"
> + depends on TTY
It shouldn't. It would be good to understand why this occurs.
> diff --git a/include/linux/tty.h b/include/linux/tty.h
> index 5dbb3cb..c1406e3 100644
> --- a/include/linux/tty.h
> +++ b/include/linux/tty.h
> @@ -377,7 +377,12 @@ extern void tty_write_flush(struct tty_struct *);
>
> extern struct ktermios tty_std_termios;
>
> +#ifdef CONFIG_TTY
> extern void console_init(void);
> +#else
> +static inline void console_init(void)
> +{ }
> +#endif
Please can you bunch the whole lot up into one #if defined() / #else /
#endif
rather than lots.
Otherwise this looks very sensible to me.
^ permalink raw reply
* Re: [PATCH v2 00/13] OMAP Serial patches
From: Felipe Balbi @ 2012-08-21 13:01 UTC (permalink / raw)
To: Felipe Balbi
Cc: alan, Tony Lindgren, Kevin Hilman, Linux OMAP Mailing List,
Linux ARM Kernel Mailing List, linux-serial,
Linux Kernel Mailing List, Santosh Shilimkar, Shubhrajyoti Datta
In-Reply-To: <1345551371-18862-1-git-send-email-balbi@ti.com>
[-- Attachment #1: Type: text/plain, Size: 7428 bytes --]
Hi,
On Tue, Aug 21, 2012 at 03:15:58PM +0300, Felipe Balbi wrote:
> Hi guys,
>
> here's a series of cleanup patches to the OMAP serial
> driver. A later series could be made re-implementing
> DMA using the DMA Engine API. Note that for RX DMA
> we could be using RX Timeout IRQ as a hint that we better
> use PIO instead ;-)
>
> All patches were tested on my pandaboard, but I'd really
> like to receive Tested-by on other platforms.
>
> After this goes in, I'll probably try to get UART wakeup
> working again and only after that look at DMA.
>
> Changes since v1:
>
> . improved commit log on patch 9/13 (formerly 10/13)
> . removed patch 2/13
> . added a new patch switching from spin_lock_irqsave() to spin_lock and
> spin_unlock_irqrestore to spin_unlock
>
> Retested with my pandaboard, UART continues to work:
>
> # grep -i uart /proc/interrupts
> 106: 124 0 GIC OMAP UART2
> # grep -i uart /proc/interrupts
> 106: 189 0 GIC OMAP UART2
> # grep -i uart /proc/interrupts
> 106: 255 0 GIC OMAP UART2
> # grep -i uart /proc/interrupts
> 106: 321 0 GIC OMAP UART2
> # grep -i uart /proc/interrupts
> 106: 387 0 GIC OMAP UART2
> # grep -i uart /proc/interrupts
> 106: 453 0 GIC OMAP UART2
> # grep -i uart /proc/interrupts
> 106: 519 0 GIC OMAP UART2
>
> cheers
>
> ps: if anyone knows a better test for UART, let me know.
>
> for convenience of anyone testing, patches are available on my git tree [1] on
> branch uart
>
> [1] git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git uart
I have added one extra patch to this series:
From 6921efdb13dda7af216b331bb35535d4b53f004a Mon Sep 17 00:00:00 2001
From: Felipe Balbi <balbi@ti.com>
Date: Tue, 21 Aug 2012 15:48:35 +0300
Subject: [PATCH] serial: omap: drop pm_runtime_irq_safe() usage
pm_runtime_irq_safe() will essentially do an
unbalanced pm_runtime_get_sync() on our parent
device, which might cause problems when trying
to suspend.
In order to prevent that we drop pm_runtime_irq_safe
usage in exchange for a little performance hit
when we enter our IRQ handler while still suspended.
If that happens, what we will do is set the irq_pending
flag, do an asynchronous pm_runtime_get() call and
return IRQ_HANDLED. When our runtime_resume() callback
is executed, we check for that flag, and run our
IRQ handler so that we receive/transmit the pending
characters.
Signed-off-by: Felipe Balbi <balbi@ti.com>
---
One extra patch to OMAP UART driver. This seems to be working
pretty well even after echo mem > /sys/power/state. I can
see that I can even wake my pandaboard up by sending a character
through serial:
# echo mem > /sys/power/state
[ 1335.679260] PM: Syncing filesystems ... done.
[ 1335.684387] Freezing user space processes ... (elapsed 0.00 seconds) done.
[ 1335.691741] Freezing remaining freezable tasks ... (elapsed 0.02 seconds) done.
[ 1335.720886] Suspending console(s) (use no_console_suspend to debug)
[ 1335.734405] PM: suspend of devices complete after 5.492 msecs
[ 1335.735534] PM: late suspend of devices complete after 1.128 msecs
[ 1335.737518] PM: noirq suspend of devices complete after 1.952 msecs
[ 1335.737518] Disabling non-boot CPUs ...
[ 1335.738525] CPU1: shutdown
[ 1338.543762] Successfully put all powerdomains to target state
[ 1338.543853] Enabling non-boot CPUs ...
[ 1338.545654] CPU1: Booted secondary processor
[ 1338.546020] CPU1 is up
[ 1338.547027] PM: noirq resume of devices complete after 0.976 msecs
[ 1338.548400] PM: early resume of devices complete after 0.762 msecs
[ 1339.827087] PM: resume of devices complete after 1278.686 msecs
[ 1339.890960] Restarting tasks ... done.
# # grep -i uart /proc/interrupts
106: 3385 0 GIC OMAP UART2
# echo mem > /sys/power/state
[ 1358.015624] PM: Syncing filesystems ... done.
[ 1358.020812] Freezing user space processes ... (elapsed 0.00 seconds) done.
[ 1358.028167] Freezing remaining freezable tasks ... (elapsed 0.01 seconds) done.
[ 1358.055084] Suspending console(s) (use no_console_suspend to debug)
[ 1358.068847] PM: suspend of devices complete after 5.633 msecs
[ 1358.070007] PM: late suspend of devices complete after 1.126 msecs
[ 1358.072051] PM: noirq suspend of devices complete after 2.040 msecs
[ 1358.072051] Disabling non-boot CPUs ...
[ 1358.073211] CPU1: shutdown
[ 1359.104156] Successfully put all powerdomains to target state
[ 1359.104278] Enabling non-boot CPUs ...
[ 1359.106079] CPU1: Booted secondary processor
[ 1359.106475] CPU1 is up
[ 1359.107482] PM: noirq resume of devices complete after 1.004 msecs
[ 1359.108886] PM: early resume of devices complete after 0.761 msecs
[ 1360.414794] PM: resume of devices complete after 1305.836 msecs
[ 1360.478668] Restarting tasks ... done.
# # grep -i uart /proc/interrupts
106: 3511 0 GIC OMAP UART2
arch/arm/plat-omap/include/plat/omap-serial.h | 1 +
drivers/tty/serial/omap-serial.c | 16 +++++++++++++---
2 files changed, 14 insertions(+), 3 deletions(-)
diff --git a/arch/arm/plat-omap/include/plat/omap-serial.h b/arch/arm/plat-omap/include/plat/omap-serial.h
index 743ac80..52328ca 100644
--- a/arch/arm/plat-omap/include/plat/omap-serial.h
+++ b/arch/arm/plat-omap/include/plat/omap-serial.h
@@ -130,6 +130,7 @@ struct uart_omap_port {
u32 context_loss_cnt;
u32 errata;
u8 wakeups_enabled;
+ unsigned int irq_pending:1;
struct pm_qos_request pm_qos_request;
u32 latency;
diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c
index a79658d..7e237f3 100644
--- a/drivers/tty/serial/omap-serial.c
+++ b/drivers/tty/serial/omap-serial.c
@@ -353,9 +353,13 @@ static inline irqreturn_t serial_omap_irq(int irq, void *dev_id)
irqreturn_t ret = IRQ_HANDLED;
int max_count = 256;
- spin_lock(&up->port.lock);
- pm_runtime_get_sync(up->dev);
+ if (pm_runtime_suspended(up->dev)) {
+ up->irq_pending = true;
+ pm_runtime_get(up->dev);
+ return IRQ_HANDLED;
+ }
+ spin_lock(&up->port.lock);
do {
iir = serial_in(up, UART_IIR);
if (iir & UART_IIR_NO_INT) {
@@ -400,6 +404,7 @@ static inline irqreturn_t serial_omap_irq(int irq, void *dev_id)
pm_runtime_mark_last_busy(up->dev);
pm_runtime_put_autosuspend(up->dev);
up->port_activity = jiffies;
+ up->irq_pending = false;
return ret;
}
@@ -1305,7 +1310,6 @@ static int serial_omap_probe(struct platform_device *pdev)
pm_runtime_set_autosuspend_delay(&pdev->dev,
omap_up_info->autosuspend_timeout);
- pm_runtime_irq_safe(&pdev->dev);
pm_runtime_enable(&pdev->dev);
pm_runtime_get_sync(&pdev->dev);
@@ -1416,6 +1420,9 @@ static int serial_omap_runtime_suspend(struct device *dev)
if (!up)
return -EINVAL;
+ if (up->irq_pending)
+ return -EBUSY;
+
if (!pdata)
return 0;
@@ -1452,6 +1459,9 @@ static int serial_omap_runtime_resume(struct device *dev)
up->latency = up->calc_latency;
schedule_work(&up->qos_work);
+
+ if (up->irq_pending)
+ serial_omap_irq(up->port.irq, up);
}
return 0;
--
1.7.12.rc3
--
balbi
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