* [PATCH v3 14/14] power: sequencing: pcie-m2: Create serdev device for WCN7850 bluetooth
From: Manivannan Sadhasivam via B4 Relay @ 2026-01-10 6:56 UTC (permalink / raw)
To: Rob Herring, Greg Kroah-Hartman, Jiri Slaby, Nathan Chancellor,
Nicolas Schier, Hans de Goede, Ilpo Järvinen, Mark Pearson,
Derek J. Clark, Manivannan Sadhasivam, Krzysztof Kozlowski,
Conor Dooley, Marcel Holtmann, Luiz Augusto von Dentz,
Bartosz Golaszewski, Andy Shevchenko, Daniel Scally,
Heikki Krogerus, Sakari Ailus, Rafael J. Wysocki,
Danilo Krummrich, Bartosz Golaszewski
Cc: linux-serial, linux-kernel, linux-kbuild, platform-driver-x86,
linux-pci, devicetree, linux-arm-msm, linux-bluetooth, linux-pm,
Stephan Gerhold, Dmitry Baryshkov, linux-acpi,
Manivannan Sadhasivam
In-Reply-To: <20260110-pci-m2-e-v3-0-4faee7d0d5ae@oss.qualcomm.com>
From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
For supporting bluetooth over the non-discoverable UART interface of
WCN7850, create the serdev device after enumerating the PCIe interface.
This is mandatory since the device ID is only known after the PCIe
enumeration and the ID is used for creating the serdev device.
Since there is no OF or ACPI table for the created serdev, a software node
is created with the 'compatible' property. This property will be used to
match the existing OF device id in the bluetooth driver.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
---
drivers/power/sequencing/pwrseq-pcie-m2.c | 125 +++++++++++++++++++++++++++++-
1 file changed, 124 insertions(+), 1 deletion(-)
diff --git a/drivers/power/sequencing/pwrseq-pcie-m2.c b/drivers/power/sequencing/pwrseq-pcie-m2.c
index ad94090bbdb2..7c7bde563341 100644
--- a/drivers/power/sequencing/pwrseq-pcie-m2.c
+++ b/drivers/power/sequencing/pwrseq-pcie-m2.c
@@ -17,6 +17,7 @@
#include <linux/platform_device.h>
#include <linux/pwrseq/provider.h>
#include <linux/regulator/consumer.h>
+#include <linux/serdev.h>
#include <linux/slab.h>
struct pwrseq_pcie_m2_pdata {
@@ -26,11 +27,14 @@ struct pwrseq_pcie_m2_pdata {
struct pwrseq_pcie_m2_ctx {
struct pwrseq_device *pwrseq;
struct device_node *of_node;
+ struct fwnode_handle *fwnode;
+ struct serdev_device *serdev;
const struct pwrseq_pcie_m2_pdata *pdata;
struct regulator_bulk_data *regs;
size_t num_vregs;
struct gpio_desc *w_disable1_gpio;
struct gpio_desc *w_disable2_gpio;
+ struct notifier_block nb;
struct device *dev;
};
@@ -179,9 +183,124 @@ static void pwrseq_pcie_free_resources(void *data)
{
struct pwrseq_pcie_m2_ctx *ctx = data;
+ fwnode_handle_put(ctx->fwnode);
+ serdev_device_put(ctx->serdev);
+ bus_unregister_notifier(&pci_bus_type, &ctx->nb);
regulator_bulk_free(ctx->num_vregs, ctx->regs);
}
+static const struct property_entry wcn7850_bt_props[] = {
+ PROPERTY_ENTRY_STRING("compatible", "qcom,wcn7850-bt"),
+};
+
+static int pwrseq_m2_pcie_notify(struct notifier_block *nb, unsigned long action,
+ void *data)
+{
+ struct pwrseq_pcie_m2_ctx *ctx = container_of(nb, struct pwrseq_pcie_m2_ctx, nb);
+ struct pci_dev *pdev = to_pci_dev(data);
+ struct serdev_controller *serdev_ctrl;
+ struct device *dev = ctx->dev;
+ struct device_node *remote;
+ int ret;
+
+ /*
+ * Check whether the PCI device is associated with this M.2 connector or
+ * not, by comparing the OF node of the PCI device parent and the Port 0
+ * (PCIe) remote node parent OF node.
+ */
+ remote = of_graph_get_remote_node(dev_of_node(ctx->dev), 0, 0);
+ if (!remote || (remote != pdev->dev.parent->of_node)) {
+ of_node_put(remote);
+ return NOTIFY_DONE;
+ }
+ of_node_put(remote);
+
+ switch (action) {
+ case BUS_NOTIFY_ADD_DEVICE:
+ /* Create serdev device for WCN7850 */
+ if (pdev->vendor == PCI_VENDOR_ID_QCOM && pdev->device == 0x1107) {
+ remote = of_graph_get_remote_node(dev_of_node(ctx->dev), 1, 1);
+ if (!remote) {
+ of_node_put(remote);
+ return NOTIFY_DONE;
+ }
+
+ serdev_ctrl = of_find_serdev_controller_by_node(remote);
+ of_node_put(remote);
+ if (!serdev_ctrl)
+ return NOTIFY_DONE;
+
+ ctx->serdev = serdev_device_alloc(serdev_ctrl);
+ if (!ctx->serdev)
+ return NOTIFY_BAD;
+
+ ctx->fwnode = fwnode_create_software_node(wcn7850_bt_props, NULL);
+ if (IS_ERR(ctx->fwnode))
+ return notifier_from_errno(PTR_ERR(ctx->fwnode));
+
+ device_set_node(&ctx->serdev->dev, ctx->fwnode);
+
+ ret = serdev_device_add(ctx->serdev);
+ if (ret) {
+ dev_err(dev, "Failed to add serdev for WCN7850: %d\n", ret);
+ fwnode_handle_put(ctx->fwnode);
+ serdev_device_put(ctx->serdev);
+ return notifier_from_errno(ret);
+ }
+ }
+ break;
+ case BUS_NOTIFY_REMOVED_DEVICE:
+ /* Destroy serdev device for WCN7850 */
+ if (pdev->vendor == PCI_VENDOR_ID_QCOM && pdev->device == 0x1107) {
+ fwnode_handle_put(ctx->fwnode);
+ serdev_device_put(ctx->serdev);
+ }
+ break;
+ }
+
+ return NOTIFY_OK;
+}
+
+static bool pwrseq_pcie_m2_check_remote_node(struct device *dev, u8 port, u8 endpoint,
+ const char *node)
+{
+ struct device_node *remote __free(device_node) =
+ of_graph_get_remote_node(dev_of_node(dev), port, endpoint);
+
+ if (remote && of_node_name_eq(remote, node))
+ return true;
+
+ return false;
+}
+
+/*
+ * If the connector exposes a non-discoverable bus like UART, the respective
+ * protocol device needs to be created manually with the help of the notifier
+ * of the discoverable bus like PCIe.
+ */
+static int pwrseq_pcie_m2_register_notifier(struct pwrseq_pcie_m2_ctx *ctx, struct device *dev)
+{
+ int ret;
+
+ /*
+ * Register a PCI notifier for Key E connector that has PCIe as Port
+ * 0/Endpoint 0 interface and Serial as Port 1/Endpoint 1 interface.
+ */
+ if (pwrseq_pcie_m2_check_remote_node(dev, 1, 1, "serial")) {
+ if (pwrseq_pcie_m2_check_remote_node(dev, 0, 0, "pcie")) {
+ ctx->dev = dev;
+ ctx->nb.notifier_call = pwrseq_m2_pcie_notify;
+ ret = bus_register_notifier(&pci_bus_type, &ctx->nb);
+ if (ret) {
+ dev_err_probe(dev, ret, "Failed to register notifier for serdev\n");
+ return ret;
+ }
+ }
+ }
+
+ return 0;
+}
+
static int pwrseq_pcie_m2_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
@@ -236,7 +355,11 @@ static int pwrseq_pcie_m2_probe(struct platform_device *pdev)
return dev_err_probe(dev, PTR_ERR(ctx->pwrseq),
"Failed to register the power sequencer\n");
- return 0;
+ /*
+ * Register a notifier for creating protocol devices for
+ * non-discoverable busses like UART.
+ */
+ return pwrseq_pcie_m2_register_notifier(ctx, dev);
}
static const struct of_device_id pwrseq_pcie_m2_of_match[] = {
--
2.48.1
^ permalink raw reply related
* [PATCH v3 13/14] power: sequencing: pcie-m2: Add support for PCIe M.2 Key E connectors
From: Manivannan Sadhasivam via B4 Relay @ 2026-01-10 6:56 UTC (permalink / raw)
To: Rob Herring, Greg Kroah-Hartman, Jiri Slaby, Nathan Chancellor,
Nicolas Schier, Hans de Goede, Ilpo Järvinen, Mark Pearson,
Derek J. Clark, Manivannan Sadhasivam, Krzysztof Kozlowski,
Conor Dooley, Marcel Holtmann, Luiz Augusto von Dentz,
Bartosz Golaszewski, Andy Shevchenko, Daniel Scally,
Heikki Krogerus, Sakari Ailus, Rafael J. Wysocki,
Danilo Krummrich, Bartosz Golaszewski
Cc: linux-serial, linux-kernel, linux-kbuild, platform-driver-x86,
linux-pci, devicetree, linux-arm-msm, linux-bluetooth, linux-pm,
Stephan Gerhold, Dmitry Baryshkov, linux-acpi,
Manivannan Sadhasivam
In-Reply-To: <20260110-pci-m2-e-v3-0-4faee7d0d5ae@oss.qualcomm.com>
From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Add support for handling the power sequence of the PCIe M.2 Key E
connectors. These connectors are used to attach the Wireless Connectivity
devices to the host machine including combinations of WiFi, BT, NFC using
interfaces such as PCIe/SDIO for WiFi, USB/UART for BT and I2C for NFC.
Currently, this driver supports only the PCIe interface for WiFi and UART
interface for BT. The driver also only supports driving the 3.3v/1.8v power
supplies and W_DISABLE{1/2}# GPIOs. The optional signals of the Key E
connectors are not currently supported.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
---
drivers/power/sequencing/Kconfig | 1 +
drivers/power/sequencing/pwrseq-pcie-m2.c | 111 ++++++++++++++++++++++++++++--
2 files changed, 105 insertions(+), 7 deletions(-)
diff --git a/drivers/power/sequencing/Kconfig b/drivers/power/sequencing/Kconfig
index f5fff84566ba..29bd204319cc 100644
--- a/drivers/power/sequencing/Kconfig
+++ b/drivers/power/sequencing/Kconfig
@@ -38,6 +38,7 @@ config POWER_SEQUENCING_TH1520_GPU
config POWER_SEQUENCING_PCIE_M2
tristate "PCIe M.2 connector power sequencing driver"
depends on OF || COMPILE_TEST
+ depends on PCI
help
Say Y here to enable the power sequencing driver for PCIe M.2
connectors. This driver handles the power sequencing for the M.2
diff --git a/drivers/power/sequencing/pwrseq-pcie-m2.c b/drivers/power/sequencing/pwrseq-pcie-m2.c
index e01e19123415..ad94090bbdb2 100644
--- a/drivers/power/sequencing/pwrseq-pcie-m2.c
+++ b/drivers/power/sequencing/pwrseq-pcie-m2.c
@@ -4,12 +4,16 @@
* Author: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
*/
+#include <linux/err.h>
#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/gpio/consumer.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_graph.h>
#include <linux/of_platform.h>
+#include <linux/pci.h>
#include <linux/platform_device.h>
#include <linux/pwrseq/provider.h>
#include <linux/regulator/consumer.h>
@@ -25,17 +29,20 @@ struct pwrseq_pcie_m2_ctx {
const struct pwrseq_pcie_m2_pdata *pdata;
struct regulator_bulk_data *regs;
size_t num_vregs;
- struct notifier_block nb;
+ struct gpio_desc *w_disable1_gpio;
+ struct gpio_desc *w_disable2_gpio;
+ struct device *dev;
+
};
-static int pwrseq_pcie_m2_m_vregs_enable(struct pwrseq_device *pwrseq)
+static int pwrseq_pcie_m2_vregs_enable(struct pwrseq_device *pwrseq)
{
struct pwrseq_pcie_m2_ctx *ctx = pwrseq_device_get_drvdata(pwrseq);
return regulator_bulk_enable(ctx->num_vregs, ctx->regs);
}
-static int pwrseq_pcie_m2_m_vregs_disable(struct pwrseq_device *pwrseq)
+static int pwrseq_pcie_m2_vregs_disable(struct pwrseq_device *pwrseq)
{
struct pwrseq_pcie_m2_ctx *ctx = pwrseq_device_get_drvdata(pwrseq);
@@ -44,18 +51,84 @@ static int pwrseq_pcie_m2_m_vregs_disable(struct pwrseq_device *pwrseq)
static const struct pwrseq_unit_data pwrseq_pcie_m2_vregs_unit_data = {
.name = "regulators-enable",
- .enable = pwrseq_pcie_m2_m_vregs_enable,
- .disable = pwrseq_pcie_m2_m_vregs_disable,
+ .enable = pwrseq_pcie_m2_vregs_enable,
+ .disable = pwrseq_pcie_m2_vregs_disable,
};
-static const struct pwrseq_unit_data *pwrseq_pcie_m2_m_unit_deps[] = {
+static const struct pwrseq_unit_data *pwrseq_pcie_m2_unit_deps[] = {
&pwrseq_pcie_m2_vregs_unit_data,
NULL
};
+static int pwrseq_pci_m2_e_uart_enable(struct pwrseq_device *pwrseq)
+{
+ struct pwrseq_pcie_m2_ctx *ctx = pwrseq_device_get_drvdata(pwrseq);
+
+ return gpiod_set_value_cansleep(ctx->w_disable2_gpio, 0);
+}
+
+static int pwrseq_pci_m2_e_uart_disable(struct pwrseq_device *pwrseq)
+{
+ struct pwrseq_pcie_m2_ctx *ctx = pwrseq_device_get_drvdata(pwrseq);
+
+ return gpiod_set_value_cansleep(ctx->w_disable2_gpio, 1);
+}
+
+static const struct pwrseq_unit_data pwrseq_pcie_m2_e_uart_unit_data = {
+ .name = "uart-enable",
+ .deps = pwrseq_pcie_m2_unit_deps,
+ .enable = pwrseq_pci_m2_e_uart_enable,
+ .disable = pwrseq_pci_m2_e_uart_disable,
+};
+
+static int pwrseq_pci_m2_e_pcie_enable(struct pwrseq_device *pwrseq)
+{
+ struct pwrseq_pcie_m2_ctx *ctx = pwrseq_device_get_drvdata(pwrseq);
+
+ return gpiod_set_value_cansleep(ctx->w_disable1_gpio, 0);
+}
+
+static int pwrseq_pci_m2_e_pcie_disable(struct pwrseq_device *pwrseq)
+{
+ struct pwrseq_pcie_m2_ctx *ctx = pwrseq_device_get_drvdata(pwrseq);
+
+ return gpiod_set_value_cansleep(ctx->w_disable1_gpio, 1);
+}
+
+static const struct pwrseq_unit_data pwrseq_pcie_m2_e_pcie_unit_data = {
+ .name = "pcie-enable",
+ .deps = pwrseq_pcie_m2_unit_deps,
+ .enable = pwrseq_pci_m2_e_pcie_enable,
+ .disable = pwrseq_pci_m2_e_pcie_disable,
+};
+
static const struct pwrseq_unit_data pwrseq_pcie_m2_m_pcie_unit_data = {
.name = "pcie-enable",
- .deps = pwrseq_pcie_m2_m_unit_deps,
+ .deps = pwrseq_pcie_m2_unit_deps,
+};
+
+static int pwrseq_pcie_m2_e_pwup_delay(struct pwrseq_device *pwrseq)
+{
+ /*
+ * FIXME: This delay is only required for some Qcom WLAN/BT cards like
+ * WCN7850 and not for all devices. But currently, there is no way to
+ * identify the device model before enumeration.
+ */
+ msleep(50);
+
+ return 0;
+}
+
+static const struct pwrseq_target_data pwrseq_pcie_m2_e_uart_target_data = {
+ .name = "uart",
+ .unit = &pwrseq_pcie_m2_e_uart_unit_data,
+ .post_enable = pwrseq_pcie_m2_e_pwup_delay,
+};
+
+static const struct pwrseq_target_data pwrseq_pcie_m2_e_pcie_target_data = {
+ .name = "pcie",
+ .unit = &pwrseq_pcie_m2_e_pcie_unit_data,
+ .post_enable = pwrseq_pcie_m2_e_pwup_delay,
};
static const struct pwrseq_target_data pwrseq_pcie_m2_m_pcie_target_data = {
@@ -63,11 +136,21 @@ static const struct pwrseq_target_data pwrseq_pcie_m2_m_pcie_target_data = {
.unit = &pwrseq_pcie_m2_m_pcie_unit_data,
};
+static const struct pwrseq_target_data *pwrseq_pcie_m2_e_targets[] = {
+ &pwrseq_pcie_m2_e_pcie_target_data,
+ &pwrseq_pcie_m2_e_uart_target_data,
+ NULL
+};
+
static const struct pwrseq_target_data *pwrseq_pcie_m2_m_targets[] = {
&pwrseq_pcie_m2_m_pcie_target_data,
NULL
};
+static const struct pwrseq_pcie_m2_pdata pwrseq_pcie_m2_e_of_data = {
+ .targets = pwrseq_pcie_m2_e_targets,
+};
+
static const struct pwrseq_pcie_m2_pdata pwrseq_pcie_m2_m_of_data = {
.targets = pwrseq_pcie_m2_m_targets,
};
@@ -126,6 +209,16 @@ static int pwrseq_pcie_m2_probe(struct platform_device *pdev)
return dev_err_probe(dev, ret,
"Failed to get all regulators\n");
+ ctx->w_disable1_gpio = devm_gpiod_get_optional(dev, "w-disable1", GPIOD_OUT_HIGH);
+ if (IS_ERR(ctx->w_disable1_gpio))
+ return dev_err_probe(dev, PTR_ERR(ctx->w_disable1_gpio),
+ "Failed to get the W_DISABLE_1# GPIO\n");
+
+ ctx->w_disable2_gpio = devm_gpiod_get_optional(dev, "w-disable2", GPIOD_OUT_HIGH);
+ if (IS_ERR(ctx->w_disable2_gpio))
+ return dev_err_probe(dev, PTR_ERR(ctx->w_disable2_gpio),
+ "Failed to get the W_DISABLE_2# GPIO\n");
+
ctx->num_vregs = ret;
ret = devm_add_action_or_reset(dev, pwrseq_pcie_free_resources, ctx);
@@ -151,6 +244,10 @@ static const struct of_device_id pwrseq_pcie_m2_of_match[] = {
.compatible = "pcie-m2-m-connector",
.data = &pwrseq_pcie_m2_m_of_data,
},
+ {
+ .compatible = "pcie-m2-e-connector",
+ .data = &pwrseq_pcie_m2_e_of_data,
+ },
{ }
};
MODULE_DEVICE_TABLE(of, pwrseq_pcie_m2_of_match);
--
2.48.1
^ permalink raw reply related
* [PATCH v3 12/14] Bluetooth: hci_qca: Add M.2 Bluetooth device support using pwrseq
From: Manivannan Sadhasivam via B4 Relay @ 2026-01-10 6:56 UTC (permalink / raw)
To: Rob Herring, Greg Kroah-Hartman, Jiri Slaby, Nathan Chancellor,
Nicolas Schier, Hans de Goede, Ilpo Järvinen, Mark Pearson,
Derek J. Clark, Manivannan Sadhasivam, Krzysztof Kozlowski,
Conor Dooley, Marcel Holtmann, Luiz Augusto von Dentz,
Bartosz Golaszewski, Andy Shevchenko, Daniel Scally,
Heikki Krogerus, Sakari Ailus, Rafael J. Wysocki,
Danilo Krummrich, Bartosz Golaszewski
Cc: linux-serial, linux-kernel, linux-kbuild, platform-driver-x86,
linux-pci, devicetree, linux-arm-msm, linux-bluetooth, linux-pm,
Stephan Gerhold, Dmitry Baryshkov, linux-acpi,
Manivannan Sadhasivam
In-Reply-To: <20260110-pci-m2-e-v3-0-4faee7d0d5ae@oss.qualcomm.com>
From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Power supply to the M.2 Bluetooth device attached to the host using M.2
connector is controlled using the 'uart' pwrseq device. So add support for
getting the pwrseq device if the OF graph link is present. Once obtained,
the existing pwrseq APIs can be used to control the power supplies of the
M.2 card.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
---
drivers/bluetooth/hci_qca.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/drivers/bluetooth/hci_qca.c b/drivers/bluetooth/hci_qca.c
index 888176b0faa9..4d562596ebf9 100644
--- a/drivers/bluetooth/hci_qca.c
+++ b/drivers/bluetooth/hci_qca.c
@@ -26,6 +26,7 @@
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/of.h>
+#include <linux/of_graph.h>
#include <linux/acpi.h>
#include <linux/platform_device.h>
#include <linux/pwrseq/consumer.h>
@@ -2384,6 +2385,14 @@ static int qca_serdev_probe(struct serdev_device *serdev)
case QCA_WCN6855:
case QCA_WCN7850:
case QCA_WCN6750:
+ if (of_graph_is_present(dev_of_node(&serdev->ctrl->dev))) {
+ qcadev->bt_power->pwrseq = devm_pwrseq_get(&serdev->ctrl->dev,
+ "uart");
+ if (IS_ERR(qcadev->bt_power->pwrseq))
+ return PTR_ERR(qcadev->bt_power->pwrseq);
+ break;
+ }
+
if (!device_property_present(&serdev->dev, "enable-gpios")) {
/*
* Backward compatibility with old DT sources. If the
--
2.48.1
^ permalink raw reply related
* [PATCH v3 08/14] serdev: Add support for swnode based driver matching and uevent/modalias
From: Manivannan Sadhasivam via B4 Relay @ 2026-01-10 6:56 UTC (permalink / raw)
To: Rob Herring, Greg Kroah-Hartman, Jiri Slaby, Nathan Chancellor,
Nicolas Schier, Hans de Goede, Ilpo Järvinen, Mark Pearson,
Derek J. Clark, Manivannan Sadhasivam, Krzysztof Kozlowski,
Conor Dooley, Marcel Holtmann, Luiz Augusto von Dentz,
Bartosz Golaszewski, Andy Shevchenko, Daniel Scally,
Heikki Krogerus, Sakari Ailus, Rafael J. Wysocki,
Danilo Krummrich, Bartosz Golaszewski
Cc: linux-serial, linux-kernel, linux-kbuild, platform-driver-x86,
linux-pci, devicetree, linux-arm-msm, linux-bluetooth, linux-pm,
Stephan Gerhold, Dmitry Baryshkov, linux-acpi,
Manivannan Sadhasivam
In-Reply-To: <20260110-pci-m2-e-v3-0-4faee7d0d5ae@oss.qualcomm.com>
From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Serdev devices that do not use OF or ACPI can use swnode to expose the
device specific properties that could be used to match the serdev driver.
For such devices, provide the swnode based driver matching and
uevent/modalias support.
If a serdev device doesn't support neither OF, nor ACPI, swnode will be
tried as a last resort.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
---
drivers/tty/serdev/core.c | 20 ++++++++++++++------
1 file changed, 14 insertions(+), 6 deletions(-)
diff --git a/drivers/tty/serdev/core.c b/drivers/tty/serdev/core.c
index f8093b606dda..9d42bd5f550a 100644
--- a/drivers/tty/serdev/core.c
+++ b/drivers/tty/serdev/core.c
@@ -35,7 +35,11 @@ static ssize_t modalias_show(struct device *dev,
if (len != -ENODEV)
return len;
- return of_device_modalias(dev, buf, PAGE_SIZE);
+ len = of_device_modalias(dev, buf, PAGE_SIZE);
+ if (len != -ENODEV)
+ return len;
+
+ return software_node_device_modalias(dev, buf, PAGE_SIZE);
}
static DEVICE_ATTR_RO(modalias);
@@ -49,13 +53,15 @@ static int serdev_device_uevent(const struct device *dev, struct kobj_uevent_env
{
int rc;
- /* TODO: platform modalias */
-
rc = acpi_device_uevent_modalias(dev, env);
if (rc != -ENODEV)
return rc;
- return of_device_uevent_modalias(dev, env);
+ rc = of_device_uevent_modalias(dev, env);
+ if (rc != -ENODEV)
+ return rc;
+
+ return software_node_device_uevent(dev, env);
}
static void serdev_device_release(struct device *dev)
@@ -91,11 +97,13 @@ static int serdev_device_match(struct device *dev, const struct device_driver *d
if (!is_serdev_device(dev))
return 0;
- /* TODO: platform matching */
if (acpi_driver_match_device(dev, drv))
return 1;
- return of_driver_match_device(dev, drv);
+ if (of_driver_match_device(dev, drv))
+ return 1;
+
+ return software_node_match_device(dev, drv);
}
/**
--
2.48.1
^ permalink raw reply related
* [PATCH v3 10/14] dt-bindings: connector: Add PCIe M.2 Mechanical Key E connector
From: Manivannan Sadhasivam via B4 Relay @ 2026-01-10 6:56 UTC (permalink / raw)
To: Rob Herring, Greg Kroah-Hartman, Jiri Slaby, Nathan Chancellor,
Nicolas Schier, Hans de Goede, Ilpo Järvinen, Mark Pearson,
Derek J. Clark, Manivannan Sadhasivam, Krzysztof Kozlowski,
Conor Dooley, Marcel Holtmann, Luiz Augusto von Dentz,
Bartosz Golaszewski, Andy Shevchenko, Daniel Scally,
Heikki Krogerus, Sakari Ailus, Rafael J. Wysocki,
Danilo Krummrich, Bartosz Golaszewski
Cc: linux-serial, linux-kernel, linux-kbuild, platform-driver-x86,
linux-pci, devicetree, linux-arm-msm, linux-bluetooth, linux-pm,
Stephan Gerhold, Dmitry Baryshkov, linux-acpi,
Manivannan Sadhasivam
In-Reply-To: <20260110-pci-m2-e-v3-0-4faee7d0d5ae@oss.qualcomm.com>
From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Add the devicetree binding for PCIe M.2 Mechanical Key E connector defined
in the PCI Express M.2 Specification, r4.0, sec 5.1.2. This connector
provides interfaces like PCIe or SDIO to attach the WiFi devices to the
host machine, USB or UART+PCM interfaces to attach the Bluetooth (BT)
devices. Spec also provides an optional interface to connect the UIM card,
but that is not covered in this binding.
The connector provides a primary power supply of 3.3v, along with an
optional 1.8v VIO supply for the Adapter I/O buffer circuitry operating at
1.8v sideband signaling.
The connector also supplies optional signals in the form of GPIOs for fine
grained power management.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
---
.../bindings/connector/pcie-m2-e-connector.yaml | 154 +++++++++++++++++++++
MAINTAINERS | 1 +
2 files changed, 155 insertions(+)
diff --git a/Documentation/devicetree/bindings/connector/pcie-m2-e-connector.yaml b/Documentation/devicetree/bindings/connector/pcie-m2-e-connector.yaml
new file mode 100644
index 000000000000..b65b39ddfd19
--- /dev/null
+++ b/Documentation/devicetree/bindings/connector/pcie-m2-e-connector.yaml
@@ -0,0 +1,154 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/connector/pcie-m2-e-connector.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: PCIe M.2 Mechanical Key E Connector
+
+maintainers:
+ - Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
+
+description:
+ A PCIe M.2 E connector node represents a physical PCIe M.2 Mechanical Key E
+ connector. Mechanical Key E connectors are used to connect Wireless
+ Connectivity devices including combinations of Wi-Fi, BT, NFC to the host
+ machine over interfaces like PCIe/SDIO, USB/UART+PCM, and I2C.
+
+properties:
+ compatible:
+ const: pcie-m2-e-connector
+
+ vpcie3v3-supply:
+ description: A phandle to the regulator for 3.3v supply.
+
+ vpcie1v8-supply:
+ description: A phandle to the regulator for VIO 1.8v supply.
+
+ ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+ description: OF graph bindings modeling the interfaces exposed on the
+ connector. Since a single connector can have multiple interfaces, every
+ interface has an assigned OF graph port number as described below.
+
+ properties:
+ port@0:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: Connector interfaces for Wi-Fi
+
+ properties:
+ endpoint@0:
+ $ref: /schemas/graph.yaml#/properties/endpoint
+ description: PCIe interface
+
+ endpoint@1:
+ $ref: /schemas/graph.yaml#/properties/endpoint
+ description: SDIO interface
+
+ anyOf:
+ - required:
+ - endpoint@0
+ - required:
+ - endpoint@1
+
+ port@1:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: Connector interfaces for BT
+
+ properties:
+ endpoint@0:
+ $ref: /schemas/graph.yaml#/properties/endpoint
+ description: USB 2.0 interface
+
+ endpoint@1:
+ $ref: /schemas/graph.yaml#/properties/endpoint
+ description: UART interface
+
+ anyOf:
+ - required:
+ - endpoint@0
+ - required:
+ - endpoint@1
+
+ port@2:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: PCM/I2S interface
+
+ i2c-parent:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description: I2C interface
+
+ oneOf:
+ - required:
+ - port@0
+
+ clocks:
+ description: 32.768 KHz Suspend Clock (SUSCLK) input from the host system to
+ the M.2 card. Refer, PCI Express M.2 Specification r4.0, sec 3.1.12.1 for
+ more details.
+ maxItems: 1
+
+ w-disable1-gpios:
+ description: GPIO input to W_DISABLE1# signal. This signal is used by the
+ system to disable WiFi radio in the M.2 card. Refer, PCI Express M.2
+ Specification r4.0, sec 3.1.12.3 for more details.
+ maxItems: 1
+
+ w-disable2-gpios:
+ description: GPIO input to W_DISABLE2# signal. This signal is used by the
+ system to disable WiFi radio in the M.2 card. Refer, PCI Express M.2
+ Specification r4.0, sec 3.1.12.3 for more details.
+ maxItems: 1
+
+ viocfg-gpios:
+ description: GPIO output to IO voltage configuration (VIO_CFG) signal. This
+ signal is used by the M.2 card to indicate to the host system that the
+ card supports an independent IO voltage domain for the sideband signals.
+ Refer, PCI Express M.2 Specification r4.0, sec 3.1.15.1 for more details.
+ maxItems: 1
+
+required:
+ - compatible
+ - vpcie3v3-supply
+
+additionalProperties: false
+
+examples:
+ # PCI M.2 Key E connector for Wi-Fi/BT with PCIe/UART interfaces
+ - |
+ #include <dt-bindings/gpio/gpio.h>
+
+ connector {
+ compatible = "pcie-m2-e-connector";
+ vpcie3v3-supply = <&vreg_wcn_3p3>;
+ vpcie1v8-supply = <&vreg_l15b_1p8>;
+ w-disable1-gpios = <&tlmm 117 GPIO_ACTIVE_LOW>;
+ w-disable2-gpios = <&tlmm 116 GPIO_ACTIVE_LOW>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&pcie4_port0_ep>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&uart14_ep>;
+ };
+ };
+ };
+ };
diff --git a/MAINTAINERS b/MAINTAINERS
index 2eb7b6d26573..451c54675b24 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -20795,6 +20795,7 @@ PCIE M.2 POWER SEQUENCING
M: Manivannan Sadhasivam <mani@kernel.org>
L: linux-pci@vger.kernel.org
S: Maintained
+F: Documentation/devicetree/bindings/connector/pcie-m2-e-connector.yaml
F: Documentation/devicetree/bindings/connector/pcie-m2-m-connector.yaml
F: drivers/power/sequencing/pwrseq-pcie-m2.c
--
2.48.1
^ permalink raw reply related
* [PATCH v3 07/14] serdev: Do not return -ENODEV from of_serdev_register_devices() if external connector is used
From: Manivannan Sadhasivam via B4 Relay @ 2026-01-10 6:56 UTC (permalink / raw)
To: Rob Herring, Greg Kroah-Hartman, Jiri Slaby, Nathan Chancellor,
Nicolas Schier, Hans de Goede, Ilpo Järvinen, Mark Pearson,
Derek J. Clark, Manivannan Sadhasivam, Krzysztof Kozlowski,
Conor Dooley, Marcel Holtmann, Luiz Augusto von Dentz,
Bartosz Golaszewski, Andy Shevchenko, Daniel Scally,
Heikki Krogerus, Sakari Ailus, Rafael J. Wysocki,
Danilo Krummrich, Bartosz Golaszewski
Cc: linux-serial, linux-kernel, linux-kbuild, platform-driver-x86,
linux-pci, devicetree, linux-arm-msm, linux-bluetooth, linux-pm,
Stephan Gerhold, Dmitry Baryshkov, linux-acpi,
Manivannan Sadhasivam, Bartosz Golaszewski
In-Reply-To: <20260110-pci-m2-e-v3-0-4faee7d0d5ae@oss.qualcomm.com>
From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
If an external connector like M.2 is connected to the serdev controller
in DT, then the serdev devices may be created dynamically by the connector
driver. So do not return -ENODEV from of_serdev_register_devices() if the
static nodes are not found and the graph node is used.
Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
---
drivers/tty/serdev/core.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/tty/serdev/core.c b/drivers/tty/serdev/core.c
index 25382c2d63e6..f8093b606dda 100644
--- a/drivers/tty/serdev/core.c
+++ b/drivers/tty/serdev/core.c
@@ -12,6 +12,7 @@
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of.h>
+#include <linux/of_graph.h>
#include <linux/of_device.h>
#include <linux/pm_domain.h>
#include <linux/pm_runtime.h>
@@ -548,7 +549,13 @@ static int of_serdev_register_devices(struct serdev_controller *ctrl)
} else
found = true;
}
- if (!found)
+
+ /*
+ * When the serdev controller is connected to an external connector like
+ * M.2 in DT, then the serdev devices may be created dynamically by the
+ * connector driver.
+ */
+ if (!found && !of_graph_is_present(ctrl->dev.of_node))
return -ENODEV;
return 0;
--
2.48.1
^ permalink raw reply related
* [PATCH v3 06/14] software node: Add software_node_device_modalias() API
From: Manivannan Sadhasivam via B4 Relay @ 2026-01-10 6:56 UTC (permalink / raw)
To: Rob Herring, Greg Kroah-Hartman, Jiri Slaby, Nathan Chancellor,
Nicolas Schier, Hans de Goede, Ilpo Järvinen, Mark Pearson,
Derek J. Clark, Manivannan Sadhasivam, Krzysztof Kozlowski,
Conor Dooley, Marcel Holtmann, Luiz Augusto von Dentz,
Bartosz Golaszewski, Andy Shevchenko, Daniel Scally,
Heikki Krogerus, Sakari Ailus, Rafael J. Wysocki,
Danilo Krummrich, Bartosz Golaszewski
Cc: linux-serial, linux-kernel, linux-kbuild, platform-driver-x86,
linux-pci, devicetree, linux-arm-msm, linux-bluetooth, linux-pm,
Stephan Gerhold, Dmitry Baryshkov, linux-acpi,
Manivannan Sadhasivam
In-Reply-To: <20260110-pci-m2-e-v3-0-4faee7d0d5ae@oss.qualcomm.com>
From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Add software_node_device_modalias() API to return the MODALIAS string for
swnode based on the swnode's compatible property.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
---
drivers/base/swnode.c | 13 +++++++++++++
include/linux/property.h | 1 +
2 files changed, 14 insertions(+)
diff --git a/drivers/base/swnode.c b/drivers/base/swnode.c
index c33e09300e5f..a9fa19a27dc6 100644
--- a/drivers/base/swnode.c
+++ b/drivers/base/swnode.c
@@ -401,6 +401,19 @@ int software_node_device_uevent(const struct device *dev, struct kobj_uevent_env
}
EXPORT_SYMBOL_GPL(software_node_device_uevent);
+ssize_t software_node_device_modalias(struct device *dev, char *str, ssize_t len)
+{
+ const char *compatible;
+ int ret;
+
+ ret = device_property_read_string(dev, "compatible", &compatible);
+ if (ret)
+ return ret;
+
+ return sysfs_emit(str, "%s\n", compatible);
+}
+EXPORT_SYMBOL_GPL(software_node_device_modalias);
+
/* -------------------------------------------------------------------------- */
/* fwnode operations */
diff --git a/include/linux/property.h b/include/linux/property.h
index 14f85fd66bfc..94ea02ae1675 100644
--- a/include/linux/property.h
+++ b/include/linux/property.h
@@ -600,6 +600,7 @@ void software_node_unregister(const struct software_node *node);
bool software_node_match_device(struct device *dev, const struct device_driver *drv);
int software_node_device_uevent(const struct device *dev, struct kobj_uevent_env *env);
+ssize_t software_node_device_modalias(struct device *dev, char *str, ssize_t len);
struct fwnode_handle *
fwnode_create_software_node(const struct property_entry *properties,
--
2.48.1
^ permalink raw reply related
* [PATCH v3 05/14] software node: Add software_node_device_uevent() API
From: Manivannan Sadhasivam via B4 Relay @ 2026-01-10 6:56 UTC (permalink / raw)
To: Rob Herring, Greg Kroah-Hartman, Jiri Slaby, Nathan Chancellor,
Nicolas Schier, Hans de Goede, Ilpo Järvinen, Mark Pearson,
Derek J. Clark, Manivannan Sadhasivam, Krzysztof Kozlowski,
Conor Dooley, Marcel Holtmann, Luiz Augusto von Dentz,
Bartosz Golaszewski, Andy Shevchenko, Daniel Scally,
Heikki Krogerus, Sakari Ailus, Rafael J. Wysocki,
Danilo Krummrich, Bartosz Golaszewski
Cc: linux-serial, linux-kernel, linux-kbuild, platform-driver-x86,
linux-pci, devicetree, linux-arm-msm, linux-bluetooth, linux-pm,
Stephan Gerhold, Dmitry Baryshkov, linux-acpi,
Manivannan Sadhasivam
In-Reply-To: <20260110-pci-m2-e-v3-0-4faee7d0d5ae@oss.qualcomm.com>
From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Add software_node_device_uevent() API to return the uevent variable for
swnode using the DT compatible property. The uevent will have the DT prefix
of "of:N*T*C" to match the DT's module device table.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
---
drivers/base/swnode.c | 13 +++++++++++++
include/linux/property.h | 1 +
2 files changed, 14 insertions(+)
diff --git a/drivers/base/swnode.c b/drivers/base/swnode.c
index 4a3b367dea02..c33e09300e5f 100644
--- a/drivers/base/swnode.c
+++ b/drivers/base/swnode.c
@@ -388,6 +388,19 @@ bool software_node_match_device(struct device *dev, const struct device_driver *
}
EXPORT_SYMBOL_GPL(software_node_match_device);
+int software_node_device_uevent(const struct device *dev, struct kobj_uevent_env *env)
+{
+ const char *compatible;
+ int ret;
+
+ ret = device_property_read_string(dev, "compatible", &compatible);
+ if (ret)
+ return ret;
+
+ return add_uevent_var(env, "MODALIAS=of:N*T*C%s", compatible);
+}
+EXPORT_SYMBOL_GPL(software_node_device_uevent);
+
/* -------------------------------------------------------------------------- */
/* fwnode operations */
diff --git a/include/linux/property.h b/include/linux/property.h
index 7fe75ab732f6..14f85fd66bfc 100644
--- a/include/linux/property.h
+++ b/include/linux/property.h
@@ -599,6 +599,7 @@ int software_node_register(const struct software_node *node);
void software_node_unregister(const struct software_node *node);
bool software_node_match_device(struct device *dev, const struct device_driver *drv);
+int software_node_device_uevent(const struct device *dev, struct kobj_uevent_env *env);
struct fwnode_handle *
fwnode_create_software_node(const struct property_entry *properties,
--
2.48.1
^ permalink raw reply related
* [PATCH v3 11/14] dt-bindings: connector: m2: Add M.2 1620 LGA soldered down connector
From: Manivannan Sadhasivam via B4 Relay @ 2026-01-10 6:56 UTC (permalink / raw)
To: Rob Herring, Greg Kroah-Hartman, Jiri Slaby, Nathan Chancellor,
Nicolas Schier, Hans de Goede, Ilpo Järvinen, Mark Pearson,
Derek J. Clark, Manivannan Sadhasivam, Krzysztof Kozlowski,
Conor Dooley, Marcel Holtmann, Luiz Augusto von Dentz,
Bartosz Golaszewski, Andy Shevchenko, Daniel Scally,
Heikki Krogerus, Sakari Ailus, Rafael J. Wysocki,
Danilo Krummrich, Bartosz Golaszewski
Cc: linux-serial, linux-kernel, linux-kbuild, platform-driver-x86,
linux-pci, devicetree, linux-arm-msm, linux-bluetooth, linux-pm,
Stephan Gerhold, Dmitry Baryshkov, linux-acpi,
Manivannan Sadhasivam
In-Reply-To: <20260110-pci-m2-e-v3-0-4faee7d0d5ae@oss.qualcomm.com>
From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Lenovo Thinkpad T14s is found to have a soldered down version of M.2 1620
LGA connector. Though, there is no 1620 LGA form factor defined in the M.2
spec, it looks very similar to the M.2 Key M connector. So add the
"pcie-m2-1620-lga-connector" compatible with "pcie-m2-e-connector" fallback
to reuse the Key M binding.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
---
.../devicetree/bindings/connector/pcie-m2-e-connector.yaml | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/connector/pcie-m2-e-connector.yaml b/Documentation/devicetree/bindings/connector/pcie-m2-e-connector.yaml
index b65b39ddfd19..9757fe92907b 100644
--- a/Documentation/devicetree/bindings/connector/pcie-m2-e-connector.yaml
+++ b/Documentation/devicetree/bindings/connector/pcie-m2-e-connector.yaml
@@ -17,7 +17,14 @@ description:
properties:
compatible:
- const: pcie-m2-e-connector
+ oneOf:
+ - items:
+ - enum:
+ - pcie-m2-1620-lga-connector
+ - const: pcie-m2-e-connector
+ - items:
+ - enum:
+ - pcie-m2-e-connector
vpcie3v3-supply:
description: A phandle to the regulator for 3.3v supply.
--
2.48.1
^ permalink raw reply related
* [PATCH v3 09/14] dt-bindings: serial: Document the graph port
From: Manivannan Sadhasivam via B4 Relay @ 2026-01-10 6:56 UTC (permalink / raw)
To: Rob Herring, Greg Kroah-Hartman, Jiri Slaby, Nathan Chancellor,
Nicolas Schier, Hans de Goede, Ilpo Järvinen, Mark Pearson,
Derek J. Clark, Manivannan Sadhasivam, Krzysztof Kozlowski,
Conor Dooley, Marcel Holtmann, Luiz Augusto von Dentz,
Bartosz Golaszewski, Andy Shevchenko, Daniel Scally,
Heikki Krogerus, Sakari Ailus, Rafael J. Wysocki,
Danilo Krummrich, Bartosz Golaszewski
Cc: linux-serial, linux-kernel, linux-kbuild, platform-driver-x86,
linux-pci, devicetree, linux-arm-msm, linux-bluetooth, linux-pm,
Stephan Gerhold, Dmitry Baryshkov, linux-acpi,
Manivannan Sadhasivam
In-Reply-To: <20260110-pci-m2-e-v3-0-4faee7d0d5ae@oss.qualcomm.com>
From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
A serial controller could be connected to an external connector like PCIe
M.2 for controlling the serial interface of the card. Hence, document the
OF graph port.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
---
Documentation/devicetree/bindings/serial/serial.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/serial/serial.yaml b/Documentation/devicetree/bindings/serial/serial.yaml
index 6aa9cfae417b..96eb1de8771e 100644
--- a/Documentation/devicetree/bindings/serial/serial.yaml
+++ b/Documentation/devicetree/bindings/serial/serial.yaml
@@ -87,6 +87,9 @@ properties:
description:
TX FIFO threshold configuration (in bytes).
+ port:
+ $ref: /schemas/graph.yaml#/properties/port
+
patternProperties:
"^(bluetooth|bluetooth-gnss|embedded-controller|gnss|gps|mcu|onewire)$":
if:
--
2.48.1
^ permalink raw reply related
* [PATCH v3 03/14] software node: Implement device_get_match_data fwnode callback
From: Manivannan Sadhasivam via B4 Relay @ 2026-01-10 6:56 UTC (permalink / raw)
To: Rob Herring, Greg Kroah-Hartman, Jiri Slaby, Nathan Chancellor,
Nicolas Schier, Hans de Goede, Ilpo Järvinen, Mark Pearson,
Derek J. Clark, Manivannan Sadhasivam, Krzysztof Kozlowski,
Conor Dooley, Marcel Holtmann, Luiz Augusto von Dentz,
Bartosz Golaszewski, Andy Shevchenko, Daniel Scally,
Heikki Krogerus, Sakari Ailus, Rafael J. Wysocki,
Danilo Krummrich, Bartosz Golaszewski
Cc: linux-serial, linux-kernel, linux-kbuild, platform-driver-x86,
linux-pci, devicetree, linux-arm-msm, linux-bluetooth, linux-pm,
Stephan Gerhold, Dmitry Baryshkov, linux-acpi,
Manivannan Sadhasivam, Sui Jingfeng
In-Reply-To: <20260110-pci-m2-e-v3-0-4faee7d0d5ae@oss.qualcomm.com>
From: Sui Jingfeng <sui.jingfeng@linux.dev>
Because the software node backend of the fwnode API framework lacks an
implementation for the .device_get_match_data function callback. This
makes it difficult to use(and/or test) a few drivers that originates
from DT world on the non-DT platform.
Implement the .device_get_match_data fwnode callback, which helps to keep
the three backends of the fwnode API aligned as much as possible. This is
also a fundamental step to make a few drivers OF-independent truely
possible.
Device drivers or platform setup codes are expected to provide a software
node string property, named as "compatible". At this moment, the value of
this string property is being used to match against the compatible entries
in the of_device_id table. It can be extended in the future though.
Signed-off-by: Sui Jingfeng <sui.jingfeng@linux.dev>
[mani: removed fixes tag]
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
---
drivers/base/swnode.c | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/drivers/base/swnode.c b/drivers/base/swnode.c
index 16a8301c25d6..cd722712b8e9 100644
--- a/drivers/base/swnode.c
+++ b/drivers/base/swnode.c
@@ -15,6 +15,7 @@
#include <linux/kobject.h>
#include <linux/kstrtox.h>
#include <linux/list.h>
+#include <linux/mod_devicetable.h>
#include <linux/property.h>
#include <linux/slab.h>
#include <linux/spinlock.h>
@@ -390,6 +391,33 @@ static void software_node_put(struct fwnode_handle *fwnode)
kobject_put(&swnode->kobj);
}
+static const void *
+software_node_get_match_data(const struct fwnode_handle *fwnode,
+ const struct device *dev)
+{
+ struct swnode *swnode = to_swnode(fwnode);
+ const struct of_device_id *matches = dev->driver->of_match_table;
+ const char *val = NULL;
+ int ret;
+
+ ret = property_entry_read_string_array(swnode->node->properties,
+ "compatible", &val, 1);
+ if (ret < 0 || !val)
+ return NULL;
+
+ if (!matches)
+ return NULL;
+
+ while (matches->compatible[0]) {
+ if (!strcmp(matches->compatible, val))
+ return matches->data;
+
+ ++matches;
+ }
+
+ return NULL;
+}
+
static bool software_node_property_present(const struct fwnode_handle *fwnode,
const char *propname)
{
@@ -694,6 +722,7 @@ software_node_graph_parse_endpoint(const struct fwnode_handle *fwnode,
static const struct fwnode_operations software_node_ops = {
.get = software_node_get,
.put = software_node_put,
+ .device_get_match_data = software_node_get_match_data,
.property_present = software_node_property_present,
.property_read_bool = software_node_property_present,
.property_read_int_array = software_node_read_int_array,
--
2.48.1
^ permalink raw reply related
* [PATCH v3 01/14] serdev: Convert to_serdev_*() helpers to macros and use container_of_const()
From: Manivannan Sadhasivam via B4 Relay @ 2026-01-10 6:56 UTC (permalink / raw)
To: Rob Herring, Greg Kroah-Hartman, Jiri Slaby, Nathan Chancellor,
Nicolas Schier, Hans de Goede, Ilpo Järvinen, Mark Pearson,
Derek J. Clark, Manivannan Sadhasivam, Krzysztof Kozlowski,
Conor Dooley, Marcel Holtmann, Luiz Augusto von Dentz,
Bartosz Golaszewski, Andy Shevchenko, Daniel Scally,
Heikki Krogerus, Sakari Ailus, Rafael J. Wysocki,
Danilo Krummrich, Bartosz Golaszewski
Cc: linux-serial, linux-kernel, linux-kbuild, platform-driver-x86,
linux-pci, devicetree, linux-arm-msm, linux-bluetooth, linux-pm,
Stephan Gerhold, Dmitry Baryshkov, linux-acpi,
Manivannan Sadhasivam, Bartosz Golaszewski
In-Reply-To: <20260110-pci-m2-e-v3-0-4faee7d0d5ae@oss.qualcomm.com>
From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
If these helpers receive the 'const struct device' pointer, then the const
qualifier will get dropped, leading to below warning:
warning: passing argument 1 of ‘to_serdev_device_driver’ discards 'const'
qualifier from pointer target type [-Wdiscarded-qualifiers]
This is not an issue as of now, but with the future commits adding serdev
device based driver matching, this warning will get triggered. Hence,
convert these helpers to macros so that the qualifier get preserved and
also use container_of_const() as container_of() is deprecated.
Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
---
include/linux/serdev.h | 15 +++------------
1 file changed, 3 insertions(+), 12 deletions(-)
diff --git a/include/linux/serdev.h b/include/linux/serdev.h
index 34562eb99931..ecde0ad3e248 100644
--- a/include/linux/serdev.h
+++ b/include/linux/serdev.h
@@ -49,10 +49,7 @@ struct serdev_device {
struct mutex write_lock;
};
-static inline struct serdev_device *to_serdev_device(struct device *d)
-{
- return container_of(d, struct serdev_device, dev);
-}
+#define to_serdev_device(d) container_of_const(d, struct serdev_device, dev)
/**
* struct serdev_device_driver - serdev slave device driver
@@ -67,10 +64,7 @@ struct serdev_device_driver {
void (*remove)(struct serdev_device *);
};
-static inline struct serdev_device_driver *to_serdev_device_driver(struct device_driver *d)
-{
- return container_of(d, struct serdev_device_driver, driver);
-}
+#define to_serdev_device_driver(d) container_of_const(d, struct serdev_device_driver, driver)
enum serdev_parity {
SERDEV_PARITY_NONE,
@@ -111,10 +105,7 @@ struct serdev_controller {
const struct serdev_controller_ops *ops;
};
-static inline struct serdev_controller *to_serdev_controller(struct device *d)
-{
- return container_of(d, struct serdev_controller, dev);
-}
+#define to_serdev_controller(d) container_of_const(d, struct serdev_controller, dev)
static inline void *serdev_device_get_drvdata(const struct serdev_device *serdev)
{
--
2.48.1
^ permalink raw reply related
* [PATCH v3 02/14] serdev: Add an API to find the serdev controller associated with the devicetree node
From: Manivannan Sadhasivam via B4 Relay @ 2026-01-10 6:56 UTC (permalink / raw)
To: Rob Herring, Greg Kroah-Hartman, Jiri Slaby, Nathan Chancellor,
Nicolas Schier, Hans de Goede, Ilpo Järvinen, Mark Pearson,
Derek J. Clark, Manivannan Sadhasivam, Krzysztof Kozlowski,
Conor Dooley, Marcel Holtmann, Luiz Augusto von Dentz,
Bartosz Golaszewski, Andy Shevchenko, Daniel Scally,
Heikki Krogerus, Sakari Ailus, Rafael J. Wysocki,
Danilo Krummrich, Bartosz Golaszewski
Cc: linux-serial, linux-kernel, linux-kbuild, platform-driver-x86,
linux-pci, devicetree, linux-arm-msm, linux-bluetooth, linux-pm,
Stephan Gerhold, Dmitry Baryshkov, linux-acpi,
Manivannan Sadhasivam
In-Reply-To: <20260110-pci-m2-e-v3-0-4faee7d0d5ae@oss.qualcomm.com>
From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Add of_find_serdev_controller_by_node() API to find the serdev controller
device associated with the devicetree node.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
---
drivers/tty/serdev/core.c | 16 ++++++++++++++++
include/linux/serdev.h | 9 +++++++++
2 files changed, 25 insertions(+)
diff --git a/drivers/tty/serdev/core.c b/drivers/tty/serdev/core.c
index b33e708cb245..25382c2d63e6 100644
--- a/drivers/tty/serdev/core.c
+++ b/drivers/tty/serdev/core.c
@@ -504,6 +504,22 @@ struct serdev_controller *serdev_controller_alloc(struct device *host,
}
EXPORT_SYMBOL_GPL(serdev_controller_alloc);
+/**
+ * of_find_serdev_controller_by_node() - Find the serdev controller associated
+ * with the devicetree node
+ * @node: Devicetree node
+ *
+ * Return: Pointer to the serdev controller associated with the node. NULL if
+ * the controller is not found.
+ */
+struct serdev_controller *of_find_serdev_controller_by_node(struct device_node *node)
+{
+ struct device *dev = bus_find_device_by_of_node(&serdev_bus_type, node);
+
+ return (dev && dev->type == &serdev_ctrl_type) ? to_serdev_controller(dev) : NULL;
+}
+EXPORT_SYMBOL_GPL(of_find_serdev_controller_by_node);
+
static int of_serdev_register_devices(struct serdev_controller *ctrl)
{
struct device_node *node;
diff --git a/include/linux/serdev.h b/include/linux/serdev.h
index ecde0ad3e248..db9bfaba0662 100644
--- a/include/linux/serdev.h
+++ b/include/linux/serdev.h
@@ -333,4 +333,13 @@ static inline bool serdev_acpi_get_uart_resource(struct acpi_resource *ares,
}
#endif /* CONFIG_ACPI */
+#ifdef CONFIG_OF
+struct serdev_controller *of_find_serdev_controller_by_node(struct device_node *node);
+#else
+struct serdev_controller *of_find_serdev_controller_by_node(struct device_node *node)
+{
+ return NULL;
+}
+#endif /* CONFIG_OF */
+
#endif /*_LINUX_SERDEV_H */
--
2.48.1
^ permalink raw reply related
* [PATCH v3 00/14] Add support for handling PCIe M.2 Key E connectors in devicetree
From: Manivannan Sadhasivam via B4 Relay @ 2026-01-10 6:56 UTC (permalink / raw)
To: Rob Herring, Greg Kroah-Hartman, Jiri Slaby, Nathan Chancellor,
Nicolas Schier, Hans de Goede, Ilpo Järvinen, Mark Pearson,
Derek J. Clark, Manivannan Sadhasivam, Krzysztof Kozlowski,
Conor Dooley, Marcel Holtmann, Luiz Augusto von Dentz,
Bartosz Golaszewski, Andy Shevchenko, Daniel Scally,
Heikki Krogerus, Sakari Ailus, Rafael J. Wysocki,
Danilo Krummrich, Bartosz Golaszewski
Cc: linux-serial, linux-kernel, linux-kbuild, platform-driver-x86,
linux-pci, devicetree, linux-arm-msm, linux-bluetooth, linux-pm,
Stephan Gerhold, Dmitry Baryshkov, linux-acpi,
Manivannan Sadhasivam, Bartosz Golaszewski, Sui Jingfeng
Hi,
This series is the continuation of the series [1] that added the initial support
for the PCIe M.2 connectors. This series extends it by adding support for Key E
connectors. These connectors are used to connect the Wireless Connectivity
devices such as WiFi, BT, NFC and GNSS devices to the host machine over
interfaces such as PCIe/SDIO, USB/UART and NFC. This series adds support for
connectors that expose PCIe interface for WiFi and UART interface for BT. Other
interfaces are left for future improvements.
Serdev device support for BT
============================
Adding support for the PCIe interface was mostly straightforward and a lot
similar to the previous Key M connector. But adding UART interface has proved to
be tricky. This is mostly because of the fact UART is a non-discoverable bus,
unlike PCIe which is discoverable. So this series relied on the PCI notifier to
create the serdev device for UART/BT. This means the PCIe interface will be
brought up first and after the PCIe device enumeration, the serdev device will
be created by the pwrseq driver. This logic is necessary since the connector
driver and DT node don't describe the device, but just the connector. So to make
the connector interface Plug and Play, the connector driver uses the PCIe device
ID to identify the card and creates the serdev device. This logic could be
extended in the future to support more M.2 cards. Even if the M.2 card uses SDIO
interface for connecting WLAN, a SDIO notifier could be added to create the
serdev device.
Open questions
==============
Though this series adds the relevant functionality for handling the M.2 Key M
connectors, there are still a few open questions exists on the design.
1. I've used the DT compatible for the serdev swnode to match the existing OF
device_id of the bluetooth driver. This avoids implementing custom serdev id
matching as implemented till v2.
2. PCIe client drivers of some M.2 WLAN cards like the Qcom QCA6390, rely on
the PCIe device DT node to extract properties such as
'qcom,calibration-variant', 'firmware-name', etc... For those drivers, should we
add the PCIe DT node in the Root Port in conjunction with the Port node as
below?
pcie@0 {
wifi@0 {
compatible = "pci17cb,1103";
...
qcom,calibration-variant = "LE_X13S";
};
port {
pcie4_port0_ep: endpoint {
remote-endpoint = <&m2_e_pcie_ep>;
};
};
};
This will also require marking the PMU supplies optional in the relevant ath
bindings for M.2 cards.
3. Some M.2 cards require specific power up sequence like delays between
regulator/GPIO and such. For instance, the WCN7850 card supported in this series
requires 50ms delay between powering up an interface and driving it. I've just
hardcoded the delay in the driver, but it is a pure hack. Since the pwrseq
driver doesn't know anything about the device it is dealing with before powering
it ON, how should it handle the device specific power requirements? Should we
hardcode the device specific property in the connector node? But then, it will
no longer become a generic M.2 connector and sort of defeats the purpose of the
connector binding.
I hope to address these questions with the help of the relevant subsystem
maintainers and the community.
Testing
=======
This series, together with the devicetree changes [2] was tested on the
Qualcomm X1e based Lenovo Thinkpad T14s Laptop which has the WCN7850 WLAN/BT
1620 LGA card connected over PCIe and UART.
Dependency
==========
This series is dependent on the M.2 Key M series [1] on top of v6.19-rc1.
[1] https://lore.kernel.org/linux-pci/20260107-pci-m2-v5-0-8173d8a72641@oss.qualcomm.com
[2] https://github.com/Mani-Sadhasivam/linux/commit/753033861360171f2af1fdd56e8985ff916e1ac2
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
---
Changes in v3:
- Switched to swnode for the serdev device and dropped the custom
serdev_device_id related patches
- Added new swnode APIs to match the swnode with existing of_device_id
- Incorporated comments in the bindings patch
- Dropped the UIM interface from binding since it is not clear how it should get
wired
- Incorporated comments in the pwrseq driver patch
- Splitted the pwrseq patch into two
- Added the 1620 LGA compatible with Key E fallback based on Stephan's finding
- Link to v2: https://lore.kernel.org/r/20251125-pci-m2-e-v2-0-32826de07cc5@oss.qualcomm.com
Changes in v2:
- Used '-' for GPIO names in the binding and removed led*-gpios properties
- Described the endpoint nodes for port@0 and port@1 nodes
- Added the OF graph port to the serial binding
- Fixed the hci_qca driver to return err if devm_pwrseq_get() fails
- Incorporated various review comments in pwrseq driver
- Collected Ack
- Link to v1: https://lore.kernel.org/r/20251112-pci-m2-e-v1-0-97413d6bf824@oss.qualcomm.com
---
Manivannan Sadhasivam (13):
serdev: Convert to_serdev_*() helpers to macros and use container_of_const()
serdev: Add an API to find the serdev controller associated with the devicetree node
software node: Add software_node_match_device() API
software node: Add software_node_device_uevent() API
software node: Add software_node_device_modalias() API
serdev: Do not return -ENODEV from of_serdev_register_devices() if external connector is used
serdev: Add support for swnode based driver matching and uevent/modalias
dt-bindings: serial: Document the graph port
dt-bindings: connector: Add PCIe M.2 Mechanical Key E connector
dt-bindings: connector: m2: Add M.2 1620 LGA soldered down connector
Bluetooth: hci_qca: Add M.2 Bluetooth device support using pwrseq
power: sequencing: pcie-m2: Add support for PCIe M.2 Key E connectors
power: sequencing: pcie-m2: Create serdev device for WCN7850 bluetooth
Sui Jingfeng (1):
software node: Implement device_get_match_data fwnode callback
.../bindings/connector/pcie-m2-e-connector.yaml | 161 ++++++++++++++
.../devicetree/bindings/serial/serial.yaml | 3 +
MAINTAINERS | 1 +
drivers/base/swnode.c | 71 +++++++
drivers/bluetooth/hci_qca.c | 9 +
drivers/power/sequencing/Kconfig | 1 +
drivers/power/sequencing/pwrseq-pcie-m2.c | 234 ++++++++++++++++++++-
drivers/tty/serdev/core.c | 45 +++-
include/linux/property.h | 5 +
include/linux/serdev.h | 24 +--
10 files changed, 528 insertions(+), 26 deletions(-)
---
base-commit: cb6649f6217c0331b885cf787f1d175963e2a1d2
change-id: 20251112-pci-m2-e-94695ac9d657
prerequisite-message-id: 20251125-pci-m2-v3-0-c528042aea47@oss.qualcomm.com
prerequisite-patch-id: 58778d8eb97ab86008cd48fb5d28ed6cc0bbbc1b
prerequisite-patch-id: 2dd7d793a67f59ef6e6b5137e69436896198b965
prerequisite-patch-id: 8ccaa5fdd95e64e69cd942f93c26e89b827d0453
prerequisite-patch-id: 3d3e1bb7959ab1e140c5024acdd8655e7a7e99ef
Best regards,
--
Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
^ permalink raw reply
* [PATCH v3 04/14] software node: Add software_node_match_device() API
From: Manivannan Sadhasivam via B4 Relay @ 2026-01-10 6:56 UTC (permalink / raw)
To: Rob Herring, Greg Kroah-Hartman, Jiri Slaby, Nathan Chancellor,
Nicolas Schier, Hans de Goede, Ilpo Järvinen, Mark Pearson,
Derek J. Clark, Manivannan Sadhasivam, Krzysztof Kozlowski,
Conor Dooley, Marcel Holtmann, Luiz Augusto von Dentz,
Bartosz Golaszewski, Andy Shevchenko, Daniel Scally,
Heikki Krogerus, Sakari Ailus, Rafael J. Wysocki,
Danilo Krummrich, Bartosz Golaszewski
Cc: linux-serial, linux-kernel, linux-kbuild, platform-driver-x86,
linux-pci, devicetree, linux-arm-msm, linux-bluetooth, linux-pm,
Stephan Gerhold, Dmitry Baryshkov, linux-acpi,
Manivannan Sadhasivam
In-Reply-To: <20260110-pci-m2-e-v3-0-4faee7d0d5ae@oss.qualcomm.com>
From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Add software_node_match_device() API to match the swnode device with the
swnode driver. The matching is based on the compatible property in the
device and the driver's of_match_table.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
---
drivers/base/swnode.c | 16 ++++++++++++++++
include/linux/property.h | 3 +++
2 files changed, 19 insertions(+)
diff --git a/drivers/base/swnode.c b/drivers/base/swnode.c
index cd722712b8e9..4a3b367dea02 100644
--- a/drivers/base/swnode.c
+++ b/drivers/base/swnode.c
@@ -372,6 +372,22 @@ void property_entries_free(const struct property_entry *properties)
}
EXPORT_SYMBOL_GPL(property_entries_free);
+bool software_node_match_device(struct device *dev, const struct device_driver *drv)
+{
+ const struct of_device_id *id;
+
+ if (!drv->of_match_table)
+ return false;
+
+ for (id = drv->of_match_table; id->compatible[0]; id++) {
+ if (device_is_compatible(dev, id->compatible))
+ return true;
+ }
+
+ return false;
+}
+EXPORT_SYMBOL_GPL(software_node_match_device);
+
/* -------------------------------------------------------------------------- */
/* fwnode operations */
diff --git a/include/linux/property.h b/include/linux/property.h
index 272bfbdea7bf..7fe75ab732f6 100644
--- a/include/linux/property.h
+++ b/include/linux/property.h
@@ -14,6 +14,7 @@
#include <linux/array_size.h>
#include <linux/bits.h>
#include <linux/cleanup.h>
+#include <linux/device.h>
#include <linux/fwnode.h>
#include <linux/stddef.h>
#include <linux/types.h>
@@ -597,6 +598,8 @@ void software_node_unregister_node_group(const struct software_node * const *nod
int software_node_register(const struct software_node *node);
void software_node_unregister(const struct software_node *node);
+bool software_node_match_device(struct device *dev, const struct device_driver *drv);
+
struct fwnode_handle *
fwnode_create_software_node(const struct property_entry *properties,
const struct fwnode_handle *parent);
--
2.48.1
^ permalink raw reply related
* [PATCH v4 11/11] riscv: dts: spacemit: add SpacemiT K3 Pico-ITX board device tree
From: Guodong Xu @ 2026-01-10 5:18 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Paul Walmsley,
Palmer Dabbelt, Albert Ou, Alexandre Ghiti, Yixun Lan,
Daniel Lezcano, Thomas Gleixner, Samuel Holland, Anup Patel,
Greg Kroah-Hartman, Jiri Slaby, Lubomir Rintel, Yangyu Chen
Cc: Paul Walmsley, Conor Dooley, Heinrich Schuchardt,
Kevin Meng Zhang, Anup Patel, Andrew Jones, devicetree,
linux-riscv, linux-kernel, spacemit, linux-serial, Guodong Xu
In-Reply-To: <20260110-k3-basic-dt-v4-0-d492f3a30ffa@riscstar.com>
K3 Pico-ITX is a 2.5-inch single-board computer equipted with a SpacemiT
K3 SoC.
This minimal device tree enables booting into a serial console with UART
output.
Signed-off-by: Guodong Xu <guodong@riscstar.com>
---
v4: No change.
v3: No change.
v2: Add aliases node in this board DT.
Update the memory node to reflect the hardware truth. Address
starts at 0x100000000 (4G) boundary.
---
arch/riscv/boot/dts/spacemit/Makefile | 1 +
arch/riscv/boot/dts/spacemit/k3-pico-itx.dts | 38 ++++++++++++++++++++++++++++
2 files changed, 39 insertions(+)
diff --git a/arch/riscv/boot/dts/spacemit/Makefile b/arch/riscv/boot/dts/spacemit/Makefile
index 95889e7269d1..7e2b87702571 100644
--- a/arch/riscv/boot/dts/spacemit/Makefile
+++ b/arch/riscv/boot/dts/spacemit/Makefile
@@ -4,3 +4,4 @@ dtb-$(CONFIG_ARCH_SPACEMIT) += k1-milkv-jupiter.dtb
dtb-$(CONFIG_ARCH_SPACEMIT) += k1-musepi-pro.dtb
dtb-$(CONFIG_ARCH_SPACEMIT) += k1-orangepi-r2s.dtb
dtb-$(CONFIG_ARCH_SPACEMIT) += k1-orangepi-rv2.dtb
+dtb-$(CONFIG_ARCH_SPACEMIT) += k3-pico-itx.dtb
diff --git a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
new file mode 100644
index 000000000000..037ce757e5bc
--- /dev/null
+++ b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
@@ -0,0 +1,38 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (c) 2025 SpacemiT (Hangzhou) Technology Co. Ltd
+ * Copyright (c) 2025 Guodong Xu <guodong@riscstar.com>
+ */
+
+#include "k3.dtsi"
+
+/ {
+ model = "SpacemiT K3 Pico-ITX";
+ compatible = "spacemit,k3-pico-itx", "spacemit,k3";
+
+ aliases {
+ serial0 = &uart0;
+ serial2 = &uart2;
+ serial3 = &uart3;
+ serial4 = &uart4;
+ serial5 = &uart5;
+ serial6 = &uart6;
+ serial7 = &uart7;
+ serial8 = &uart8;
+ serial9 = &uart9;
+ serial10 = &uart10;
+ };
+
+ chosen {
+ stdout-path = "serial0";
+ };
+
+ memory@100000000 {
+ device_type = "memory";
+ reg = <0x1 0x00000000 0x4 0x00000000>;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
--
2.43.0
^ permalink raw reply related
* [PATCH v4 10/11] riscv: dts: spacemit: add initial device tree of SpacemiT K3 SoC
From: Guodong Xu @ 2026-01-10 5:18 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Paul Walmsley,
Palmer Dabbelt, Albert Ou, Alexandre Ghiti, Yixun Lan,
Daniel Lezcano, Thomas Gleixner, Samuel Holland, Anup Patel,
Greg Kroah-Hartman, Jiri Slaby, Lubomir Rintel, Yangyu Chen
Cc: Paul Walmsley, Conor Dooley, Heinrich Schuchardt,
Kevin Meng Zhang, Anup Patel, Andrew Jones, devicetree,
linux-riscv, linux-kernel, spacemit, linux-serial, Guodong Xu
In-Reply-To: <20260110-k3-basic-dt-v4-0-d492f3a30ffa@riscstar.com>
SpacemiT K3 is equipped with 8 X100 cores, which are RVA23 compliant.
Add nodes of uarts, timer and interrupt-controllers.
Signed-off-by: Guodong Xu <guodong@riscstar.com>
---
v4: Fix missing blank space after commas in compatible string.
Add m-mode imsic and aplic node.
Reorder properties in simsic, saplic, mimsic, and maplic nodes
to match DTS coding style.
v3: Remove "supm" from the riscv,isa-extensions list.
v2: Remove aliases from k3.dtsi, they should be in board DTS.
Updated riscv,isa-extensions with new extensions from the extensions.yaml.
---
arch/riscv/boot/dts/spacemit/k3.dtsi | 590 +++++++++++++++++++++++++++++++++++
1 file changed, 590 insertions(+)
diff --git a/arch/riscv/boot/dts/spacemit/k3.dtsi b/arch/riscv/boot/dts/spacemit/k3.dtsi
new file mode 100644
index 000000000000..a815f85cf5a6
--- /dev/null
+++ b/arch/riscv/boot/dts/spacemit/k3.dtsi
@@ -0,0 +1,590 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (c) 2025 SpacemiT (Hangzhou) Technology Co. Ltd
+ * Copyright (c) 2025 Guodong Xu <guodong@riscstar.com>
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+
+/dts-v1/;
+
+/ {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ model = "SpacemiT K3";
+ compatible = "spacemit,k3";
+
+ cpus: cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ timebase-frequency = <24000000>;
+
+ cpu_0: cpu@0 {
+ compatible = "spacemit,x100", "riscv";
+ device_type = "cpu";
+ reg = <0>;
+ riscv,isa-base = "rv64i";
+ riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "b", "v", "h",
+ "sha", "shcounterenw", "shgatpa", "shtvala",
+ "shvsatpa", "shvstvala", "shvstvecd", "smaia",
+ "smstateen", "ssaia", "ssccptr", "sscofpmf",
+ "sscounterenw", "ssnpm", "ssstateen", "sstc",
+ "sstvala", "sstvecd", "ssu64xl", "svade",
+ "svinval", "svnapot", "svpbmt", "za64rs",
+ "zawrs", "zba", "zbb", "zbc", "zbs", "zca",
+ "zcb", "zcd", "zcmop", "zfa", "zfbfmin",
+ "zfh", "zfhmin", "zicbom", "zicbop", "zicboz",
+ "ziccamoa", "ziccif", "zicclsm", "zicntr",
+ "zicond", "zicsr", "zifencei", "zihintntl",
+ "zihintpause", "zihpm", "zimop", "zkt", "zvbb",
+ "zvbc", "zvfbfmin", "zvfbfwma", "zvfh",
+ "zvfhmin", "zvkb", "zvkg", "zvkn", "zvknc",
+ "zvkned", "zvkng", "zvknha", "zvknhb", "zvks",
+ "zvksc", "zvksed", "zvksg", "zvksh", "zvkt";
+ riscv,cbom-block-size = <64>;
+ riscv,cbop-block-size = <64>;
+ riscv,cboz-block-size = <64>;
+ i-cache-block-size = <64>;
+ i-cache-size = <65536>;
+ i-cache-sets = <256>;
+ d-cache-block-size = <64>;
+ d-cache-size = <65536>;
+ d-cache-sets = <256>;
+ next-level-cache = <&l2_cache0>;
+ mmu-type = "riscv,sv39";
+
+ cpu0_intc: interrupt-controller {
+ compatible = "riscv,cpu-intc";
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ };
+ };
+
+ cpu_1: cpu@1 {
+ compatible = "spacemit,x100", "riscv";
+ device_type = "cpu";
+ reg = <1>;
+ riscv,isa-base = "rv64i";
+ riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "b", "v", "h",
+ "sha", "shcounterenw", "shgatpa", "shtvala",
+ "shvsatpa", "shvstvala", "shvstvecd", "smaia",
+ "smstateen", "ssaia", "ssccptr", "sscofpmf",
+ "sscounterenw", "ssnpm", "ssstateen", "sstc",
+ "sstvala", "sstvecd", "ssu64xl", "svade",
+ "svinval", "svnapot", "svpbmt", "za64rs",
+ "zawrs", "zba", "zbb", "zbc", "zbs", "zca",
+ "zcb", "zcd", "zcmop", "zfa", "zfbfmin",
+ "zfh", "zfhmin", "zicbom", "zicbop", "zicboz",
+ "ziccamoa", "ziccif", "zicclsm", "zicntr",
+ "zicond", "zicsr", "zifencei", "zihintntl",
+ "zihintpause", "zihpm", "zimop", "zkt", "zvbb",
+ "zvbc", "zvfbfmin", "zvfbfwma", "zvfh",
+ "zvfhmin", "zvkb", "zvkg", "zvkn", "zvknc",
+ "zvkned", "zvkng", "zvknha", "zvknhb", "zvks",
+ "zvksc", "zvksed", "zvksg", "zvksh", "zvkt";
+ riscv,cbom-block-size = <64>;
+ riscv,cbop-block-size = <64>;
+ riscv,cboz-block-size = <64>;
+ i-cache-block-size = <64>;
+ i-cache-size = <65536>;
+ i-cache-sets = <256>;
+ d-cache-block-size = <64>;
+ d-cache-size = <65536>;
+ d-cache-sets = <256>;
+ next-level-cache = <&l2_cache0>;
+ mmu-type = "riscv,sv39";
+
+ cpu1_intc: interrupt-controller {
+ compatible = "riscv,cpu-intc";
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ };
+ };
+
+ cpu_2: cpu@2 {
+ compatible = "spacemit,x100", "riscv";
+ device_type = "cpu";
+ reg = <2>;
+ riscv,isa-base = "rv64i";
+ riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "b", "v", "h",
+ "sha", "shcounterenw", "shgatpa", "shtvala",
+ "shvsatpa", "shvstvala", "shvstvecd", "smaia",
+ "smstateen", "ssaia", "ssccptr", "sscofpmf",
+ "sscounterenw", "ssnpm", "ssstateen", "sstc",
+ "sstvala", "sstvecd", "ssu64xl", "svade",
+ "svinval", "svnapot", "svpbmt", "za64rs",
+ "zawrs", "zba", "zbb", "zbc", "zbs", "zca",
+ "zcb", "zcd", "zcmop", "zfa", "zfbfmin",
+ "zfh", "zfhmin", "zicbom", "zicbop", "zicboz",
+ "ziccamoa", "ziccif", "zicclsm", "zicntr",
+ "zicond", "zicsr", "zifencei", "zihintntl",
+ "zihintpause", "zihpm", "zimop", "zkt", "zvbb",
+ "zvbc", "zvfbfmin", "zvfbfwma", "zvfh",
+ "zvfhmin", "zvkb", "zvkg", "zvkn", "zvknc",
+ "zvkned", "zvkng", "zvknha", "zvknhb", "zvks",
+ "zvksc", "zvksed", "zvksg", "zvksh", "zvkt";
+ riscv,cbom-block-size = <64>;
+ riscv,cbop-block-size = <64>;
+ riscv,cboz-block-size = <64>;
+ i-cache-block-size = <64>;
+ i-cache-size = <65536>;
+ i-cache-sets = <256>;
+ d-cache-block-size = <64>;
+ d-cache-size = <65536>;
+ d-cache-sets = <256>;
+ next-level-cache = <&l2_cache0>;
+ mmu-type = "riscv,sv39";
+
+ cpu2_intc: interrupt-controller {
+ compatible = "riscv,cpu-intc";
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ };
+ };
+
+ cpu_3: cpu@3 {
+ compatible = "spacemit,x100", "riscv";
+ device_type = "cpu";
+ reg = <3>;
+ riscv,isa-base = "rv64i";
+ riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "b", "v", "h",
+ "sha", "shcounterenw", "shgatpa", "shtvala",
+ "shvsatpa", "shvstvala", "shvstvecd", "smaia",
+ "smstateen", "ssaia", "ssccptr", "sscofpmf",
+ "sscounterenw", "ssnpm", "ssstateen", "sstc",
+ "sstvala", "sstvecd", "ssu64xl", "svade",
+ "svinval", "svnapot", "svpbmt", "za64rs",
+ "zawrs", "zba", "zbb", "zbc", "zbs", "zca",
+ "zcb", "zcd", "zcmop", "zfa", "zfbfmin",
+ "zfh", "zfhmin", "zicbom", "zicbop", "zicboz",
+ "ziccamoa", "ziccif", "zicclsm", "zicntr",
+ "zicond", "zicsr", "zifencei", "zihintntl",
+ "zihintpause", "zihpm", "zimop", "zkt", "zvbb",
+ "zvbc", "zvfbfmin", "zvfbfwma", "zvfh",
+ "zvfhmin", "zvkb", "zvkg", "zvkn", "zvknc",
+ "zvkned", "zvkng", "zvknha", "zvknhb", "zvks",
+ "zvksc", "zvksed", "zvksg", "zvksh", "zvkt";
+ riscv,cbom-block-size = <64>;
+ riscv,cbop-block-size = <64>;
+ riscv,cboz-block-size = <64>;
+ i-cache-block-size = <64>;
+ i-cache-size = <65536>;
+ i-cache-sets = <256>;
+ d-cache-block-size = <64>;
+ d-cache-size = <65536>;
+ d-cache-sets = <256>;
+ next-level-cache = <&l2_cache0>;
+ mmu-type = "riscv,sv39";
+
+ cpu3_intc: interrupt-controller {
+ compatible = "riscv,cpu-intc";
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ };
+ };
+
+ cpu_4: cpu@4 {
+ compatible = "spacemit,x100", "riscv";
+ device_type = "cpu";
+ reg = <4>;
+ riscv,isa-base = "rv64i";
+ riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "b", "v", "h",
+ "sha", "shcounterenw", "shgatpa", "shtvala",
+ "shvsatpa", "shvstvala", "shvstvecd", "smaia",
+ "smstateen", "ssaia", "ssccptr", "sscofpmf",
+ "sscounterenw", "ssnpm", "ssstateen", "sstc",
+ "sstvala", "sstvecd", "ssu64xl", "svade",
+ "svinval", "svnapot", "svpbmt", "za64rs",
+ "zawrs", "zba", "zbb", "zbc", "zbs", "zca",
+ "zcb", "zcd", "zcmop", "zfa", "zfbfmin",
+ "zfh", "zfhmin", "zicbom", "zicbop", "zicboz",
+ "ziccamoa", "ziccif", "zicclsm", "zicntr",
+ "zicond", "zicsr", "zifencei", "zihintntl",
+ "zihintpause", "zihpm", "zimop", "zkt", "zvbb",
+ "zvbc", "zvfbfmin", "zvfbfwma", "zvfh",
+ "zvfhmin", "zvkb", "zvkg", "zvkn", "zvknc",
+ "zvkned", "zvkng", "zvknha", "zvknhb", "zvks",
+ "zvksc", "zvksed", "zvksg", "zvksh", "zvkt";
+ riscv,cbom-block-size = <64>;
+ riscv,cbop-block-size = <64>;
+ riscv,cboz-block-size = <64>;
+ i-cache-block-size = <64>;
+ i-cache-size = <65536>;
+ i-cache-sets = <256>;
+ d-cache-block-size = <64>;
+ d-cache-size = <65536>;
+ d-cache-sets = <256>;
+ next-level-cache = <&l2_cache1>;
+ mmu-type = "riscv,sv39";
+
+ cpu4_intc: interrupt-controller {
+ compatible = "riscv,cpu-intc";
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ };
+ };
+
+ cpu_5: cpu@5 {
+ compatible = "spacemit,x100", "riscv";
+ device_type = "cpu";
+ reg = <5>;
+ riscv,isa-base = "rv64i";
+ riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "b", "v", "h",
+ "sha", "shcounterenw", "shgatpa", "shtvala",
+ "shvsatpa", "shvstvala", "shvstvecd", "smaia",
+ "smstateen", "ssaia", "ssccptr", "sscofpmf",
+ "sscounterenw", "ssnpm", "ssstateen", "sstc",
+ "sstvala", "sstvecd", "ssu64xl", "svade",
+ "svinval", "svnapot", "svpbmt", "za64rs",
+ "zawrs", "zba", "zbb", "zbc", "zbs", "zca",
+ "zcb", "zcd", "zcmop", "zfa", "zfbfmin",
+ "zfh", "zfhmin", "zicbom", "zicbop", "zicboz",
+ "ziccamoa", "ziccif", "zicclsm", "zicntr",
+ "zicond", "zicsr", "zifencei", "zihintntl",
+ "zihintpause", "zihpm", "zimop", "zkt", "zvbb",
+ "zvbc", "zvfbfmin", "zvfbfwma", "zvfh",
+ "zvfhmin", "zvkb", "zvkg", "zvkn", "zvknc",
+ "zvkned", "zvkng", "zvknha", "zvknhb", "zvks",
+ "zvksc", "zvksed", "zvksg", "zvksh", "zvkt";
+ riscv,cbom-block-size = <64>;
+ riscv,cbop-block-size = <64>;
+ riscv,cboz-block-size = <64>;
+ i-cache-block-size = <64>;
+ i-cache-size = <65536>;
+ i-cache-sets = <256>;
+ d-cache-block-size = <64>;
+ d-cache-size = <65536>;
+ d-cache-sets = <256>;
+ next-level-cache = <&l2_cache1>;
+ mmu-type = "riscv,sv39";
+
+ cpu5_intc: interrupt-controller {
+ compatible = "riscv,cpu-intc";
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ };
+ };
+
+ cpu_6: cpu@6 {
+ compatible = "spacemit,x100", "riscv";
+ device_type = "cpu";
+ reg = <6>;
+ riscv,isa-base = "rv64i";
+ riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "b", "v", "h",
+ "sha", "shcounterenw", "shgatpa", "shtvala",
+ "shvsatpa", "shvstvala", "shvstvecd", "smaia",
+ "smstateen", "ssaia", "ssccptr", "sscofpmf",
+ "sscounterenw", "ssnpm", "ssstateen", "sstc",
+ "sstvala", "sstvecd", "ssu64xl", "svade",
+ "svinval", "svnapot", "svpbmt", "za64rs",
+ "zawrs", "zba", "zbb", "zbc", "zbs", "zca",
+ "zcb", "zcd", "zcmop", "zfa", "zfbfmin",
+ "zfh", "zfhmin", "zicbom", "zicbop", "zicboz",
+ "ziccamoa", "ziccif", "zicclsm", "zicntr",
+ "zicond", "zicsr", "zifencei", "zihintntl",
+ "zihintpause", "zihpm", "zimop", "zkt", "zvbb",
+ "zvbc", "zvfbfmin", "zvfbfwma", "zvfh",
+ "zvfhmin", "zvkb", "zvkg", "zvkn", "zvknc",
+ "zvkned", "zvkng", "zvknha", "zvknhb", "zvks",
+ "zvksc", "zvksed", "zvksg", "zvksh", "zvkt";
+ riscv,cbom-block-size = <64>;
+ riscv,cbop-block-size = <64>;
+ riscv,cboz-block-size = <64>;
+ i-cache-block-size = <64>;
+ i-cache-size = <65536>;
+ i-cache-sets = <256>;
+ d-cache-block-size = <64>;
+ d-cache-size = <65536>;
+ d-cache-sets = <256>;
+ next-level-cache = <&l2_cache1>;
+ mmu-type = "riscv,sv39";
+
+ cpu6_intc: interrupt-controller {
+ compatible = "riscv,cpu-intc";
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ };
+ };
+
+ cpu_7: cpu@7 {
+ compatible = "spacemit,x100", "riscv";
+ device_type = "cpu";
+ reg = <7>;
+ riscv,isa-base = "rv64i";
+ riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "b", "v", "h",
+ "sha", "shcounterenw", "shgatpa", "shtvala",
+ "shvsatpa", "shvstvala", "shvstvecd", "smaia",
+ "smstateen", "ssaia", "ssccptr", "sscofpmf",
+ "sscounterenw", "ssnpm", "ssstateen", "sstc",
+ "sstvala", "sstvecd", "ssu64xl", "svade",
+ "svinval", "svnapot", "svpbmt", "za64rs",
+ "zawrs", "zba", "zbb", "zbc", "zbs", "zca",
+ "zcb", "zcd", "zcmop", "zfa", "zfbfmin",
+ "zfh", "zfhmin", "zicbom", "zicbop", "zicboz",
+ "ziccamoa", "ziccif", "zicclsm", "zicntr",
+ "zicond", "zicsr", "zifencei", "zihintntl",
+ "zihintpause", "zihpm", "zimop", "zkt", "zvbb",
+ "zvbc", "zvfbfmin", "zvfbfwma", "zvfh",
+ "zvfhmin", "zvkb", "zvkg", "zvkn", "zvknc",
+ "zvkned", "zvkng", "zvknha", "zvknhb", "zvks",
+ "zvksc", "zvksed", "zvksg", "zvksh", "zvkt";
+ riscv,cbom-block-size = <64>;
+ riscv,cbop-block-size = <64>;
+ riscv,cboz-block-size = <64>;
+ i-cache-block-size = <64>;
+ i-cache-size = <65536>;
+ i-cache-sets = <256>;
+ d-cache-block-size = <64>;
+ d-cache-size = <65536>;
+ d-cache-sets = <256>;
+ next-level-cache = <&l2_cache1>;
+ mmu-type = "riscv,sv39";
+
+ cpu7_intc: interrupt-controller {
+ compatible = "riscv,cpu-intc";
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ };
+ };
+
+ l2_cache0: cache-controller-0 {
+ compatible = "cache";
+ cache-block-size = <64>;
+ cache-level = <2>;
+ cache-size = <4194304>;
+ cache-sets = <4096>;
+ cache-unified;
+ };
+
+ l2_cache1: cache-controller-1 {
+ compatible = "cache";
+ cache-block-size = <64>;
+ cache-level = <2>;
+ cache-size = <4194304>;
+ cache-sets = <4096>;
+ cache-unified;
+ };
+
+ cpu-map {
+ cluster0 {
+ core0 {
+ cpu = <&cpu_0>;
+ };
+ core1 {
+ cpu = <&cpu_1>;
+ };
+ core2 {
+ cpu = <&cpu_2>;
+ };
+ core3 {
+ cpu = <&cpu_3>;
+ };
+ };
+
+ cluster1 {
+ core0 {
+ cpu = <&cpu_4>;
+ };
+ core1 {
+ cpu = <&cpu_5>;
+ };
+ core2 {
+ cpu = <&cpu_6>;
+ };
+ core3 {
+ cpu = <&cpu_7>;
+ };
+ };
+ };
+ };
+
+ soc: soc {
+ compatible = "simple-bus";
+ interrupt-parent = <&saplic>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ dma-noncoherent;
+ ranges;
+
+ uart0: serial@d4017000 {
+ compatible = "spacemit,k3-uart", "intel,xscale-uart";
+ reg = <0x0 0xd4017000 0x0 0x100>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clock-frequency = <14700000>;
+ interrupts = <42 IRQ_TYPE_LEVEL_HIGH>;
+
+ status = "disabled";
+ };
+
+ uart2: serial@d4017100 {
+ compatible = "spacemit,k3-uart", "intel,xscale-uart";
+ reg = <0x0 0xd4017100 0x0 0x100>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clock-frequency = <14700000>;
+ interrupts = <44 IRQ_TYPE_LEVEL_HIGH>;
+
+ status = "disabled";
+ };
+
+ uart3: serial@d4017200 {
+ compatible = "spacemit,k3-uart", "intel,xscale-uart";
+ reg = <0x0 0xd4017200 0x0 0x100>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clock-frequency = <14700000>;
+ interrupts = <45 IRQ_TYPE_LEVEL_HIGH>;
+
+ status = "disabled";
+ };
+
+ uart4: serial@d4017300 {
+ compatible = "spacemit,k3-uart", "intel,xscale-uart";
+ reg = <0x0 0xd4017300 0x0 0x100>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clock-frequency = <14700000>;
+ interrupts = <46 IRQ_TYPE_LEVEL_HIGH>;
+
+ status = "disabled";
+ };
+
+ uart5: serial@d4017400 {
+ compatible = "spacemit,k3-uart", "intel,xscale-uart";
+ reg = <0x0 0xd4017400 0x0 0x100>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clock-frequency = <14700000>;
+ interrupts = <47 IRQ_TYPE_LEVEL_HIGH>;
+
+ status = "disabled";
+ };
+
+ uart6: serial@d4017500 {
+ compatible = "spacemit,k3-uart", "intel,xscale-uart";
+ reg = <0x0 0xd4017500 0x0 0x100>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clock-frequency = <14700000>;
+ interrupts = <48 IRQ_TYPE_LEVEL_HIGH>;
+
+ status = "disabled";
+ };
+
+ uart7: serial@d4017600 {
+ compatible = "spacemit,k3-uart", "intel,xscale-uart";
+ reg = <0x0 0xd4017600 0x0 0x100>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clock-frequency = <14700000>;
+ interrupts = <49 IRQ_TYPE_LEVEL_HIGH>;
+
+ status = "disabled";
+ };
+
+ uart8: serial@d4017700 {
+ compatible = "spacemit,k3-uart", "intel,xscale-uart";
+ reg = <0x0 0xd4017700 0x0 0x100>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clock-frequency = <14700000>;
+ interrupts = <50 IRQ_TYPE_LEVEL_HIGH>;
+
+ status = "disabled";
+ };
+
+ uart9: serial@d4017800 {
+ compatible = "spacemit,k3-uart", "intel,xscale-uart";
+ reg = <0x0 0xd4017800 0x0 0x100>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clock-frequency = <14700000>;
+ interrupts = <51 IRQ_TYPE_LEVEL_HIGH>;
+
+ status = "disabled";
+ };
+
+ uart10: serial@d401f000 {
+ compatible = "spacemit,k3-uart", "intel,xscale-uart";
+ reg = <0x0 0xd401f000 0x0 0x100>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clock-frequency = <14700000>;
+ interrupts = <281 IRQ_TYPE_LEVEL_HIGH>;
+
+ status = "disabled";
+ };
+
+ simsic: interrupt-controller@e0400000 {
+ compatible = "spacemit,k3-imsics", "riscv,imsics";
+ reg = <0x0 0xe0400000 0x0 0x200000>;
+ #interrupt-cells = <0>;
+ #msi-cells = <0>;
+ interrupt-controller;
+ interrupts-extended = <&cpu0_intc 9>, <&cpu1_intc 9>,
+ <&cpu2_intc 9>, <&cpu3_intc 9>,
+ <&cpu4_intc 9>, <&cpu5_intc 9>,
+ <&cpu6_intc 9>, <&cpu7_intc 9>;
+ msi-controller;
+ riscv,guest-index-bits = <6>;
+ riscv,hart-index-bits = <4>;
+ riscv,num-guest-ids = <511>;
+ riscv,num-ids = <511>;
+ };
+
+ saplic: interrupt-controller@e0804000 {
+ compatible = "spacemit,k3-aplic", "riscv,aplic";
+ reg = <0x0 0xe0804000 0x0 0x4000>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ msi-parent = <&simsic>;
+ riscv,num-sources = <512>;
+ };
+
+ clint: timer@e081c000 {
+ compatible = "spacemit,k3-clint", "sifive,clint0";
+ reg = <0x0 0xe081c000 0x0 0x4000>;
+ interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>,
+ <&cpu1_intc 3>, <&cpu1_intc 7>,
+ <&cpu2_intc 3>, <&cpu2_intc 7>,
+ <&cpu3_intc 3>, <&cpu3_intc 7>,
+ <&cpu4_intc 3>, <&cpu4_intc 7>,
+ <&cpu5_intc 3>, <&cpu5_intc 7>,
+ <&cpu6_intc 3>, <&cpu6_intc 7>,
+ <&cpu7_intc 3>, <&cpu7_intc 7>;
+ };
+
+ mimsic: interrupt-controller@f1000000 {
+ compatible = "spacemit,k3-imsics", "riscv,imsics";
+ reg = <0x0 0xf1000000 0x0 0x10000>;
+ #interrupt-cells = <0>;
+ #msi-cells = <0>;
+ interrupt-controller;
+ interrupts-extended = <&cpu0_intc 11>, <&cpu1_intc 11>,
+ <&cpu2_intc 11>, <&cpu3_intc 11>,
+ <&cpu4_intc 11>, <&cpu5_intc 11>,
+ <&cpu6_intc 11>, <&cpu7_intc 11>;
+ msi-controller;
+ riscv,guest-index-bits = <6>;
+ riscv,hart-index-bits = <4>;
+ riscv,num-guest-ids = <511>;
+ riscv,num-ids = <511>;
+
+ status = "disabled";
+ };
+
+ maplic: interrupt-controller@f1800000 {
+ compatible = "spacemit,k3-aplic", "riscv,aplic";
+ reg = <0x0 0xf1800000 0x0 0x4000>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ msi-parent = <&mimsic>;
+ riscv,children = <&saplic>;
+ riscv,delegate = <&saplic 1 512>;
+ riscv,num-sources = <512>;
+
+ status = "disabled";
+ };
+ };
+};
--
2.43.0
^ permalink raw reply related
* [PATCH v4 09/11] dt-bindings: riscv: Add Sha and its comprised extensions
From: Guodong Xu @ 2026-01-10 5:18 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Paul Walmsley,
Palmer Dabbelt, Albert Ou, Alexandre Ghiti, Yixun Lan,
Daniel Lezcano, Thomas Gleixner, Samuel Holland, Anup Patel,
Greg Kroah-Hartman, Jiri Slaby, Lubomir Rintel, Yangyu Chen
Cc: Paul Walmsley, Conor Dooley, Heinrich Schuchardt,
Kevin Meng Zhang, Anup Patel, Andrew Jones, devicetree,
linux-riscv, linux-kernel, spacemit, linux-serial, Guodong Xu
In-Reply-To: <20260110-k3-basic-dt-v4-0-d492f3a30ffa@riscstar.com>
Add descriptions for the Sha extension and the seven extensions it
comprises: Shcounterenw, Shgatpa, Shtvala, Shvsatpa, Shvstvala, Shvstvecd,
and Ssstateen.
Sha is ratified in the RVA23 Profiles Version 1.0 (commit 0273f3c921b6
"rva23/rvb23 ratified") as a new profile-defined extension that captures
the full set of features that are mandated to be supported along with
the H extension.
Extensions Shcounterenw, Shgatpa, Shtvala, Shvsatpa, Shvstvala, Shvstvecd,
and Ssstateen are ratified in the RISC-V Profiles Version 1.0 (commit
b1d806605f87 "Updated to ratified state").
The requirement status for Sha and its comprised extension in RISC-V
Profiles are:
- Sha: Mandatory in RVA23S64
- H: Optional in RVA22S64; Mandatory in RVA23S64
- Shcounterenw: Optional in RVA22S64; Mandatory in RVA23S64
- Shgatpa: Optional in RVA22S64; Mandatory in RVA23S64
- Shtvala: Optional in RVA22S64; Mandatory in RVA23S64
- Shvsatpa: Optional in RVA22S64; Mandatory in RVA23S64
- Shvstvala: Optional in RVA22S64; Mandatory in RVA23S64
- Shvstvecd: Optional in RVA22S64; Mandatory in RVA23S64
- Ssstateen: Optional in RVA22S64; Mandatory in RVA23S64
Signed-off-by: Guodong Xu <guodong@riscstar.com>
---
v4: No change.
v3: Drop dependency check for Sha. Both Sha and the extensions it
implies are allowed to co-exist in DT.
v2: New patch.
---
.../devicetree/bindings/riscv/extensions.yaml | 57 ++++++++++++++++++++++
1 file changed, 57 insertions(+)
diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml
index 900270e8d22e..41cb4aeb2667 100644
--- a/Documentation/devicetree/bindings/riscv/extensions.yaml
+++ b/Documentation/devicetree/bindings/riscv/extensions.yaml
@@ -129,6 +129,57 @@ properties:
Document Version 20211203.
# multi-letter extensions, sorted alphanumerically
+ - const: sha
+ description: |
+ The standard Sha extension for augmented hypervisor extension as
+ ratified in RVA23 Profiles Version 1.0, with commit 0273f3c921b6
+ ("rva23/rvb23 ratified").
+
+ Sha captures the full set of features that are mandated to be
+ supported along with the H extension. Sha comprises the following
+ extensions: H, Shcounterenw, Shgatpa, Shtvala, Shvsatpa, Shvstvala,
+ Shvstvecd, and Ssstateen.
+
+ - const: shcounterenw
+ description: |
+ The standard Shcounterenw extension for support writable enables
+ in hcounteren for any supported counter, as ratified in RISC-V
+ Profiles Version 1.0, with commit b1d806605f87 ("Updated to
+ ratified state.")
+
+ - const: shgatpa
+ description: |
+ The standard Shgatpa extension indicates that for each supported
+ virtual memory scheme SvNN supported in satp, the corresponding
+ hgatp SvNNx4 mode must be supported. The hgatp mode Bare must
+ also be supported. It is ratified in RISC-V Profiles Version 1.0,
+ with commit b1d806605f87 ("Updated to ratified state.")
+
+ - const: shtvala
+ description: |
+ The standard Shtvala extension for htval be written with the
+ faulting guest physical address in all circumstances permitted by
+ the ISA. It is ratified in RISC-V Profiles Version 1.0, with
+ commit b1d806605f87 ("Updated to ratified state.")
+
+ - const: shvsatpa
+ description: |
+ The standard Shvsatpa extension for vsatp supporting all translation
+ modes supported in satp, as ratified in RISC-V Profiles Version 1.0,
+ with commit b1d806605f87 ("Updated to ratified state.")
+
+ - const: shvstvala
+ description: |
+ The standard Shvstvala extension for vstval provides all needed
+ values as ratified in RISC-V Profiles Version 1.0, with commit
+ b1d806605f87 ("Updated to ratified state.")
+
+ - const: shvstvecd
+ description: |
+ The standard Shvstvecd extension for vstvec supporting Direct mode,
+ as ratified in RISC-V Profiles Version 1.0, with commit b1d806605f87
+ ("Updated to ratified state.")
+
- const: smaia
description: |
The standard Smaia supervisor-level extension for the advanced
@@ -187,6 +238,12 @@ properties:
ratified at commit d70011dde6c2 ("Update to ratified state")
of riscv-j-extension.
+ - const: ssstateen
+ description: |
+ The standard Ssstateen extension for supervisor-mode view of the
+ state-enable extension, as ratified in RISC-V Profiles Version 1.0,
+ with commit b1d806605f87 ("Updated to ratified state.")
+
- const: sstc
description: |
The standard Sstc supervisor-level extension for time compare as
--
2.43.0
^ permalink raw reply related
* [PATCH v4 08/11] dt-bindings: riscv: Add Ssccptr, Sscounterenw, Sstvala, Sstvecd, Ssu64xl
From: Guodong Xu @ 2026-01-10 5:18 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Paul Walmsley,
Palmer Dabbelt, Albert Ou, Alexandre Ghiti, Yixun Lan,
Daniel Lezcano, Thomas Gleixner, Samuel Holland, Anup Patel,
Greg Kroah-Hartman, Jiri Slaby, Lubomir Rintel, Yangyu Chen
Cc: Paul Walmsley, Conor Dooley, Heinrich Schuchardt,
Kevin Meng Zhang, Anup Patel, Andrew Jones, devicetree,
linux-riscv, linux-kernel, spacemit, linux-serial, Guodong Xu
In-Reply-To: <20260110-k3-basic-dt-v4-0-d492f3a30ffa@riscstar.com>
Add descriptions for five new extensions: Ssccptr, Sscounterenw, Sstvala,
Sstvecd, and Ssu64xl. These extensions are ratified in RISC-V Profiles
Version 1.0 (commit b1d806605f87 "Updated to ratified state.").
They are introduced as new extension names for existing features and
regulate implementation details for RISC-V Profile compliance. According
to RISC-V Profiles Version 1.0 and RVA23 Profiles Version 1.0, their
requirement status are:
- Ssccptr: Mandatory in RVA20S64, RVA22S64, RVA23S64
- Sscounterenw: Mandatory in RVA22S64, RVA23S64
- Sstvala: Mandatory in RVA20S64, RVA22S64, RVA23S64
- Sstvecd: Mandatory in RVA20S64, RVA22S64, RVA23S64
- Ssu64xl: Optional in RVA20S64, RVA22S64; Mandatory in RVA23S64
Signed-off-by: Guodong Xu <guodong@riscstar.com>
---
v4: No change.
v3: No change.
v2: New patch.
---
.../devicetree/bindings/riscv/extensions.yaml | 32 ++++++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml
index 345624326e9f..900270e8d22e 100644
--- a/Documentation/devicetree/bindings/riscv/extensions.yaml
+++ b/Documentation/devicetree/bindings/riscv/extensions.yaml
@@ -161,12 +161,26 @@ properties:
behavioural changes to interrupts as frozen at commit ccbddab
("Merge pull request #42 from riscv/jhauser-2023-RC4") of riscv-aia.
+ - const: ssccptr
+ description: |
+ The standard Ssccptr extension for main memory (cacheability and
+ coherence) hardware page-table reads, as ratified in RISC-V
+ Profiles Version 1.0, with commit b1d806605f87 ("Updated to
+ ratified state.")
+
- const: sscofpmf
description: |
The standard Sscofpmf supervisor-level extension for count overflow
and mode-based filtering as ratified at commit 01d1df0 ("Add ability
to manually trigger workflow. (#2)") of riscv-count-overflow.
+ - const: sscounterenw
+ description: |
+ The standard Sscounterenw extension for support writable enables
+ in scounteren for any supported counter, as ratified in RISC-V
+ Profiles Version 1.0, with commit b1d806605f87 ("Updated to
+ ratified state.")
+
- const: ssnpm
description: |
The standard Ssnpm extension for next-mode pointer masking as
@@ -179,6 +193,24 @@ properties:
ratified at commit 3f9ed34 ("Add ability to manually trigger
workflow. (#2)") of riscv-time-compare.
+ - const: sstvala
+ description: |
+ The standard Sstvala extension for stval provides all needed values
+ as ratified in RISC-V Profiles Version 1.0, with commit b1d806605f87
+ ("Updated to ratified state.")
+
+ - const: sstvecd
+ description: |
+ The standard Sstvecd extension for stvec supports Direct mode as
+ ratified in RISC-V Profiles Version 1.0, with commit b1d806605f87
+ ("Updated to ratified state.")
+
+ - const: ssu64xl
+ description: |
+ The standard Ssu64xl extension for UXLEN=64 must be supported, as
+ ratified in RISC-V Profiles Version 1.0, with commit b1d806605f87
+ ("Updated to ratified state.")
+
- const: svade
description: |
The standard Svade supervisor-level extension for SW-managed PTE A/D
--
2.43.0
^ permalink raw reply related
* [PATCH v4 07/11] dt-bindings: riscv: Add descriptions for Za64rs, Ziccamoa, Ziccif, and Zicclsm
From: Guodong Xu @ 2026-01-10 5:18 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Paul Walmsley,
Palmer Dabbelt, Albert Ou, Alexandre Ghiti, Yixun Lan,
Daniel Lezcano, Thomas Gleixner, Samuel Holland, Anup Patel,
Greg Kroah-Hartman, Jiri Slaby, Lubomir Rintel, Yangyu Chen
Cc: Paul Walmsley, Conor Dooley, Heinrich Schuchardt,
Kevin Meng Zhang, Anup Patel, Andrew Jones, devicetree,
linux-riscv, linux-kernel, spacemit, linux-serial, Guodong Xu
In-Reply-To: <20260110-k3-basic-dt-v4-0-d492f3a30ffa@riscstar.com>
Add descriptions for four extensions: Za64rs, Ziccamoa, Ziccif, and
Zicclsm. These extensions are ratified in RISC-V Profiles Version 1.0
(commit b1d806605f87 "Updated to ratified state.").
They are introduced as new extension names for existing features and
regulate implementation details for RISC-V Profile compliance. According
to RISC-V Profiles Version 1.0 and RVA23 Profiles Version 1.0, they are
mandatory for the following profiles:
- za64rs: Mandatory in RVA22U64, RVA23U64
- ziccamoa: Mandatory in RVA20U64, RVA22U64, RVA23U64
- ziccif: Mandatory in RVA20U64, RVA22U64, RVA23U64
- zicclsm: Mandatory in RVA20U64, RVA22U64, RVA23U64
Ziccrse specifies the main memory must support "RsrvEventual", which is
one (totally there are four) of the support level for Load-Reserved/
Store-Conditional (LR/SC) atomic instructions. Thus it depends on Zalrsc.
Ziccamoa specifies the main memory must support AMOArithmetic, among the
four levels of PMA support defined for AMOs in the A extension. Thus it
depends on Zaamo.
Za64rs defines reservation sets are contiguous, naturally aligned, and a
maximum of 64 bytes. Za64rs is consumed by two extensions: Zalrsc and
Zawrs. Zawrs itself depends on Zalrsc too.
Based on the relationship that "A" = Zaamo + Zalrsc, add the following
dependencies checks:
Za64rs -> Zalrsc or A
Ziccrse -> Zalrsc or A
Ziccamoa -> Zaamo or A
Signed-off-by: Guodong Xu <guodong@riscstar.com>
---
v4: No change.
v3: Update the commit message to explain the relationship of Za64rs,
Ziccrse, Ziccamoa, Zalrsc and A.
Add dependency checks.
v2: New patch.
---
.../devicetree/bindings/riscv/extensions.yaml | 49 ++++++++++++++++++++++
1 file changed, 49 insertions(+)
diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml
index f671299ac819..345624326e9f 100644
--- a/Documentation/devicetree/bindings/riscv/extensions.yaml
+++ b/Documentation/devicetree/bindings/riscv/extensions.yaml
@@ -240,6 +240,12 @@ properties:
as ratified at commit 4a69197e5617 ("Update to ratified state") of
riscv-svvptc.
+ - const: za64rs
+ description:
+ The standard Za64rs extension for reservation set size of at most
+ 64 bytes, as ratified in RISC-V Profiles Version 1.0, with commit
+ b1d806605f87 ("Updated to ratified state.")
+
- const: zaamo
description: |
The standard Zaamo extension for atomic memory operations as
@@ -381,6 +387,27 @@ properties:
in commit 64074bc ("Update version numbers for Zfh/Zfinx") of
riscv-isa-manual.
+ - const: ziccamoa
+ description:
+ The standard Ziccamoa extension for main memory (cacheability and
+ coherence) must support all atomics in A, as ratified in RISC-V
+ Profiles Version 1.0, with commit b1d806605f87 ("Updated to
+ ratified state.")
+
+ - const: ziccif
+ description:
+ The standard Ziccif extension for main memory (cacheability and
+ coherence) instruction fetch atomicity, as ratified in RISC-V
+ Profiles Version 1.0, with commit b1d806605f87 ("Updated to
+ ratified state.")
+
+ - const: zicclsm
+ description:
+ The standard Zicclsm extension for main memory (cacheability and
+ coherence) must support misaligned loads and stores, as ratified
+ in RISC-V Profiles Version 1.0, with commit b1d806605f87 ("Updated
+ to ratified state.")
+
- const: ziccrse
description:
The standard Ziccrse extension which provides forward progress
@@ -783,6 +810,18 @@ properties:
then:
contains:
const: b
+ # Za64rs and Ziccrse depend on Zalrsc or A
+ - if:
+ contains:
+ anyOf:
+ - const: za64rs
+ - const: ziccrse
+ then:
+ oneOf:
+ - contains:
+ const: zalrsc
+ - contains:
+ const: a
# Zcb depends on Zca
- if:
contains:
@@ -824,6 +863,16 @@ properties:
then:
contains:
const: f
+ # Ziccamoa depends on Zaamo or A
+ - if:
+ contains:
+ const: ziccamoa
+ then:
+ oneOf:
+ - contains:
+ const: zaamo
+ - contains:
+ const: a
# Zvfbfmin depends on V or Zve32f
- if:
contains:
--
2.43.0
^ permalink raw reply related
* [PATCH v4 06/11] dt-bindings: riscv: Add B ISA extension description
From: Guodong Xu @ 2026-01-10 5:18 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Paul Walmsley,
Palmer Dabbelt, Albert Ou, Alexandre Ghiti, Yixun Lan,
Daniel Lezcano, Thomas Gleixner, Samuel Holland, Anup Patel,
Greg Kroah-Hartman, Jiri Slaby, Lubomir Rintel, Yangyu Chen
Cc: Paul Walmsley, Conor Dooley, Heinrich Schuchardt,
Kevin Meng Zhang, Anup Patel, Andrew Jones, devicetree,
linux-riscv, linux-kernel, spacemit, linux-serial, Guodong Xu
In-Reply-To: <20260110-k3-basic-dt-v4-0-d492f3a30ffa@riscstar.com>
Add description of the single-letter B extension for Bit Manipulation.
B is mandatory for RVA23U64.
The B extension is ratified in the 20240411 version of the unprivileged
ISA specification. According to the ratified spec, the B standard
extension comprises instructions provided by the Zba, Zbb, and Zbs
extensions.
Add two-way dependency check to enforce that B implies Zba/Zbb/Zbs; and
when Zba/Zbb/Zbs (all of them) are specified, then B must be added too.
The reason why B/Zba/Zbb/Zbs must coexist at the same time is that
unlike other single-letter extensions, B was ratified (Apr/2024) much
later than its component extensions Zba/Zbb/Zbs (Jun/2021).
When "b" is specified, zba/zbb/zbs must be present to ensure
backward compatibility with existing software and kernels that only
look for the explicit component strings.
When all three components zba/zbb/zbs are specified, "b" should also be
present. Making "b" mandatory when all three components are present.
Existing devicetrees with zba/zbb/zbs but without "b" will generate
warnings that can be fixed in follow-up patches.
Signed-off-by: Guodong Xu <guodong@riscstar.com>
---
v4: No change.
v3: Update the commit message to explain the retionale why B and
Zba/Zbb/Zbs should all exist in DT.
v2: New patch.
---
.../devicetree/bindings/riscv/extensions.yaml | 31 ++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml
index b615083f2544..f671299ac819 100644
--- a/Documentation/devicetree/bindings/riscv/extensions.yaml
+++ b/Documentation/devicetree/bindings/riscv/extensions.yaml
@@ -109,6 +109,13 @@ properties:
The standard C extension for compressed instructions, as ratified in
the 20191213 version of the unprivileged ISA specification.
+ - const: b
+ description:
+ The standard B extension for bit manipulation instructions, as
+ ratified in the 20240411 version of the unprivileged ISA
+ specification. The B standard extension comprises instructions
+ provided by the Zba, Zbb, and Zbs extensions.
+
- const: v
description:
The standard V extension for vector operations, as ratified
@@ -752,6 +759,30 @@ properties:
then:
contains:
const: f
+ # B comprises Zba, Zbb, and Zbs
+ - if:
+ contains:
+ const: b
+ then:
+ allOf:
+ - contains:
+ const: zba
+ - contains:
+ const: zbb
+ - contains:
+ const: zbs
+ # Zba, Zbb, Zbs together require B
+ - if:
+ allOf:
+ - contains:
+ const: zba
+ - contains:
+ const: zbb
+ - contains:
+ const: zbs
+ then:
+ contains:
+ const: b
# Zcb depends on Zca
- if:
contains:
--
2.43.0
^ permalink raw reply related
* [PATCH v4 05/11] dt-bindings: riscv: spacemit: add K3 and Pico-ITX board bindings
From: Guodong Xu @ 2026-01-10 5:18 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Paul Walmsley,
Palmer Dabbelt, Albert Ou, Alexandre Ghiti, Yixun Lan,
Daniel Lezcano, Thomas Gleixner, Samuel Holland, Anup Patel,
Greg Kroah-Hartman, Jiri Slaby, Lubomir Rintel, Yangyu Chen
Cc: Paul Walmsley, Conor Dooley, Heinrich Schuchardt,
Kevin Meng Zhang, Anup Patel, Andrew Jones, devicetree,
linux-riscv, linux-kernel, spacemit, linux-serial, Guodong Xu
In-Reply-To: <20260110-k3-basic-dt-v4-0-d492f3a30ffa@riscstar.com>
Add DT binding documentation for the SpacemiT K3 SoC and the board Pico-ITX
which is a 2.5-inch single-board computer.
Signed-off-by: Guodong Xu <guodong@riscstar.com>
---
v4: Adjust maintainers list in alphabetic order.
Declare spacemit,k3-pico-itx as an enum, which can save future
code change when adding new boards.
v3: No change.
v2: Use one-blank-space between name and email address.
---
Documentation/devicetree/bindings/riscv/spacemit.yaml | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/riscv/spacemit.yaml b/Documentation/devicetree/bindings/riscv/spacemit.yaml
index 9c49482002f7..b958b94a924d 100644
--- a/Documentation/devicetree/bindings/riscv/spacemit.yaml
+++ b/Documentation/devicetree/bindings/riscv/spacemit.yaml
@@ -7,6 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: SpacemiT SoC-based boards
maintainers:
+ - Guodong Xu <guodong@riscstar.com>
- Yangyu Chen <cyy@cyyself.name>
- Yixun Lan <dlan@gentoo.org>
@@ -26,6 +27,10 @@ properties:
- xunlong,orangepi-r2s
- xunlong,orangepi-rv2
- const: spacemit,k1
+ - items:
+ - enum:
+ - spacemit,k3-pico-itx
+ - const: spacemit,k3
additionalProperties: true
--
2.43.0
^ permalink raw reply related
* [PATCH v4 04/11] dt-bindings: interrupt-controller: add SpacemiT K3 IMSIC
From: Guodong Xu @ 2026-01-10 5:18 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Paul Walmsley,
Palmer Dabbelt, Albert Ou, Alexandre Ghiti, Yixun Lan,
Daniel Lezcano, Thomas Gleixner, Samuel Holland, Anup Patel,
Greg Kroah-Hartman, Jiri Slaby, Lubomir Rintel, Yangyu Chen
Cc: Paul Walmsley, Conor Dooley, Heinrich Schuchardt,
Kevin Meng Zhang, Anup Patel, Andrew Jones, devicetree,
linux-riscv, linux-kernel, spacemit, linux-serial, Guodong Xu,
Krzysztof Kozlowski
In-Reply-To: <20260110-k3-basic-dt-v4-0-d492f3a30ffa@riscstar.com>
Add compatible string for SpacemiT K3 IMSIC.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Guodong Xu <guodong@riscstar.com>
---
v4: No change.
v3: Add Acked-by from Krzysztof.
v2: Fix the order to keep things alphabetically.
---
Documentation/devicetree/bindings/interrupt-controller/riscv,imsics.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/interrupt-controller/riscv,imsics.yaml b/Documentation/devicetree/bindings/interrupt-controller/riscv,imsics.yaml
index c23b5c09fdb9..feec122bddde 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/riscv,imsics.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/riscv,imsics.yaml
@@ -48,6 +48,7 @@ properties:
items:
- enum:
- qemu,imsics
+ - spacemit,k3-imsics
- const: riscv,imsics
reg:
--
2.43.0
^ permalink raw reply related
* [PATCH v4 03/11] dt-bindings: interrupt-controller: add SpacemiT K3 APLIC
From: Guodong Xu @ 2026-01-10 5:18 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Paul Walmsley,
Palmer Dabbelt, Albert Ou, Alexandre Ghiti, Yixun Lan,
Daniel Lezcano, Thomas Gleixner, Samuel Holland, Anup Patel,
Greg Kroah-Hartman, Jiri Slaby, Lubomir Rintel, Yangyu Chen
Cc: Paul Walmsley, Conor Dooley, Heinrich Schuchardt,
Kevin Meng Zhang, Anup Patel, Andrew Jones, devicetree,
linux-riscv, linux-kernel, spacemit, linux-serial, Guodong Xu,
Conor Dooley
In-Reply-To: <20260110-k3-basic-dt-v4-0-d492f3a30ffa@riscstar.com>
Add compatible string for SpacemiT K3 APLIC.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Guodong Xu <guodong@riscstar.com>
---
v4: No change.
v3: No change.
v2: Add Conor's Acked-by.
---
Documentation/devicetree/bindings/interrupt-controller/riscv,aplic.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/interrupt-controller/riscv,aplic.yaml b/Documentation/devicetree/bindings/interrupt-controller/riscv,aplic.yaml
index bef00521d5da..0718071444d2 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/riscv,aplic.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/riscv,aplic.yaml
@@ -28,6 +28,7 @@ properties:
items:
- enum:
- qemu,aplic
+ - spacemit,k3-aplic
- const: riscv,aplic
reg:
--
2.43.0
^ permalink raw reply related
* [PATCH v4 02/11] dt-bindings: timer: add SpacemiT K3 CLINT
From: Guodong Xu @ 2026-01-10 5:18 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Paul Walmsley,
Palmer Dabbelt, Albert Ou, Alexandre Ghiti, Yixun Lan,
Daniel Lezcano, Thomas Gleixner, Samuel Holland, Anup Patel,
Greg Kroah-Hartman, Jiri Slaby, Lubomir Rintel, Yangyu Chen
Cc: Paul Walmsley, Conor Dooley, Heinrich Schuchardt,
Kevin Meng Zhang, Anup Patel, Andrew Jones, devicetree,
linux-riscv, linux-kernel, spacemit, linux-serial, Guodong Xu,
Conor Dooley
In-Reply-To: <20260110-k3-basic-dt-v4-0-d492f3a30ffa@riscstar.com>
Add compatible string for SpacemiT K3 CLINT.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Guodong Xu <guodong@riscstar.com>
---
v4: No change.
v3: No change.
v2: Add Conor's Acked-by.
---
Documentation/devicetree/bindings/timer/sifive,clint.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/timer/sifive,clint.yaml b/Documentation/devicetree/bindings/timer/sifive,clint.yaml
index 0d3b8dc362ba..3bab40500df9 100644
--- a/Documentation/devicetree/bindings/timer/sifive,clint.yaml
+++ b/Documentation/devicetree/bindings/timer/sifive,clint.yaml
@@ -33,6 +33,7 @@ properties:
- eswin,eic7700-clint # ESWIN EIC7700
- sifive,fu540-c000-clint # SiFive FU540
- spacemit,k1-clint # SpacemiT K1
+ - spacemit,k3-clint # SpacemiT K3
- starfive,jh7100-clint # StarFive JH7100
- starfive,jh7110-clint # StarFive JH7110
- starfive,jh8100-clint # StarFive JH8100
--
2.43.0
^ permalink raw reply related
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