Re: [PATCH 1/2] dt-bindings: serial: 8250: add Microchip Core16550

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] dt-bindings: serial: 8250: missing RTL version in microchip,core16550
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commit de9364d94e19f22c5fdbfabf92e9c1ea40cb4c1e
Author: Kohei Otsuka <kohei@spacemachines.com>

dt-bindings: serial: 8250: add Microchip Core16550

This commit adds the microchip,core16550 compatible string with ns16550a as a
fallback to the 8250 serial Devicetree binding for the Microchip Core16550
FPGA soft IP core.

Link: https://github.com/linux4microchip/meta-mchp/issues/5

> diff --git a/Documentation/devicetree/bindings/serial/8250.yaml b/Documentation/devicetree/bindings/serial/8250.yaml
> index 50d5c977afa3d..33a5929bdaa69 100644
> --- a/Documentation/devicetree/bindings/serial/8250.yaml
> +++ b/Documentation/devicetree/bindings/serial/8250.yaml
> @@ -137,6 +137,7 @@ properties:
>                - ti,da830-uart
>                - loongson,ls2k0500-uart
>                - loongson,ls2k1500-uart
> +              - microchip,core16550

[Severity: Medium]
Should this compatible string include the RTL version suffix (for example,
microchip,core16550-rtl-vN matching the Libero Core16550 major RTL release)
rather than using an unversioned microchip,core16550 name?

Unlike hard SoC peripherals whose IP revision is fixed by an SoC-specific
compatible string, Core16550 is a synthesizable soft IP core from Microchip's
Libero catalog that can be instantiated in FPGA fabric across different chip
families and IP revisions.

Existing Microchip FPGA soft IP core bindings follow the
microchip,<ip>-rtl-v<N> naming convention:

  Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml:
    - microchip,coreqspi-rtl-v2 # FPGA QSPI
    - microchip,corespi-rtl-v5 # FPGA CoreSPI

  Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml:
    - microchip,coregpio-rtl-v3

  Documentation/devicetree/bindings/i2c/microchip,corei2c.yaml:
    - const: microchip,corei2c-rtl-v7 # Microchip Fabric based i2c IP core

  Documentation/devicetree/bindings/pwm/microchip,corepwm.yaml:
    - const: microchip,corepwm-rtl-v4

Other soft 16550 IP cores in Documentation/devicetree/bindings/serial/8250.yaml
also include their RTL or IP version (opencores,uart16550-rtlsvn105 and
xlnx,xps-uart16550-2.00.b). Including the RTL version suffix would keep the
binding consistent with other Microchip soft IP cores and allow software to
distinguish between revisions if behavior (such as TEMT interrupt generation
or FIFO handling) changes across RTL releases.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261103-core16550-rs485-v1-0-6d15ebe1e5b9@spacemachines.com?part=1