Re: [PATCH v2 5/8] ARM: shmobile: add sh73a0-specific timer initialisation to kzm9g-reference

[Simon Horman <horms@verge.net.au>]

On Wed, Feb 13, 2013 at 02:04:43PM +0900, Magnus Damm wrote:
> Hi Simon,
> 
> On Wed, Feb 13, 2013 at 1:41 PM, Simon Horman <horms@verge.net.au> wrote:
> > On Wed, Feb 13, 2013 at 01:15:59PM +0900, Magnus Damm wrote:
> >> Hi Simon,
> >>
> >> On Wed, Feb 13, 2013 at 12:46 PM, Simon Horman <horms@verge.net.au> wrote:
> >> > On Fri, Feb 08, 2013 at 07:38:29PM +0100, Guennadi Liakhovetski wrote:
> >> >> This patch fixes failing boot of the kzm9g-reference kernel.
> >> >
> >> > Magnus specifically asked for the DT reference code not to use
> >> > early timers.
> >> >
> >> > As you have no doubt observed the current code doesn't work with SMP.
> >> > I have not been able to find a solution that does work with CONFIG_SMP
> >> > enabled without using early timers. I would welcome some ideas
> >> > on how to resolve this problem without using early timers.
> >>
> >> I have now tracked down and submitted a fix for the KZM9D regression
> >> you pointed me to earlier.
> >>
> >> Next step is to figure out what is wrong with KZM9G in DT-only mode.
> >> Can you guide me to reproduce off-list?
> >
> > I'd prefer to guide you on list so the knowledge is archived.
> 
> Ok, thanks, that's fine too of course.
> 
> > 1. Obtain the reference code.
> >
> >    I suggest the boards-kzm9g-reference branch of the renesas tree.
> >
> > 2. Configure
> >
> >    ARCH=arm make kzm9g_defconfig
> >
> >    Also, enable CONFIG_MACH_KZM9G_REFERENCE and CONFIG_ARM_APPENDED_DTB
> >
> >    N.B: CONFIG_ARM_APPENDED_DTB will be enabled by default in 3.8
> >
> > 3. Compile
> >
> > 4. Append arch/arm/boot/dts/sh73a0-kzm9g-reference.dtb to zImage and
> >    refresh uImage
> >
> > 4. Boot, you should see the boot halt at:
> >
> >    ...
> >    NR_IRQS:16 nr_irqs:16 16
> >    sched_clock: 32 bits at 128 Hz, resolution 7812500ns, wraps every 3489660920ms
> >    Console: colour dummy device 80x30
> >    console [tty0] enabled
> >    Calibrating delay loop (skipped) preset value.. 2287.41 BogoMIPS (lpj‰36512)
> >    pid_max: default: 32768 minimum: 301
> >    Mount-cache hash table entries: 512
> >    CPU: Testing write buffer coherency: ok
> >    CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
> >    Setting up static identity map for 0x4132aaf8 - 0x4132ab50
> 
> I assume someone has already tested the obvious things like booting
> with maxcpus=1 and checking if disabling TWD helps.

Yes.