* Re: [PATCH] ARM: mach-shmobile: r8a7779 power domain support V2
From: Paul Mundt @ 2012-01-10 8:12 UTC (permalink / raw)
To: linux-sh
In-Reply-To: <20111222081204.12120.92511.sendpatchset@w520>
On Tue, Jan 10, 2012 at 03:50:01PM +0900, Magnus Damm wrote:
> Add power domain control support for the r8a7779 SoC V2.
>
> This adds support for 4 power domains for I/O Devices
> together with code that can be used for CPU cores as well.
>
> The only out of the ordinary experience is the need for
> ioremap() of SYSC registers. Because of that we need to
> execute some init function before setting up the domains.
Applied, thanks.
> Built on top of linux-sh git rmobile/marzen branch.
>
I've now merged rmobile/marzen in to rmobile-latest, so hopefully that
will be it for the merge window.
^ permalink raw reply
* Re: [PATCH] arm: mach-shmobile: add a resource name for shdma
From: Shimoda, Yoshihiro @ 2012-01-10 8:22 UTC (permalink / raw)
To: linux-sh
In-Reply-To: <4F0BCADB.8010709@renesas.com>
2012/01/10 16:43, Paul Mundt wrote:
> On Tue, Jan 10, 2012 at 02:21:31PM +0900, Shimoda, Yoshihiro wrote:
>> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
>> ---
>> This patch depends on the following patch:
>> - dmaengine: shdma: modify the DMAC Address Error registration
>>
> What exactly does it depend on? If it's just wiring up the string, we can
> merge that at any time, and the earlier the better. Setting the string
> doesn't introduce any different behaviour in the driver as it is now
> without the change in registration.
>
I'm sorry for my wrong comment. Your point is correct.
This patch doesn't depend on the shdma's patch.
Should I submit the patch which removed the comment again?
Best regards,
Yoshihiro Shimoda
--
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
EC No.
^ permalink raw reply
* Re: [PATCH] arm: mach-shmobile: add a resource name for shdma
From: Paul Mundt @ 2012-01-10 8:25 UTC (permalink / raw)
To: linux-sh
In-Reply-To: <4F0BCADB.8010709@renesas.com>
On Tue, Jan 10, 2012 at 05:22:49PM +0900, Shimoda, Yoshihiro wrote:
> 2012/01/10 16:43, Paul Mundt wrote:
> > On Tue, Jan 10, 2012 at 02:21:31PM +0900, Shimoda, Yoshihiro wrote:
> >> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> >> ---
> >> This patch depends on the following patch:
> >> - dmaengine: shdma: modify the DMAC Address Error registration
> >>
> > What exactly does it depend on? If it's just wiring up the string, we can
> > merge that at any time, and the earlier the better. Setting the string
> > doesn't introduce any different behaviour in the driver as it is now
> > without the change in registration.
> >
>
> I'm sorry for my wrong comment. Your point is correct.
> This patch doesn't depend on the shdma's patch.
>
> Should I submit the patch which removed the comment again?
>
No, it's fine, just wanted to make sure there wasn't something sinister
going on that I wasn't aware of with regards to the driver model. I'll
apply them to sh/rmobile-latest respectively.
^ permalink raw reply
* RE: [PATCH 00/14] DMA-mapping framework redesign preparation
From: Marek Szyprowski @ 2012-01-10 8:42 UTC (permalink / raw)
To: Marek Szyprowski, linux-kernel
Cc: 'Benjamin Herrenschmidt', 'Thomas Gleixner',
'Andrew Morton', 'Arnd Bergmann',
'Stephen Rothwell', microblaze-uclinux, linux-arch, x86,
linux-sh, linux-alpha, sparclinux, linux-ia64, linuxppc-dev,
linux-mips, discuss, linux-arm-kernel, linux-mm, linaro-mm-sig,
'Jonathan Corbet', 'Kyungmin Park',
Andrzej Pietrasiewicz
In-Reply-To: <1324643253-3024-1-git-send-email-m.szyprowski@samsung.com>
Hello,
To help everyone in testing and adapting our patches for his hardware
platform I've rebased our patches onto the latest v3.2 Linux kernel and
prepared a few GIT branches in our public repository. These branches
contain our memory management related patches posted in the following
threads:
"[PATCHv18 0/11] Contiguous Memory Allocator":
http://www.spinics.net/lists/linux-mm/msg28125.html
later called CMAv18,
"[PATCH 00/14] DMA-mapping framework redesign preparation":
http://www.spinics.net/lists/linux-sh/msg09777.html
and
"[PATCH 0/8 v4] ARM: DMA-mapping framework redesign":
http://www.spinics.net/lists/arm-kernel/msg151147.html
with the following update:
http://www.spinics.net/lists/arm-kernel/msg154889.html
later called DMAv5.
These branches are available in our public GIT repository:
git://git.infradead.org/users/kmpark/linux-samsung
http://git.infradead.org/users/kmpark/linux-samsung/
The following branches are available:
1) 3.2-cma-v18
Vanilla Linux v3.2 with fixed CMA v18 patches (first patch replaced
with the one from v17 to fix SMP issues, see the respective thread).
2) 3.2-dma-v5
Vanilla Linux v3.2 + iommu/next (IOMMU maintainer's patches) branch
with DMA-preparation and DMA-mapping framework redesign patches.
3) 3.2-cma-v18-dma-v5
Previous two branches merged together (DMA-mapping on top of CMA)
4) 3.2-cma-v18-dma-v5-exynos
Previous branch rebased on top of iommu/next + kgene/for-next (Samsung
SoC platform maintainer's patches) with new Exynos4 IOMMU driver by
KyongHo Cho and relevant glue code.
5) 3.2-dma-v5-exynos
Branch from point 2 rebased on top of iommu/next + kgene/for-next
(Samsung SoC maintainer's patches) with new Exynos4 IOMMU driver by
KyongHo Cho and relevant glue code.
I hope everyone will find a branch that suits his needs. :)
Best regards
--
Marek Szyprowski
Samsung Poland R&D Center
^ permalink raw reply
* [PATCH] ARM: mach-shmobile: r8a7779 SMP support V3
From: Magnus Damm @ 2012-01-10 8:44 UTC (permalink / raw)
To: linux-sh
In-Reply-To: <20111222081730.12133.61045.sendpatchset@w520>
From: Magnus Damm <damm@opensource.se>
This patch contains r8a7779 SMP support V3 - now including
CPU hotplug offine and online support. The r8a7779 power
domain code is tied together with SMP glue code which allows
us to control the power domains via CPU hotplug.
At this point the kernel boots with the 4 Cortex-A9 cores in
SMP mode and all CPU cores except CPU0 can be hotplugged.
The code in platsmp.c is quite far from pretty, but it is
kept like that intentionally to avoid creating layers of
code that will go away in the near future anyway. The code
needs to be updated when some per-SoC handling code will be
added to the ARM architecture, see the following patch for
more information:
"[RFC PATCH 0/3] Per SoC descriptor"
Signed-off-by: Magnus Damm <damm@opensource.se>
---
Built on top of linux-sh git rmobile/marzen branch with the
latest r8a7779 power domain code applied:
"ARM: mach-shmobile: r8a7779 power domain support V2"
Changes since V2:
- updated commit message
arch/arm/mach-shmobile/Makefile | 1
arch/arm/mach-shmobile/include/mach/common.h | 6
arch/arm/mach-shmobile/include/mach/r8a7779.h | 3
arch/arm/mach-shmobile/platsmp.c | 16 ++
arch/arm/mach-shmobile/pm-r8a7779.c | 30 +++-
arch/arm/mach-shmobile/smp-r8a7779.c | 153 +++++++++++++++++++++++++
6 files changed, 201 insertions(+), 8 deletions(-)
--- 0022/arch/arm/mach-shmobile/Makefile
+++ work/arch/arm/mach-shmobile/Makefile 2011-12-28 14:52:24.000000000 +0900
@@ -17,6 +17,7 @@ smp-y := platsmp.o headsmp.o
smp-$(CONFIG_HOTPLUG_CPU) += hotplug.o
smp-$(CONFIG_LOCAL_TIMERS) += localtimer.o
smp-$(CONFIG_ARCH_SH73A0) += smp-sh73a0.o
+smp-$(CONFIG_ARCH_R8A7779) += smp-r8a7779.o
# Pinmux setup
pfc-y :--- 0024/arch/arm/mach-shmobile/include/mach/common.h
+++ work/arch/arm/mach-shmobile/include/mach/common.h 2011-12-28 14:54:31.000000000 +0900
@@ -61,4 +61,10 @@ extern void r8a7779_clock_init(void);
extern void r8a7779_pinmux_init(void);
extern void r8a7779_pm_init(void);
+extern unsigned int r8a7779_get_core_count(void);
+extern int r8a7779_platform_cpu_kill(unsigned int cpu);
+extern void r8a7779_secondary_init(unsigned int cpu);
+extern int r8a7779_boot_secondary(unsigned int cpu);
+extern void r8a7779_smp_prepare_cpus(void);
+
#endif /* __ARCH_MACH_COMMON_H */
--- 0022/arch/arm/mach-shmobile/include/mach/r8a7779.h
+++ work/arch/arm/mach-shmobile/include/mach/r8a7779.h 2011-12-28 14:52:24.000000000 +0900
@@ -343,6 +343,9 @@ static inline struct r8a7779_pm_ch *to_r
return &container_of(d, struct r8a7779_pm_domain, genpd)->ch;
}
+extern int r8a7779_sysc_power_down(struct r8a7779_pm_ch *r8a7779_ch);
+extern int r8a7779_sysc_power_up(struct r8a7779_pm_ch *r8a7779_ch);
+
#ifdef CONFIG_PM
extern struct r8a7779_pm_domain r8a7779_sh4a;
extern struct r8a7779_pm_domain r8a7779_sgx;
--- 0024/arch/arm/mach-shmobile/platsmp.c
+++ work/arch/arm/mach-shmobile/platsmp.c 2011-12-28 14:53:23.000000000 +0900
@@ -22,12 +22,16 @@
#include <mach/common.h>
#define is_sh73a0() (machine_is_ag5evm() || machine_is_kota2())
+#define is_r8a7779() machine_is_marzen()
static unsigned int __init shmobile_smp_get_core_count(void)
{
if (is_sh73a0())
return sh73a0_get_core_count();
+ if (is_r8a7779())
+ return r8a7779_get_core_count();
+
return 1;
}
@@ -35,10 +39,16 @@ static void __init shmobile_smp_prepare_
{
if (is_sh73a0())
sh73a0_smp_prepare_cpus();
+
+ if (is_r8a7779())
+ r8a7779_smp_prepare_cpus();
}
int shmobile_platform_cpu_kill(unsigned int cpu)
{
+ if (is_r8a7779())
+ return r8a7779_platform_cpu_kill(cpu);
+
return 1;
}
@@ -48,6 +58,9 @@ void __cpuinit platform_secondary_init(u
if (is_sh73a0())
sh73a0_secondary_init(cpu);
+
+ if (is_r8a7779())
+ r8a7779_secondary_init(cpu);
}
int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
@@ -55,6 +68,9 @@ int __cpuinit boot_secondary(unsigned in
if (is_sh73a0())
return sh73a0_boot_secondary(cpu);
+ if (is_r8a7779())
+ return r8a7779_boot_secondary(cpu);
+
return -ENOSYS;
}
--- 0022/arch/arm/mach-shmobile/pm-r8a7779.c
+++ work/arch/arm/mach-shmobile/pm-r8a7779.c 2011-12-28 15:06:42.000000000 +0900
@@ -48,7 +48,9 @@ static void __iomem *r8a7779_sysc_base;
#define SYSCISR_RETRIES 1000
#define SYSCISR_DELAY_US 1
-#ifdef CONFIG_PM
+#if defined(CONFIG_PM) || defined(CONFIG_SMP)
+
+static DEFINE_SPINLOCK(r8a7779_sysc_lock); /* SMP CPUs + I/O devices */
static int r8a7779_sysc_pwr_on_off(struct r8a7779_pm_ch *r8a7779_ch,
int sr_bit, int reg_offs)
@@ -86,9 +88,12 @@ static int r8a7779_sysc_update(struct r8
unsigned int isr_mask = 1 << r8a7779_ch->isr_bit;
unsigned int chan_mask = 1 << r8a7779_ch->chan_bit;
unsigned int status;
+ unsigned long flags;
int ret = 0;
int k;
+ spin_lock_irqsave(&r8a7779_sysc_lock, flags);
+
iowrite32(isr_mask, r8a7779_sysc_base + SYSCISCR);
do {
@@ -112,6 +117,8 @@ static int r8a7779_sysc_update(struct r8
iowrite32(isr_mask, r8a7779_sysc_base + SYSCISCR);
out:
+ spin_unlock_irqrestore(&r8a7779_sysc_lock, flags);
+
pr_debug("r8a7779 power domain %d: %02x %02x %02x %02x %02x -> %d\n",
r8a7779_ch->isr_bit, ioread32(r8a7779_sysc_base + PWRSR0),
ioread32(r8a7779_sysc_base + PWRSR1),
@@ -121,12 +128,12 @@ static int r8a7779_sysc_update(struct r8
return ret;
}
-static int r8a7779_sysc_power_down(struct r8a7779_pm_ch *r8a7779_ch)
+int r8a7779_sysc_power_down(struct r8a7779_pm_ch *r8a7779_ch)
{
return r8a7779_sysc_update(r8a7779_ch, r8a7779_sysc_pwr_off);
}
-static int r8a7779_sysc_power_up(struct r8a7779_pm_ch *r8a7779_ch)
+int r8a7779_sysc_power_up(struct r8a7779_pm_ch *r8a7779_ch)
{
return r8a7779_sysc_update(r8a7779_ch, r8a7779_sysc_pwr_on);
}
@@ -142,6 +149,14 @@ static void __init r8a7779_sysc_init(voi
iowrite32(0, r8a7779_sysc_base + SYSCIMR);
}
+#else /* CONFIG_PM || CONFIG_SMP */
+
+static inline void r8a7779_sysc_init(void) {}
+
+#endif /* CONFIG_PM || CONFIG_SMP */
+
+#ifdef CONFIG_PM
+
static int pd_power_down(struct generic_pm_domain *genpd)
{
return r8a7779_sysc_power_down(to_r8a7779_ch(genpd));
@@ -223,13 +238,12 @@ struct r8a7779_pm_domain r8a7779_impx3 }
};
-#else /* CONFIG_PM */
-
-static inline void r8a7779_sysc_init(void) {}
-
#endif /* CONFIG_PM */
void __init r8a7779_pm_init(void)
{
- r8a7779_sysc_init();
+ static int once;
+
+ if (!once++)
+ r8a7779_sysc_init();
}
--- /dev/null
+++ work/arch/arm/mach-shmobile/smp-r8a7779.c 2011-12-28 15:01:40.000000000 +0900
@@ -0,0 +1,153 @@
+/*
+ * SMP support for R-Mobile / SH-Mobile - r8a7779 portion
+ *
+ * Copyright (C) 2011 Renesas Solutions Corp.
+ * Copyright (C) 2011 Magnus Damm
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/smp.h>
+#include <linux/spinlock.h>
+#include <linux/io.h>
+#include <linux/delay.h>
+#include <mach/common.h>
+#include <mach/r8a7779.h>
+#include <asm/smp_scu.h>
+#include <asm/smp_twd.h>
+#include <asm/hardware/gic.h>
+
+#define AVECR 0xfe700040
+
+static struct r8a7779_pm_ch r8a7779_ch_cpu1 = {
+ .chan_offs = 0x40, /* PWRSR0 .. PWRER0 */
+ .chan_bit = 1, /* ARM1 */
+ .isr_bit = 1, /* ARM1 */
+};
+
+static struct r8a7779_pm_ch r8a7779_ch_cpu2 = {
+ .chan_offs = 0x40, /* PWRSR0 .. PWRER0 */
+ .chan_bit = 2, /* ARM2 */
+ .isr_bit = 2, /* ARM2 */
+};
+
+static struct r8a7779_pm_ch r8a7779_ch_cpu3 = {
+ .chan_offs = 0x40, /* PWRSR0 .. PWRER0 */
+ .chan_bit = 3, /* ARM3 */
+ .isr_bit = 3, /* ARM3 */
+};
+
+static struct r8a7779_pm_ch *r8a7779_ch_cpu[4] = {
+ [1] = &r8a7779_ch_cpu1,
+ [2] = &r8a7779_ch_cpu2,
+ [3] = &r8a7779_ch_cpu3,
+};
+
+static void __iomem *scu_base_addr(void)
+{
+ return (void __iomem *)0xf0000000;
+}
+
+static DEFINE_SPINLOCK(scu_lock);
+static unsigned long tmp;
+
+static void modify_scu_cpu_psr(unsigned long set, unsigned long clr)
+{
+ void __iomem *scu_base = scu_base_addr();
+
+ spin_lock(&scu_lock);
+ tmp = __raw_readl(scu_base + 8);
+ tmp &= ~clr;
+ tmp |= set;
+ spin_unlock(&scu_lock);
+
+ /* disable cache coherency after releasing the lock */
+ __raw_writel(tmp, scu_base + 8);
+}
+
+unsigned int __init r8a7779_get_core_count(void)
+{
+ void __iomem *scu_base = scu_base_addr();
+
+#ifdef CONFIG_HAVE_ARM_TWD
+ /* twd_base needs to be initialized before percpu_timer_setup() */
+ twd_base = (void __iomem *)0xf0000600;
+#endif
+
+ return scu_get_core_count(scu_base);
+}
+
+int r8a7779_platform_cpu_kill(unsigned int cpu)
+{
+ struct r8a7779_pm_ch *ch = NULL;
+ int ret = -EIO;
+
+ cpu = cpu_logical_map(cpu);
+
+ /* disable cache coherency */
+ modify_scu_cpu_psr(3 << (cpu * 8), 0);
+
+ if (cpu < ARRAY_SIZE(r8a7779_ch_cpu))
+ ch = r8a7779_ch_cpu[cpu];
+
+ if (ch)
+ ret = r8a7779_sysc_power_down(ch);
+
+ return ret ? ret : 1;
+}
+
+void __cpuinit r8a7779_secondary_init(unsigned int cpu)
+{
+ gic_secondary_init(0);
+}
+
+int __cpuinit r8a7779_boot_secondary(unsigned int cpu)
+{
+ struct r8a7779_pm_ch *ch = NULL;
+ int ret = -EIO;
+
+ cpu = cpu_logical_map(cpu);
+
+ /* enable cache coherency */
+ modify_scu_cpu_psr(0, 3 << (cpu * 8));
+
+ if (cpu < ARRAY_SIZE(r8a7779_ch_cpu))
+ ch = r8a7779_ch_cpu[cpu];
+
+ if (ch)
+ ret = r8a7779_sysc_power_up(ch);
+
+ return ret;
+}
+
+void __init r8a7779_smp_prepare_cpus(void)
+{
+ int cpu = cpu_logical_map(0);
+
+ scu_enable(scu_base_addr());
+
+ /* Map the reset vector (in headsmp.S) */
+ __raw_writel(__pa(shmobile_secondary_vector), __io(AVECR));
+
+ /* enable cache coherency on CPU0 */
+ modify_scu_cpu_psr(0, 3 << (cpu * 8));
+
+ r8a7779_pm_init();
+
+ /* power off secondary CPUs */
+ r8a7779_platform_cpu_kill(1);
+ r8a7779_platform_cpu_kill(2);
+ r8a7779_platform_cpu_kill(3);
+}
^ permalink raw reply
* Re: [PATCH] arm: mach-shmobile: add a resource name for shdma
From: Shimoda, Yoshihiro @ 2012-01-10 8:53 UTC (permalink / raw)
To: linux-sh
In-Reply-To: <4F0BCADB.8010709@renesas.com>
2012/01/10 17:25, Paul Mundt wrote:
> On Tue, Jan 10, 2012 at 05:22:49PM +0900, Shimoda, Yoshihiro wrote:
>> 2012/01/10 16:43, Paul Mundt wrote:
>>> On Tue, Jan 10, 2012 at 02:21:31PM +0900, Shimoda, Yoshihiro wrote:
>>>> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
>>>> ---
>>>> This patch depends on the following patch:
>>>> - dmaengine: shdma: modify the DMAC Address Error registration
>>>>
>>> What exactly does it depend on? If it's just wiring up the string, we can
>>> merge that at any time, and the earlier the better. Setting the string
>>> doesn't introduce any different behaviour in the driver as it is now
>>> without the change in registration.
>>>
>>
>> I'm sorry for my wrong comment. Your point is correct.
>> This patch doesn't depend on the shdma's patch.
>>
>> Should I submit the patch which removed the comment again?
>>
> No, it's fine, just wanted to make sure there wasn't something sinister
> going on that I wasn't aware of with regards to the driver model. I'll
> apply them to sh/rmobile-latest respectively.
>
Thank you very much. I understood it.
Best regards,
Yoshihiro Shimoda
^ permalink raw reply
* Re: [PATCH v3 1/3] dmaengine: shdma: modify the DMAC Address Error
From: Guennadi Liakhovetski @ 2012-01-10 9:48 UTC (permalink / raw)
To: linux-sh
In-Reply-To: <4F0BDCD5.9020603@renesas.com>
Hello Shimoda-san
Thanks for your work on this! Nice to see patches improving!
On Tue, 10 Jan 2012, Shimoda, Yoshihiro wrote:
> The USB-DMAC/SUDMAC don't have the interrupt of DMAC Address Error.
> So, only when the resource has a name and it is "error_irq", the driver
> calls request_irq() for DMAC Address Error.
>
> This patch is also useful for the generic DMAC which doesn't have
> DMAC Address Error. So, we can get rid of the "CPU_SH4 || ARCH_SHMOBILE"
> ifdefs.
> This patch also changes the IRQF_DISABLED to 0.
>
> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> ---
> about v3:
> - changes the IRQF_DISABLED to 0.
>
> drivers/dma/shdma.c | 78 ++++++++++++++++++++++++++-------------------------
> 1 files changed, 40 insertions(+), 38 deletions(-)
>
> diff --git a/drivers/dma/shdma.c b/drivers/dma/shdma.c
> index 81809c2..55149ed 100644
> --- a/drivers/dma/shdma.c
> +++ b/drivers/dma/shdma.c
> @@ -1149,12 +1149,12 @@ static void sh_dmae_chan_remove(struct sh_dmae_device *shdev)
> static int __init sh_dmae_probe(struct platform_device *pdev)
> {
> struct sh_dmae_pdata *pdata = pdev->dev.platform_data;
> - unsigned long irqflags = IRQF_DISABLED,
> + unsigned long irqflags = 0,
> chan_flag[SH_DMAC_MAX_CHANNELS] = {};
> - int errirq, chan_irq[SH_DMAC_MAX_CHANNELS];
> + int errirq = 0, chan_irq[SH_DMAC_MAX_CHANNELS];
> int err, i, irq_cnt = 0, irqres = 0, irq_cap = 0;
> struct sh_dmae_device *shdev;
> - struct resource *chan, *dmars, *errirq_res, *chanirq_res;
> + struct resource *chan, *dmars, *errirq_res, *irq_res, *chanirq_res;
>
> /* get platform data */
> if (!pdata || !pdata->channel_num)
> @@ -1179,8 +1179,8 @@ static int __init sh_dmae_probe(struct platform_device *pdev)
> * specify IORESOURCE_IRQ_SHAREABLE in their resources, they will be
> * requested with the IRQF_SHARED flag
> */
> - errirq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
> - if (!chan || !errirq_res)
> + irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
> + if (!chan || !irq_res)
> return -ENODEV;
>
> if (!request_mem_region(chan->start, resource_size(chan), pdev->name)) {
> @@ -1258,33 +1258,35 @@ static int __init sh_dmae_probe(struct platform_device *pdev)
> /* Default transfer size of 32 bytes requires 32-byte alignment */
> shdev->common.copy_align = LOG2_DEFAULT_XFER_SIZE;
>
> -#if defined(CONFIG_CPU_SH4) || defined(CONFIG_ARCH_SHMOBILE)
> - chanirq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 1);
> -
> - if (!chanirq_res)
> - chanirq_res = errirq_res;
> - else
> - irqres++;
> -
> - if (chanirq_res = errirq_res ||
> - (errirq_res->flags & IORESOURCE_BITS) = IORESOURCE_IRQ_SHAREABLE)
> - irqflags = IRQF_SHARED;
> -
> - errirq = errirq_res->start;
> -
> - err = request_irq(errirq, sh_dmae_err, irqflags,
> - "DMAC Address Error", shdev);
> - if (err) {
> - dev_err(&pdev->dev,
> - "DMA failed requesting irq #%d, error %d\n",
> - errirq, err);
> - goto eirq_err;
> + errirq_res = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
> + "error_irq");
Wouldn't this break all platforms, providing error IRQ, because they don't
yet have any IRQ resources with that name? Also, I think, it would be good
to define macros for DMAC IRQ names, similar to SH_MOBILE_SDHI_IRQ_*
macros in include/linux/mmc/sh_mobile_sdhi.h. To avoid breakages you,
probably, want to
1. add IRQ resource name definition macros to the header
2. add IRQ resource names to platforms. This shouldn't break anything, you
still can request those IRQs without name.
3. convert the driver. Here I would try to think of a scheme, where we
wouldn't have to mix named and unnamed IRQ resources. So, maybe use all of
them as named. So, how about
3.1. Request both "error irq" and "channel irq" IRQ resources
3.2. If none is supplied - error out
3.3. If an error IRQ is provided - request it
3.4. If no separate channel IRQs are provided - request error IRQ
additional times, according to the channel count
3.5. If separate channel IRQs are provided - request them just like now
Would this make sense?
Thanks
Guennadi
> + if (errirq_res) {
> + chanirq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 1);
> +
> + if (!chanirq_res)
> + chanirq_res = errirq_res;
> + else
> + irqres++;
> +
> + if (chanirq_res = errirq_res ||
> + (errirq_res->flags & IORESOURCE_BITS) =
> + IORESOURCE_IRQ_SHAREABLE)
> + irqflags = IRQF_SHARED;
> +
> + errirq = errirq_res->start;
> +
> + err = request_irq(errirq, sh_dmae_err, irqflags,
> + "DMAC Address Error", shdev);
> + if (err) {
> + dev_err(&pdev->dev,
> + "DMA failed requesting irq #%d, error %d\n",
> + errirq, err);
> + goto eirq_err;
> + }
> + } else {
> + chanirq_res = irq_res;
> }
>
> -#else
> - chanirq_res = errirq_res;
> -#endif /* CONFIG_CPU_SH4 || CONFIG_ARCH_SHMOBILE */
> -
> if (chanirq_res->start = chanirq_res->end &&
> !platform_get_resource(pdev, IORESOURCE_IRQ, 1)) {
> /* Special case - all multiplexed */
> @@ -1305,11 +1307,11 @@ static int __init sh_dmae_probe(struct platform_device *pdev)
> break;
> }
>
> - if ((errirq_res->flags & IORESOURCE_BITS) =
> + if ((irq_res->flags & IORESOURCE_BITS) =
> IORESOURCE_IRQ_SHAREABLE)
> chan_flag[irq_cnt] = IRQF_SHARED;
> else
> - chan_flag[irq_cnt] = IRQF_DISABLED;
> + chan_flag[irq_cnt] = 0;
> dev_dbg(&pdev->dev,
> "Found IRQ %d for channel %d\n",
> i, irq_cnt);
> @@ -1345,10 +1347,9 @@ static int __init sh_dmae_probe(struct platform_device *pdev)
> chan_probe_err:
> sh_dmae_chan_remove(shdev);
>
> -#if defined(CONFIG_CPU_SH4) || defined(CONFIG_ARCH_SHMOBILE)
> - free_irq(errirq, shdev);
> + if (errirq_res)
> + free_irq(errirq, shdev);
> eirq_err:
> -#endif
> rst_err:
> spin_lock_irq(&sh_dmae_lock);
> list_del_rcu(&shdev->node);
> @@ -1379,12 +1380,13 @@ static int __exit sh_dmae_remove(struct platform_device *pdev)
> {
> struct sh_dmae_device *shdev = platform_get_drvdata(pdev);
> struct resource *res;
> - int errirq = platform_get_irq(pdev, 0);
> + struct resource *errirq_res = platform_get_resource_byname(pdev,
> + IORESOURCE_IRQ, "error_irq");
>
> dma_async_device_unregister(&shdev->common);
>
> - if (errirq > 0)
> - free_irq(errirq, shdev);
> + if (errirq_res)
> + free_irq(errirq_res->start, shdev);
>
> spin_lock_irq(&sh_dmae_lock);
> list_del_rcu(&shdev->node);
> --
> 1.7.1
>
---
Guennadi Liakhovetski, Ph.D.
Freelance Open-Source Software Developer
http://www.open-technology.de/
^ permalink raw reply
* mach/debug-macro.S for sh-mobile
From: Alexander Lukichev @ 2012-01-10 10:53 UTC (permalink / raw)
To: linux-sh
Hi, all!
I'm new to kernel development but would like to port it to a new SoC
which is strikingly like other SHmobile chips (e.g., sh7372). I am
sorry in advance if I ask too dummy and/or inappropriate questions. If
you feel like I did just that, please refer me to some mailing list
where they could be answered, or explicitly to /dev/null.
I'm trying to compile v3.1 from Linus for a Mackerel board (sh7372)
but with DEBUG_LL and EARLY_PRINTK enabled, and DEBUG_ICEDCC disabled.
And I get missing mach/debug-macro.S error. I have not been able to
loate that file anywhere for SHmobile. Is it not intended to exist for
SHmobile? Id est, if DEBUG_LL is on than UART is not used on any of
those chips inn SHmobile? Where could I get me debugging macros
besides writing them myself?
Thanks!
--
Best regards,
 Alexander Lukichev
^ permalink raw reply
* [PATCH] sh: also without PM_RUNTIME pm_runtime.o must be built
From: Guennadi Liakhovetski @ 2012-01-10 15:04 UTC (permalink / raw)
To: linux-sh
When CONFIG_PM_RUNTIME is off, drivers/sh/pm_runtime.o still has to be
built on sh platforms, because then it provides means to statically
switch on device PM clocks.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
---
Hi Paul
Your commit
commit 681dc7e512af62d1d005df535cf02b86cddcf587
Author: Paul Mundt <lethal@linux-sh.org>
Date: Fri Nov 18 16:05:52 2011 +0900
sh: Kill off remaining private runtime PM bits.
broke the CONFIG_RUNTIME_PM=n case on sh7372. This patch fixes it, and I
hope it doesn't break any other configuration...
drivers/sh/Makefile | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/sh/Makefile b/drivers/sh/Makefile
index c393894..7139ad2 100644
--- a/drivers/sh/Makefile
+++ b/drivers/sh/Makefile
@@ -7,4 +7,4 @@ obj-$(CONFIG_HAVE_CLK) += clk/
obj-$(CONFIG_MAPLE) += maple/
obj-$(CONFIG_SUPERHYWAY) += superhyway/
obj-$(CONFIG_GENERIC_GPIO) += pfc.o
-obj-$(CONFIG_PM_RUNTIME) += pm_runtime.o
+obj-y += pm_runtime.o
--
1.7.2.5
^ permalink raw reply related
* [PATCH] mmc: tmio_mmc, sdhi: update input clock frequency after
From: Guennadi Liakhovetski @ 2012-01-10 15:06 UTC (permalink / raw)
To: linux-mmc; +Cc: linux-sh, Magnus Damm, Chris Ball
After a runtime or system-wide suspend the clock frequency can change,
therefore it must be re-read.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
---
drivers/mmc/host/sh_mobile_sdhi.c | 10 ++++++++++
drivers/mmc/host/tmio_mmc_pio.c | 31 +++++++++++++++++++++----------
include/linux/mfd/tmio.h | 1 +
3 files changed, 32 insertions(+), 10 deletions(-)
diff --git a/drivers/mmc/host/sh_mobile_sdhi.c b/drivers/mmc/host/sh_mobile_sdhi.c
index 95a2405..c0db970 100644
--- a/drivers/mmc/host/sh_mobile_sdhi.c
+++ b/drivers/mmc/host/sh_mobile_sdhi.c
@@ -47,6 +47,15 @@ static void sh_mobile_sdhi_set_pwr(struct platform_device *pdev, int state)
p->set_pwr(pdev, state);
}
+static unsigned int sh_mobile_sdhi_get_clk_rate(struct platform_device *pdev)
+{
+ struct mmc_host *mmc = platform_get_drvdata(pdev);
+ struct tmio_mmc_host *host = mmc_priv(mmc);
+ struct sh_mobile_sdhi *priv = container_of(host->pdata, struct sh_mobile_sdhi, mmc_data);
+
+ return clk_get_rate(priv->clk);
+}
+
static int sh_mobile_sdhi_get_cd(struct platform_device *pdev)
{
struct sh_mobile_sdhi_info *p = pdev->dev.platform_data;
@@ -120,6 +129,7 @@ static int __devinit sh_mobile_sdhi_probe(struct platform_device *pdev)
mmc_data->hclk = clk_get_rate(priv->clk);
mmc_data->set_pwr = sh_mobile_sdhi_set_pwr;
mmc_data->get_cd = sh_mobile_sdhi_get_cd;
+ mmc_data->get_clk_rate = sh_mobile_sdhi_get_clk_rate;
mmc_data->capabilities = MMC_CAP_MMC_HIGHSPEED;
if (p) {
mmc_data->flags = p->tmio_flags;
diff --git a/drivers/mmc/host/tmio_mmc_pio.c b/drivers/mmc/host/tmio_mmc_pio.c
index 7c4378f..0e72f1a 100644
--- a/drivers/mmc/host/tmio_mmc_pio.c
+++ b/drivers/mmc/host/tmio_mmc_pio.c
@@ -900,7 +900,10 @@ int __devinit tmio_mmc_host_probe(struct tmio_mmc_host **host,
mmc->ops = &tmio_mmc_ops;
mmc->caps = MMC_CAP_4_BIT_DATA | pdata->capabilities;
- mmc->f_max = pdata->hclk;
+ if (pdata->get_clk_rate)
+ mmc->f_max = pdata->get_clk_rate(pdev);
+ else
+ mmc->f_max = pdata->hclk;
mmc->f_min = mmc->f_max / 512;
mmc->max_segs = 32;
mmc->max_blk_size = 512;
@@ -1019,6 +1022,21 @@ void tmio_mmc_host_remove(struct tmio_mmc_host *host)
}
EXPORT_SYMBOL(tmio_mmc_host_remove);
+static void tmio_mmc_resume(struct device *dev)
+{
+ struct mmc_host *mmc = dev_get_drvdata(dev);
+ struct tmio_mmc_host *host = mmc_priv(mmc);
+ struct tmio_mmc_data *pdata = host->pdata;
+
+ if (pdata->get_clk_rate) {
+ mmc->f_max = pdata->get_clk_rate(host->pdev);
+ mmc->f_min = mmc->f_max / 512;
+ }
+
+ tmio_mmc_reset(host);
+ tmio_mmc_enable_dma(host, true);
+}
+
#ifdef CONFIG_PM
int tmio_mmc_host_suspend(struct device *dev)
{
@@ -1036,10 +1054,8 @@ EXPORT_SYMBOL(tmio_mmc_host_suspend);
int tmio_mmc_host_resume(struct device *dev)
{
struct mmc_host *mmc = dev_get_drvdata(dev);
- struct tmio_mmc_host *host = mmc_priv(mmc);
- tmio_mmc_reset(host);
- tmio_mmc_enable_dma(host, true);
+ tmio_mmc_resume(dev);
/* The MMC core will perform the complete set up */
return mmc_resume_host(mmc);
@@ -1056,12 +1072,7 @@ EXPORT_SYMBOL(tmio_mmc_host_runtime_suspend);
int tmio_mmc_host_runtime_resume(struct device *dev)
{
- struct mmc_host *mmc = dev_get_drvdata(dev);
- struct tmio_mmc_host *host = mmc_priv(mmc);
-
- tmio_mmc_reset(host);
- tmio_mmc_enable_dma(host, true);
-
+ tmio_mmc_resume(dev);
return 0;
}
EXPORT_SYMBOL(tmio_mmc_host_runtime_resume);
diff --git a/include/linux/mfd/tmio.h b/include/linux/mfd/tmio.h
index 367c65c6..018eb45 100644
--- a/include/linux/mfd/tmio.h
+++ b/include/linux/mfd/tmio.h
@@ -103,6 +103,7 @@ struct tmio_mmc_data {
unsigned long cd_flags;
void (*set_pwr)(struct platform_device *host, int state);
void (*set_clk_div)(struct platform_device *host, int state);
+ unsigned int (*get_clk_rate)(struct platform_device *host);
int (*get_cd)(struct platform_device *host);
int (*write16_hook)(struct tmio_mmc_host *host, int addr);
};
--
1.7.2.5
^ permalink raw reply related
* Re: [PATCH 09/11] mmc: sh_mobile_sdhi: do not manage PM clocks
From: Guennadi Liakhovetski @ 2012-01-10 15:10 UTC (permalink / raw)
To: Magnus Damm
Cc: linux-mmc, Chris Ball, Paul Mundt, linux-sh, Rafael J. Wysocki,
Samuel Ortiz
In-Reply-To: <CANqRtoRqSFMmC4VySM-Aczd7AFxZrC8nzjPwaffa+=3VtWZK0g@mail.gmail.com>
Hi Magnus
On Fri, 6 Jan 2012, Magnus Damm wrote:
> Hi Guennadi,
>
> On Wed, Jan 4, 2012 at 11:17 PM, Guennadi Liakhovetski
> <g.liakhovetski@gmx.de> wrote:
> > On ARM the same clock is used by the PM subsystem and by the driver
> > directly. This leads to the clock staying permanently on, independent of
> > the runtime PM state. This patch makes clock enable and disable calls in
> > the driver SuperH-specific.
> >
> > Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
> > ---
> > drivers/mmc/host/sh_mobile_sdhi.c | 6 ++++++
> > 1 files changed, 6 insertions(+), 0 deletions(-)
>
> Thanks for your patch.
>
> >From my point of view there is very little difference between SH and
> SH-Mobile ARM, so I don't understand the special treatment. Also, is
> this change really needed for SH with your recent Runtime PM patches?
>
> I believe we need to make use of the clock framework to get the clock
> rate configuration in the SDHI driver. At the same time we want to
> stop the clock as frequently as possible. I believe we should disable
> and enable the clock together with the Runtime PM get/put operations -
> pretty much exactly like our I2C master driver does. The only problem
> is, while the clock is disabled the clock rate may be changed. So we
> need to be able to notify the MMC subsystem about the new clock rate.
It sounds a bit strange to me, that the clock frequency can change - I
don't think we take it into account in other drivers? But if this is
really the case, would something like this help in this case:
http://thread.gmane.org/gmane.linux.kernel.mmc/12110
> Any ideas on how to make this happen?
Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.
Freelance Open-Source Software Developer
http://www.open-technology.de/
^ permalink raw reply
* MMCIF support on sh7757lcr
From: Guennadi Liakhovetski @ 2012-01-10 15:55 UTC (permalink / raw)
To: linux-sh
Hello Shimoda-san
While reviewing MMCIF platform bindings, I came across your commit
commit 65f63eab38626a79f8a54d13686680a1ea898f72
Author: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Date: Fri Feb 25 07:40:27 2011 +0000
sh: add platform_device of tmio_mmc and sh_mmcif to sh7757lcr
There you only specify MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA
capabilities for MMCIF. The MMCIF controller does not have any native
support for card hotplug detection, therefore it must either be polled, or
the card has to be marked non-removable. For polling it is also desired to
provide a .get_cd() method. Neither of these is done for sh7757lcr. Is the
MMC card on it removable? If so, is there any way to detect card presence
in the slot?
Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.
Freelance Open-Source Software Developer
http://www.open-technology.de/
^ permalink raw reply
* [PATCH 09/11 v2] mmc: sh_mobile_sdhi: do not manage PM clocks manually
From: Guennadi Liakhovetski @ 2012-01-10 17:44 UTC (permalink / raw)
To: Magnus Damm
Cc: linux-mmc, Chris Ball, Paul Mundt, linux-sh, Rafael J. Wysocki,
Samuel Ortiz
In-Reply-To: <CANqRtoRqSFMmC4VySM-Aczd7AFxZrC8nzjPwaffa+=3VtWZK0g@mail.gmail.com>
On sh-mobile platforms the MMC clock frequency for the TMIO MMC unit is
obtained from the same clock, as the one, that runtime power-manages the
controller. The SDHI glue code has to access that clock directly,
bypassing the runtime PM framework, to get its frequency, but it
shouldn't enable or disable it.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
---
Hi Magnus
On Fri, 6 Jan 2012, Magnus Damm wrote:
> >From my point of view there is very little difference between SH and
> SH-Mobile ARM, so I don't understand the special treatment. Also, is
> this change really needed for SH with your recent Runtime PM patches?
I tested on ecovec, using polled hotplug and debug prints from the PM
clock enable / disable routines - seems to also work properly with this
patch. So, looks like you were right, cannot say anything about other
platforms, obviously.
drivers/mmc/host/sh_mobile_sdhi.c | 4 ----
1 files changed, 0 insertions(+), 4 deletions(-)
diff --git a/drivers/mmc/host/sh_mobile_sdhi.c b/drivers/mmc/host/sh_mobile_sdhi.c
index a8d353e..95a2405 100644
--- a/drivers/mmc/host/sh_mobile_sdhi.c
+++ b/drivers/mmc/host/sh_mobile_sdhi.c
@@ -117,8 +117,6 @@ static int __devinit sh_mobile_sdhi_probe(struct platform_device *pdev)
goto eclkget;
}
- clk_enable(priv->clk);
-
mmc_data->hclk = clk_get_rate(priv->clk);
mmc_data->set_pwr = sh_mobile_sdhi_set_pwr;
mmc_data->get_cd = sh_mobile_sdhi_get_cd;
@@ -235,7 +233,6 @@ eirq_sdio:
eirq_card_detect:
tmio_mmc_host_remove(host);
eprobe:
- clk_disable(priv->clk);
clk_put(priv->clk);
eclkget:
kfree(priv);
@@ -261,7 +258,6 @@ static int sh_mobile_sdhi_remove(struct platform_device *pdev)
free_irq(irq, host);
}
- clk_disable(priv->clk);
clk_put(priv->clk);
kfree(priv);
--
1.7.2.5
^ permalink raw reply related
* [PATCH] PM / Domains: Fix build for CONFIG_PM_SLEEP unset
From: Rafael J. Wysocki @ 2012-01-10 21:13 UTC (permalink / raw)
To: Linux PM list; +Cc: LKML, Magnus Damm, linux-sh
From: Rafael J. Wysocki <rjw@sisk.pl>
Some callback functions defined in drivers/base/power/domain.c are
only necessary if CONFIG_PM_SLEEP and they call some other functions
that are only available in that case. For this reason, they should
not be compiled at all when CONFIG_PM_SLEEP is not set.
Reported-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
---
drivers/base/power/domain.c | 15 +++++++++++++++
1 file changed, 15 insertions(+)
Index: linux/drivers/base/power/domain.c
=================================--- linux.orig/drivers/base/power/domain.c
+++ linux/drivers/base/power/domain.c
@@ -1429,6 +1429,8 @@ static int pm_genpd_default_restore_stat
return 0;
}
+#ifdef CONFIG_PM_SLEEP
+
/**
* pm_genpd_default_suspend - Default "device suspend" for PM domians.
* @dev: Device to handle.
@@ -1517,6 +1519,19 @@ static int pm_genpd_default_thaw(struct
return cb ? cb(dev) : pm_generic_thaw(dev);
}
+#else /* !CONFIG_PM_SLEEP */
+
+#define pm_genpd_default_suspend NULL
+#define pm_genpd_default_suspend_late NULL
+#define pm_genpd_default_resume_early NULL
+#define pm_genpd_default_resume NULL
+#define pm_genpd_default_freeze NULL
+#define pm_genpd_default_freeze_late NULL
+#define pm_genpd_default_thaw_early NULL
+#define pm_genpd_default_thaw NULL
+
+#endif /* !CONFIG_PM_SLEEP */
+
/**
* pm_genpd_init - Initialize a generic I/O PM domain object.
* @genpd: PM domain object to initialize.
^ permalink raw reply
* Re: [PATCH v3 1/3] dmaengine: shdma: modify the DMAC Address Error
From: Shimoda, Yoshihiro @ 2012-01-11 0:43 UTC (permalink / raw)
To: linux-sh
In-Reply-To: <4F0BDCD5.9020603@renesas.com>
Hello Guennadi-san,
Thank you very much for your review!
2012/01/10 18:48, Guennadi Liakhovetski wrote:
> Hello Shimoda-san
>
> Thanks for your work on this! Nice to see patches improving!
>
> On Tue, 10 Jan 2012, Shimoda, Yoshihiro wrote:
>
>> + errirq_res = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
>> + "error_irq");
>
> Wouldn't this break all platforms, providing error IRQ, because they don't
> yet have any IRQ resources with that name? Also, I think, it would be good
> to define macros for DMAC IRQ names, similar to SH_MOBILE_SDHI_IRQ_*
> macros in include/linux/mmc/sh_mobile_sdhi.h. To avoid breakages you,
> probably, want to
>
> 1. add IRQ resource name definition macros to the header
> 2. add IRQ resource names to platforms. This shouldn't break anything, you
> still can request those IRQs without name.
> 3. convert the driver. Here I would try to think of a scheme, where we
> wouldn't have to mix named and unnamed IRQ resources. So, maybe use all of
> them as named. So, how about
>
> 3.1. Request both "error irq" and "channel irq" IRQ resources
> 3.2. If none is supplied - error out
> 3.3. If an error IRQ is provided - request it
> 3.4. If no separate channel IRQs are provided - request error IRQ
> additional times, according to the channel count
> 3.5. If separate channel IRQs are provided - request them just like now
>
> Would this make sense?
I think that it is very nice.
I will write such a code.
Best regards,
Yoshihiro Shimoda
>
> Thanks
> Guennadi
^ permalink raw reply
* Re: MMCIF support on sh7757lcr
From: Shimoda, Yoshihiro @ 2012-01-11 0:55 UTC (permalink / raw)
To: linux-sh
In-Reply-To: <Pine.LNX.4.64.1201101646050.530@axis700.grange>
Hello Guennadi-san,
Thank you for your review.
2012/01/11 0:55, Guennadi Liakhovetski wrote:
> Hello Shimoda-san
>
> While reviewing MMCIF platform bindings, I came across your commit
>
> commit 65f63eab38626a79f8a54d13686680a1ea898f72
> Author: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> Date: Fri Feb 25 07:40:27 2011 +0000
>
> sh: add platform_device of tmio_mmc and sh_mmcif to sh7757lcr
>
> There you only specify MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA
> capabilities for MMCIF. The MMCIF controller does not have any native
> support for card hotplug detection, therefore it must either be polled, or
> the card has to be marked non-removable. For polling it is also desired to
> provide a .get_cd() method. Neither of these is done for sh7757lcr. Is the
> MMC card on it removable? If so, is there any way to detect card presence
> in the slot?
This board doesn't have the MMC card slot. A MMC chip is on the board,
so we cannot remove the chip.
In the linux-3.2-rc7, the sh7757lcr can detect the MMC chip and
I can see the "mmcblk" device.
Best regards,
Yoshihiro Shimoda
> Thanks
> Guennadi
> ---
> Guennadi Liakhovetski, Ph.D.
> Freelance Open-Source Software Developer
> http://www.open-technology.de/
>
--
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
EC No.
^ permalink raw reply
* [PATCH v4 1/6] dmaengine: shdma: add IRQ resource name definition macros
From: Shimoda, Yoshihiro @ 2012-01-11 7:27 UTC (permalink / raw)
To: linux-sh
The SH DMAC has an ERROR IRQ and channel IRQs. So, the defination
macros are used as the resource name, and the resource name will be
used to detect each IRQ by the driver.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
---
about v4:
- add defination macros for IRQ resource first.
include/linux/sh_dma.h | 4 ++++
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/include/linux/sh_dma.h b/include/linux/sh_dma.h
index cb2dd11..a6c82cc 100644
--- a/include/linux/sh_dma.h
+++ b/include/linux/sh_dma.h
@@ -13,6 +13,10 @@
#include <linux/list.h>
#include <linux/dmaengine.h>
+/* resource name of IORESOURCE_IRQ */
+#define SH_DMA_IRQ_ERROR "error"
+#define SH_DMA_IRQ_CHANNEL "channel"
+
/* Used by slave DMA clients to request DMA to/from a specific peripheral */
struct sh_dmae_slave {
unsigned int slave_id; /* Set by the platform */
--
1.7.1
^ permalink raw reply related
* [PATCH v4 2/6] sh: add a resource name for shdma
From: Shimoda, Yoshihiro @ 2012-01-11 7:27 UTC (permalink / raw)
To: linux-sh
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
---
about v4:
- use defination macros for IRQ resource
arch/sh/kernel/cpu/sh4a/setup-sh7722.c | 3 +++
arch/sh/kernel/cpu/sh4a/setup-sh7724.c | 6 ++++++
arch/sh/kernel/cpu/sh4a/setup-sh7757.c | 16 ++++++++++++++++
arch/sh/kernel/cpu/sh4a/setup-sh7780.c | 2 ++
arch/sh/kernel/cpu/sh4a/setup-sh7785.c | 2 ++
arch/sh/kernel/cpu/sh4a/setup-sh7786.c | 2 ++
6 files changed, 31 insertions(+), 0 deletions(-)
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
index 278a0e5..8d9c809 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
@@ -147,18 +147,21 @@ static struct resource sh7722_dmae_resources[] = {
},
{
/* DMA error IRQ */
+ .name = SH_DMA_IRQ_ERROR,
.start = 78,
.end = 78,
.flags = IORESOURCE_IRQ,
},
{
/* IRQ for channels 0-3 */
+ .name = SH_DMA_IRQ_CHANNEL,
.start = 48,
.end = 51,
.flags = IORESOURCE_IRQ,
},
{
/* IRQ for channels 4-5 */
+ .name = SH_DMA_IRQ_CHANNEL,
.start = 76,
.end = 77,
.flags = IORESOURCE_IRQ,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
index a37dd72..f657054 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
@@ -215,18 +215,21 @@ static struct resource sh7724_dmae0_resources[] = {
},
{
/* DMA error IRQ */
+ .name = SH_DMA_IRQ_ERROR,
.start = 78,
.end = 78,
.flags = IORESOURCE_IRQ,
},
{
/* IRQ for channels 0-3 */
+ .name = SH_DMA_IRQ_CHANNEL,
.start = 48,
.end = 51,
.flags = IORESOURCE_IRQ,
},
{
/* IRQ for channels 4-5 */
+ .name = SH_DMA_IRQ_CHANNEL,
.start = 76,
.end = 77,
.flags = IORESOURCE_IRQ,
@@ -249,18 +252,21 @@ static struct resource sh7724_dmae1_resources[] = {
},
{
/* DMA error IRQ */
+ .name = SH_DMA_IRQ_ERROR,
.start = 74,
.end = 74,
.flags = IORESOURCE_IRQ,
},
{
/* IRQ for channels 0-3 */
+ .name = SH_DMA_IRQ_CHANNEL,
.start = 40,
.end = 43,
.flags = IORESOURCE_IRQ,
},
{
/* IRQ for channels 4-5 */
+ .name = SH_DMA_IRQ_CHANNEL,
.start = 72,
.end = 73,
.flags = IORESOURCE_IRQ,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
index 0555929..cf2667a 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
@@ -465,6 +465,7 @@ static struct resource sh7757_dmae0_resources[] = {
.flags = IORESOURCE_MEM,
},
{
+ .name = SH_DMA_IRQ_ERROR,
.start = 34,
.end = 34,
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
@@ -487,54 +488,63 @@ static struct resource sh7757_dmae1_resources[] = {
},
{
/* DMA error */
+ .name = SH_DMA_IRQ_ERROR,
.start = 34,
.end = 34,
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
},
{
/* IRQ for channels 4 */
+ .name = SH_DMA_IRQ_CHANNEL,
.start = 46,
.end = 46,
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
},
{
/* IRQ for channels 5 */
+ .name = SH_DMA_IRQ_CHANNEL,
.start = 46,
.end = 46,
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
},
{
/* IRQ for channels 6 */
+ .name = SH_DMA_IRQ_CHANNEL,
.start = 88,
.end = 88,
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
},
{
/* IRQ for channels 7 */
+ .name = SH_DMA_IRQ_CHANNEL,
.start = 88,
.end = 88,
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
},
{
/* IRQ for channels 8 */
+ .name = SH_DMA_IRQ_CHANNEL,
.start = 88,
.end = 88,
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
},
{
/* IRQ for channels 9 */
+ .name = SH_DMA_IRQ_CHANNEL,
.start = 88,
.end = 88,
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
},
{
/* IRQ for channels 10 */
+ .name = SH_DMA_IRQ_CHANNEL,
.start = 88,
.end = 88,
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
},
{
/* IRQ for channels 11 */
+ .name = SH_DMA_IRQ_CHANNEL,
.start = 88,
.end = 88,
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
@@ -557,18 +567,21 @@ static struct resource sh7757_dmae2_resources[] = {
},
{
/* DMA error */
+ .name = SH_DMA_IRQ_ERROR,
.start = 323,
.end = 323,
.flags = IORESOURCE_IRQ,
},
{
/* IRQ for channels 12 to 16 */
+ .name = SH_DMA_IRQ_CHANNEL,
.start = 272,
.end = 276,
.flags = IORESOURCE_IRQ,
},
{
/* IRQ for channel 17 */
+ .name = SH_DMA_IRQ_CHANNEL,
.start = 279,
.end = 279,
.flags = IORESOURCE_IRQ,
@@ -591,18 +604,21 @@ static struct resource sh7757_dmae3_resources[] = {
},
{
/* DMA error */
+ .name = SH_DMA_IRQ_ERROR,
.start = 324,
.end = 324,
.flags = IORESOURCE_IRQ,
},
{
/* IRQ for channels 18 to 22 */
+ .name = SH_DMA_IRQ_CHANNEL,
.start = 280,
.end = 284,
.flags = IORESOURCE_IRQ,
},
{
/* IRQ for channel 23 */
+ .name = SH_DMA_IRQ_CHANNEL,
.start = 288,
.end = 288,
.flags = IORESOURCE_IRQ,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
index 3d4d207..cd8d1e9 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
@@ -322,6 +322,7 @@ static struct resource sh7780_dmae0_resources[] = {
},
{
/* Real DMA error IRQ is 38, and channel IRQs are 34-37, 44-45 */
+ .name = SH_DMA_IRQ_ERROR,
.start = 34,
.end = 34,
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
@@ -338,6 +339,7 @@ static struct resource sh7780_dmae1_resources[] = {
/* DMAC1 has no DMARS */
{
/* Real DMA error IRQ is 38, and channel IRQs are 46-47, 92-95 */
+ .name = SH_DMA_IRQ_ERROR,
.start = 46,
.end = 46,
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
index b29e634..1cdb9ec 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
@@ -376,6 +376,7 @@ static struct resource sh7785_dmae0_resources[] = {
},
{
/* Real DMA error IRQ is 39, and channel IRQs are 33-38 */
+ .name = SH_DMA_IRQ_ERROR,
.start = 33,
.end = 33,
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
@@ -392,6 +393,7 @@ static struct resource sh7785_dmae1_resources[] = {
/* DMAC1 has no DMARS */
{
/* Real DMA error IRQ is 58, and channel IRQs are 52-57 */
+ .name = SH_DMA_IRQ_ERROR,
.start = 52,
.end = 52,
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
index dd5e709..6025d26 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
@@ -519,11 +519,13 @@ static struct resource dmac0_resources[] = {
.flags = IORESOURCE_MEM,
}, {
/* DMA error IRQ */
+ .name = SH_DMA_IRQ_ERROR,
.start = evt2irq(0x5c0),
.end = evt2irq(0x5c0),
.flags = IORESOURCE_IRQ,
}, {
/* IRQ for channels 0-5 */
+ .name = SH_DMA_IRQ_CHANNEL,
.start = evt2irq(0x500),
.end = evt2irq(0x5a0),
.flags = IORESOURCE_IRQ,
--
1.7.1
^ permalink raw reply related
* [PATCH v4 3/6] arm: mach-shmobile: add a resource name for shdma
From: Shimoda, Yoshihiro @ 2012-01-11 7:27 UTC (permalink / raw)
To: linux-sh
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
---
about v4:
- use defination macros for IRQ resource
arch/arm/mach-shmobile/setup-sh7372.c | 8 ++++++++
arch/arm/mach-shmobile/setup-sh73a0.c | 2 ++
2 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c
index 2380389..4f74e32 100644
--- a/arch/arm/mach-shmobile/setup-sh7372.c
+++ b/arch/arm/mach-shmobile/setup-sh7372.c
@@ -505,12 +505,14 @@ static struct resource sh7372_dmae0_resources[] = {
},
{
/* DMA error IRQ */
+ .name = SH_DMA_IRQ_ERROR,
.start = evt2irq(0x20c0),
.end = evt2irq(0x20c0),
.flags = IORESOURCE_IRQ,
},
{
/* IRQ for channels 0-5 */
+ .name = SH_DMA_IRQ_CHANNEL,
.start = evt2irq(0x2000),
.end = evt2irq(0x20a0),
.flags = IORESOURCE_IRQ,
@@ -533,12 +535,14 @@ static struct resource sh7372_dmae1_resources[] = {
},
{
/* DMA error IRQ */
+ .name = SH_DMA_IRQ_ERROR,
.start = evt2irq(0x21c0),
.end = evt2irq(0x21c0),
.flags = IORESOURCE_IRQ,
},
{
/* IRQ for channels 0-5 */
+ .name = SH_DMA_IRQ_CHANNEL,
.start = evt2irq(0x2100),
.end = evt2irq(0x21a0),
.flags = IORESOURCE_IRQ,
@@ -561,12 +565,14 @@ static struct resource sh7372_dmae2_resources[] = {
},
{
/* DMA error IRQ */
+ .name = SH_DMA_IRQ_ERROR,
.start = evt2irq(0x22c0),
.end = evt2irq(0x22c0),
.flags = IORESOURCE_IRQ,
},
{
/* IRQ for channels 0-5 */
+ .name = SH_DMA_IRQ_CHANNEL,
.start = evt2irq(0x2200),
.end = evt2irq(0x22a0),
.flags = IORESOURCE_IRQ,
@@ -670,6 +676,7 @@ static struct resource sh7372_usb_dmae0_resources[] = {
},
{
/* IRQ for channels */
+ .name = SH_DMA_IRQ_CHANNEL,
.start = evt2irq(0x0a00),
.end = evt2irq(0x0a00),
.flags = IORESOURCE_IRQ,
@@ -731,6 +738,7 @@ static struct resource sh7372_usb_dmae1_resources[] = {
},
{
/* IRQ for channels */
+ .name = SH_DMA_IRQ_CHANNEL,
.start = evt2irq(0x1d00),
.end = evt2irq(0x1d00),
.flags = IORESOURCE_IRQ,
diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c
index e46821c..5d701ac 100644
--- a/arch/arm/mach-shmobile/setup-sh73a0.c
+++ b/arch/arm/mach-shmobile/setup-sh73a0.c
@@ -608,12 +608,14 @@ static struct resource sh73a0_dmae_resources[] = {
},
{
/* DMA error IRQ */
+ .name = SH_DMA_IRQ_ERROR,
.start = gic_spi(129),
.end = gic_spi(129),
.flags = IORESOURCE_IRQ,
},
{
/* IRQ for channels 0-19 */
+ .name = SH_DMA_IRQ_CHANNEL,
.start = gic_spi(109),
.end = gic_spi(128),
.flags = IORESOURCE_IRQ,
--
1.7.1
^ permalink raw reply related
* [PATCH v4 4/6] dmaengine: shdma: modify the DMAC Address Error registration
From: Shimoda, Yoshihiro @ 2012-01-11 7:28 UTC (permalink / raw)
To: linux-sh
The USB-DMAC/SUDMAC don't have the interrupt of DMAC Address Error.
So, only if the IRQ resource has a name of SH_DMA_IRQ_ERROR, the driver
calls request_irq() for DMAC Address Error.
This patch is also useful for the generic DMAC which doesn't have
DMAC Address Error. So, we can get rid of the "CPU_SH4 || ARCH_SHMOBILE"
ifdefs.
This patch also changes the IRQF_DISABLED to 0.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
---
about v4:
- use defination macros for IRQ resource
drivers/dma/shdma.c | 73 +++++++++++++++++++++++++--------------------------
1 files changed, 36 insertions(+), 37 deletions(-)
diff --git a/drivers/dma/shdma.c b/drivers/dma/shdma.c
index 81809c2..5260dac 100644
--- a/drivers/dma/shdma.c
+++ b/drivers/dma/shdma.c
@@ -1149,9 +1149,9 @@ static void sh_dmae_chan_remove(struct sh_dmae_device *shdev)
static int __init sh_dmae_probe(struct platform_device *pdev)
{
struct sh_dmae_pdata *pdata = pdev->dev.platform_data;
- unsigned long irqflags = IRQF_DISABLED,
+ unsigned long irqflags = 0,
chan_flag[SH_DMAC_MAX_CHANNELS] = {};
- int errirq, chan_irq[SH_DMAC_MAX_CHANNELS];
+ int errirq = 0, chan_irq[SH_DMAC_MAX_CHANNELS];
int err, i, irq_cnt = 0, irqres = 0, irq_cap = 0;
struct sh_dmae_device *shdev;
struct resource *chan, *dmars, *errirq_res, *chanirq_res;
@@ -1179,8 +1179,11 @@ static int __init sh_dmae_probe(struct platform_device *pdev)
* specify IORESOURCE_IRQ_SHAREABLE in their resources, they will be
* requested with the IRQF_SHARED flag
*/
- errirq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
- if (!chan || !errirq_res)
+ errirq_res = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
+ SH_DMA_IRQ_ERROR);
+ chanirq_res = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
+ SH_DMA_IRQ_CHANNEL);
+ if (!chan || (!errirq_res && !chanirq_res))
return -ENODEV;
if (!request_mem_region(chan->start, resource_size(chan), pdev->name)) {
@@ -1258,33 +1261,29 @@ static int __init sh_dmae_probe(struct platform_device *pdev)
/* Default transfer size of 32 bytes requires 32-byte alignment */
shdev->common.copy_align = LOG2_DEFAULT_XFER_SIZE;
-#if defined(CONFIG_CPU_SH4) || defined(CONFIG_ARCH_SHMOBILE)
- chanirq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 1);
-
- if (!chanirq_res)
- chanirq_res = errirq_res;
- else
- irqres++;
-
- if (chanirq_res = errirq_res ||
- (errirq_res->flags & IORESOURCE_BITS) = IORESOURCE_IRQ_SHAREABLE)
- irqflags = IRQF_SHARED;
-
- errirq = errirq_res->start;
-
- err = request_irq(errirq, sh_dmae_err, irqflags,
- "DMAC Address Error", shdev);
- if (err) {
- dev_err(&pdev->dev,
- "DMA failed requesting irq #%d, error %d\n",
- errirq, err);
- goto eirq_err;
+ if (errirq_res) {
+ if (!chanirq_res)
+ chanirq_res = errirq_res;
+ else
+ irqres++;
+
+ if (chanirq_res = errirq_res ||
+ (errirq_res->flags & IORESOURCE_BITS) =
+ IORESOURCE_IRQ_SHAREABLE)
+ irqflags = IRQF_SHARED;
+
+ errirq = errirq_res->start;
+
+ err = request_irq(errirq, sh_dmae_err, irqflags,
+ "DMAC Address Error", shdev);
+ if (err) {
+ dev_err(&pdev->dev,
+ "DMA failed requesting irq #%d, error %d\n",
+ errirq, err);
+ goto eirq_err;
+ }
}
-#else
- chanirq_res = errirq_res;
-#endif /* CONFIG_CPU_SH4 || CONFIG_ARCH_SHMOBILE */
-
if (chanirq_res->start = chanirq_res->end &&
!platform_get_resource(pdev, IORESOURCE_IRQ, 1)) {
/* Special case - all multiplexed */
@@ -1305,11 +1304,11 @@ static int __init sh_dmae_probe(struct platform_device *pdev)
break;
}
- if ((errirq_res->flags & IORESOURCE_BITS) =
+ if ((chanirq_res->flags & IORESOURCE_BITS) =
IORESOURCE_IRQ_SHAREABLE)
chan_flag[irq_cnt] = IRQF_SHARED;
else
- chan_flag[irq_cnt] = IRQF_DISABLED;
+ chan_flag[irq_cnt] = 0;
dev_dbg(&pdev->dev,
"Found IRQ %d for channel %d\n",
i, irq_cnt);
@@ -1345,10 +1344,9 @@ static int __init sh_dmae_probe(struct platform_device *pdev)
chan_probe_err:
sh_dmae_chan_remove(shdev);
-#if defined(CONFIG_CPU_SH4) || defined(CONFIG_ARCH_SHMOBILE)
- free_irq(errirq, shdev);
+ if (errirq_res)
+ free_irq(errirq, shdev);
eirq_err:
-#endif
rst_err:
spin_lock_irq(&sh_dmae_lock);
list_del_rcu(&shdev->node);
@@ -1379,12 +1377,13 @@ static int __exit sh_dmae_remove(struct platform_device *pdev)
{
struct sh_dmae_device *shdev = platform_get_drvdata(pdev);
struct resource *res;
- int errirq = platform_get_irq(pdev, 0);
+ struct resource *errirq_res = platform_get_resource_byname(pdev,
+ IORESOURCE_IRQ, SH_DMA_IRQ_ERROR);
dma_async_device_unregister(&shdev->common);
- if (errirq > 0)
- free_irq(errirq, shdev);
+ if (errirq_res)
+ free_irq(errirq_res->start, shdev);
spin_lock_irq(&sh_dmae_lock);
list_del_rcu(&shdev->node);
--
1.7.1
^ permalink raw reply related
* [PATCH v4 5/6] dmaengine: shdma: use sh_dmae_writel/readl in chcr_write/read
From: Shimoda, Yoshihiro @ 2012-01-11 7:28 UTC (permalink / raw)
To: linux-sh
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
---
about v4:
- No change
drivers/dma/shdma.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/dma/shdma.c b/drivers/dma/shdma.c
index 5260dac..0f9d5f2 100644
--- a/drivers/dma/shdma.c
+++ b/drivers/dma/shdma.c
@@ -92,14 +92,14 @@ static void chcr_write(struct sh_dmae_chan *sh_dc, u32 data)
{
struct sh_dmae_device *shdev = to_sh_dev(sh_dc);
- __raw_writel(data, sh_dc->base + shdev->chcr_offset / sizeof(u32));
+ sh_dmae_writel(sh_dc, data, shdev->chcr_offset);
}
static u32 chcr_read(struct sh_dmae_chan *sh_dc)
{
struct sh_dmae_device *shdev = to_sh_dev(sh_dc);
- return __raw_readl(sh_dc->base + shdev->chcr_offset / sizeof(u32));
+ return sh_dmae_readl(sh_dc, shdev->chcr_offset);
}
/*
--
1.7.1
^ permalink raw reply related
* [PATCH v4 6/6] dmaengine: shdma: add support for SUDMAC
From: Shimoda, Yoshihiro @ 2012-01-11 7:28 UTC (permalink / raw)
To: linux-sh
The SH7757's USB module has SUDMAC. The SUDMAC's registers are imcompatible
with SH DMAC. However, since the SUDMAC is a very simple module, we can
reuse the shdma driver for SUDMAC by a few modification.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
---
about v4:
- No change
drivers/dma/shdma.c | 102 +++++++++++++++++++++++++++++++++++++++++++-----
include/linux/sh_dma.h | 46 +++++++++++++++++++++
2 files changed, 138 insertions(+), 10 deletions(-)
diff --git a/drivers/dma/shdma.c b/drivers/dma/shdma.c
index 0f9d5f2..eb5ca48 100644
--- a/drivers/dma/shdma.c
+++ b/drivers/dma/shdma.c
@@ -58,6 +58,11 @@ static unsigned long sh_dmae_slave_used[BITS_TO_LONGS(SH_DMA_SLAVE_NUMBER)];
static void sh_dmae_chan_ld_cleanup(struct sh_dmae_chan *sh_chan, bool all);
+static int sh_dmae_is_sudmac(struct sh_dmae_device *shdev)
+{
+ return shdev->pdata->sudmac;
+}
+
static void sh_dmae_writel(struct sh_dmae_chan *sh_dc, u32 data, u32 reg)
{
__raw_writel(data, sh_dc->base + reg / sizeof(u32));
@@ -68,6 +73,39 @@ static u32 sh_dmae_readl(struct sh_dmae_chan *sh_dc, u32 reg)
return __raw_readl(sh_dc->base + reg / sizeof(u32));
}
+static void sh_dmae_sudmac_chcr_write(struct sh_dmae_chan *sh_dc, u32 data)
+{
+ struct sh_dmae_device *shdev = to_sh_dev(sh_dc);
+
+ if (!(data & CHCR_TE)) /* clear interrupt status only */
+ sh_dmae_writel(sh_dc, CH0ENDC, DINTSTSCLR);
+
+ if (data & shdev->chcr_ie_bit)
+ sh_dmae_writel(sh_dc, CH0ENDE, DINTCTRL);
+ else
+ sh_dmae_writel(sh_dc, 0, DINTCTRL);
+
+ if (data & CHCR_DE)
+ sh_dmae_writel(sh_dc, DEN, CH0DEN);
+ else
+ sh_dmae_writel(sh_dc, 0, CH0DEN);
+}
+
+static u32 sh_dmae_sudmac_chcr_read(struct sh_dmae_chan *sh_dc)
+{
+ struct sh_dmae_device *shdev = to_sh_dev(sh_dc);
+ u32 chcr = 0;
+
+ if (sh_dmae_readl(sh_dc, DINTSTS) & CH0ENDS)
+ chcr |= CHCR_TE;
+ if (sh_dmae_readl(sh_dc, DINTCTRL) & CH0ENDE)
+ chcr |= shdev->chcr_ie_bit;
+ if (sh_dmae_readl(sh_dc, CH0DEN) & DEN)
+ chcr |= CHCR_DE;
+
+ return chcr;
+}
+
static u16 dmaor_read(struct sh_dmae_device *shdev)
{
u32 __iomem *addr = shdev->chan_reg + DMAOR / sizeof(u32);
@@ -92,14 +130,20 @@ static void chcr_write(struct sh_dmae_chan *sh_dc, u32 data)
{
struct sh_dmae_device *shdev = to_sh_dev(sh_dc);
- sh_dmae_writel(sh_dc, data, shdev->chcr_offset);
+ if (sh_dmae_is_sudmac(shdev))
+ sh_dmae_sudmac_chcr_write(sh_dc, data);
+ else
+ sh_dmae_writel(sh_dc, data, shdev->chcr_offset);
}
static u32 chcr_read(struct sh_dmae_chan *sh_dc)
{
struct sh_dmae_device *shdev = to_sh_dev(sh_dc);
- return sh_dmae_readl(sh_dc, shdev->chcr_offset);
+ if (sh_dmae_is_sudmac(shdev))
+ return sh_dmae_sudmac_chcr_read(sh_dc);
+ else
+ return sh_dmae_readl(sh_dc, shdev->chcr_offset);
}
/*
@@ -112,6 +156,9 @@ static void sh_dmae_ctl_stop(struct sh_dmae_device *shdev)
unsigned short dmaor;
unsigned long flags;
+ if (sh_dmae_is_sudmac(shdev))
+ return;
+
spin_lock_irqsave(&sh_dmae_lock, flags);
dmaor = dmaor_read(shdev);
@@ -125,6 +172,9 @@ static int sh_dmae_rst(struct sh_dmae_device *shdev)
unsigned short dmaor;
unsigned long flags;
+ if (sh_dmae_is_sudmac(shdev))
+ return 0;
+
spin_lock_irqsave(&sh_dmae_lock, flags);
dmaor = dmaor_read(shdev) & ~(DMAOR_NMIF | DMAOR_AE | DMAOR_DME);
@@ -159,6 +209,9 @@ static unsigned int calc_xmit_shift(struct sh_dmae_chan *sh_chan, u32 chcr)
int cnt = ((chcr & pdata->ts_low_mask) >> pdata->ts_low_shift) |
((chcr & pdata->ts_high_mask) >> pdata->ts_high_shift);
+ if (sh_dmae_is_sudmac(shdev))
+ return 0;
+
if (cnt >= pdata->ts_shift_num)
cnt = 0;
@@ -171,6 +224,9 @@ static u32 log2size_to_chcr(struct sh_dmae_chan *sh_chan, int l2size)
struct sh_dmae_pdata *pdata = shdev->pdata;
int i;
+ if (sh_dmae_is_sudmac(shdev))
+ return 0;
+
for (i = 0; i < pdata->ts_shift_num; i++)
if (pdata->ts_shift[i] = l2size)
break;
@@ -184,9 +240,17 @@ static u32 log2size_to_chcr(struct sh_dmae_chan *sh_chan, int l2size)
static void dmae_set_reg(struct sh_dmae_chan *sh_chan, struct sh_dmae_regs *hw)
{
- sh_dmae_writel(sh_chan, hw->sar, SAR);
- sh_dmae_writel(sh_chan, hw->dar, DAR);
- sh_dmae_writel(sh_chan, hw->tcr >> sh_chan->xmit_shift, TCR);
+ struct sh_dmae_device *shdev = to_sh_dev(sh_chan);
+
+ if (sh_dmae_is_sudmac(shdev)) {
+ sh_dmae_writel(sh_chan, LBA_WAIT | RCVENDM, CH0CFG);
+ sh_dmae_writel(sh_chan, hw->sar, CH0BA);
+ sh_dmae_writel(sh_chan, hw->tcr, CH0BBC);
+ } else {
+ sh_dmae_writel(sh_chan, hw->sar, SAR);
+ sh_dmae_writel(sh_chan, hw->dar, DAR);
+ sh_dmae_writel(sh_chan, hw->tcr >> sh_chan->xmit_shift, TCR);
+ }
}
static void dmae_start(struct sh_dmae_chan *sh_chan)
@@ -493,6 +557,7 @@ static struct sh_desc *sh_dmae_add_desc(struct sh_dmae_chan *sh_chan,
unsigned long flags, dma_addr_t *dest, dma_addr_t *src, size_t *len,
struct sh_desc **first, enum dma_data_direction direction)
{
+ struct sh_dmae_device *shdev = to_sh_dev(sh_chan);
struct sh_desc *new;
size_t copy_size;
@@ -508,7 +573,14 @@ static struct sh_desc *sh_dmae_add_desc(struct sh_dmae_chan *sh_chan,
copy_size = min(*len, (size_t)SH_DMA_TCR_MAX + 1);
- new->hw.sar = *src;
+ /*
+ * SUDMAC has a CHnBA register only. So, the driver uses "hw.sar"
+ * even if transfer direction is DMA_FROM_DEVICE.
+ */
+ if (sh_dmae_is_sudmac(shdev) && direction = DMA_FROM_DEVICE)
+ new->hw.sar = *dest;
+ else
+ new->hw.sar = *src;
new->hw.dar = *dest;
new->hw.tcr = copy_size;
@@ -701,8 +773,10 @@ static int sh_dmae_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
/* Record partial transfer */
struct sh_desc *desc = list_entry(sh_chan->ld_queue.next,
struct sh_desc, node);
- desc->partial = (desc->hw.tcr - sh_dmae_readl(sh_chan, TCR)) <<
- sh_chan->xmit_shift;
+ struct sh_dmae_device *shdev = to_sh_dev(sh_chan);
+ if (!sh_dmae_is_sudmac(shdev))
+ desc->partial = (desc->hw.tcr - sh_dmae_readl(sh_chan,
+ TCR)) << sh_chan->xmit_shift;
}
spin_unlock_irqrestore(&sh_chan->desc_lock, flags);
@@ -989,9 +1063,17 @@ static irqreturn_t sh_dmae_err(int irq, void *data)
static void dmae_do_tasklet(unsigned long data)
{
struct sh_dmae_chan *sh_chan = (struct sh_dmae_chan *)data;
+ struct sh_dmae_device *shdev = to_sh_dev(sh_chan);
struct sh_desc *desc;
- u32 sar_buf = sh_dmae_readl(sh_chan, SAR);
- u32 dar_buf = sh_dmae_readl(sh_chan, DAR);
+ u32 sar_buf, dar_buf;
+
+ if (sh_dmae_is_sudmac(shdev)) {
+ sar_buf = sh_dmae_readl(sh_chan, CH0CA);
+ dar_buf = sh_dmae_readl(sh_chan, CH0CA);
+ } else {
+ sar_buf = sh_dmae_readl(sh_chan, SAR);
+ dar_buf = sh_dmae_readl(sh_chan, DAR);
+ }
spin_lock_irq(&sh_chan->desc_lock);
list_for_each_entry(desc, &sh_chan->ld_queue, node) {
diff --git a/include/linux/sh_dma.h b/include/linux/sh_dma.h
index a6c82cc..46be54f 100644
--- a/include/linux/sh_dma.h
+++ b/include/linux/sh_dma.h
@@ -72,6 +72,7 @@ struct sh_dmae_pdata {
unsigned int dmaor_is_32bit:1;
unsigned int needs_tend_set:1;
unsigned int no_dmars:1;
+ unsigned int sudmac:1;
};
/* DMA register */
@@ -111,4 +112,49 @@ struct sh_dmae_pdata {
#define CHCR_TE 0x00000002
#define CHCR_IE 0x00000004
+/* SUDMAC register */
+#define CH0CFG 0x00
+#define CH1CFG 0x04
+#define CH0BA 0x10
+#define CH1BA 0x14
+#define CH0BBC 0x18
+#define CH1BBC 0x1C
+#define CH0CA 0x20
+#define CH1CA 0x24
+#define CH0CBC 0x28
+#define CH1CBC 0x2C
+#define CH0DEN 0x30
+#define CH1DEN 0x34
+#define DSTSCLR 0x38
+#define DBUFCTRL 0x3C
+#define DINTCTRL 0x40
+#define DINTSTS 0x44
+#define DINTSTSCLR 0x48
+#define CH0SHCTRL 0x50
+#define CH1SHCTRL 0x54
+
+/* Definitions for the SUDMAC */
+#define SENDBUFM 0x1000 /* b12: Transmit Buffer Mode */
+#define RCVENDM 0x0100 /* b8: Receive Data Transfer End Mode */
+#define LBA_WAIT 0x0030 /* b5-4: Local Bus Access Wait */
+#define DEN 0x0001 /* b0: DMA Transfer Enable */
+#define CH1STCLR 0x0002 /* b1: Ch1 DMA Status Clear */
+#define CH0STCLR 0x0001 /* b0: Ch0 DMA Status Clear */
+#define CH1BUFW 0x0200 /* b9: Ch1 DMA Buffer Data Transfer Enable */
+#define CH0BUFW 0x0100 /* b8: Ch0 DMA Buffer Data Transfer Enable */
+#define CH1BUFS 0x0002 /* b1: Ch1 DMA Buffer Data Status */
+#define CH0BUFS 0x0001 /* b0: Ch0 DMA Buffer Data Status */
+#define CH1ERRE 0x0200 /* b9: Ch1 SHwy Res Err Detect Int Enable */
+#define CH0ERRE 0x0100 /* b8: Ch0 SHwy Res Err Detect Int Enable */
+#define CH1ENDE 0x0002 /* b1: Ch1 DMA Transfer End Int Enable */
+#define CH0ENDE 0x0001 /* b0: Ch0 DMA Transfer End Int Enable */
+#define CH1ERRS 0x0200 /* b9: Ch1 SHwy Res Err Detect Int Status */
+#define CH0ERRS 0x0100 /* b8: Ch0 SHwy Res Err Detect Int Status */
+#define CH1ENDS 0x0002 /* b1: Ch1 DMA Transfer End Int Status */
+#define CH0ENDS 0x0001 /* b0: Ch0 DMA Transfer End Int Status */
+#define CH1ERRC 0x0200 /* b9: Ch1 SHwy Res Err Detect Int Stat Clear */
+#define CH0ERRC 0x0100 /* b8: Ch0 SHwy Res Err Detect Int Stat Clear */
+#define CH1ENDC 0x0002 /* b1: Ch1 DMA Transfer End Int Stat Clear */
+#define CH0ENDC 0x0001 /* b0: Ch0 DMA Transfer End Int Stat Clear */
+
#endif
--
1.7.1
^ permalink raw reply related
* [PATCH v3 1/2] sh: add platform_device for SUDMAC in setup-sh7757
From: Shimoda, Yoshihiro @ 2012-01-11 7:28 UTC (permalink / raw)
To: linux-sh
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
---
about v3:
- use defination macros for IRQ resource
arch/sh/include/cpu-sh4/cpu/sh7757.h | 1 +
arch/sh/kernel/cpu/sh4a/setup-sh7757.c | 50 ++++++++++++++++++++++++++++++++
2 files changed, 51 insertions(+), 0 deletions(-)
diff --git a/arch/sh/include/cpu-sh4/cpu/sh7757.h b/arch/sh/include/cpu-sh4/cpu/sh7757.h
index 41f9f8b..f9be40a 100644
--- a/arch/sh/include/cpu-sh4/cpu/sh7757.h
+++ b/arch/sh/include/cpu-sh4/cpu/sh7757.h
@@ -283,5 +283,6 @@ enum {
SHDMA_SLAVE_RIIC8_RX,
SHDMA_SLAVE_RIIC9_TX,
SHDMA_SLAVE_RIIC9_RX,
+ SHDMA_SLAVE_SUDMAC00,
};
#endif /* __ASM_SH7757_H__ */
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
index cf2667a..f8adc26 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
@@ -665,6 +665,55 @@ static struct platform_device dma3_device = {
},
};
+/* SUDMAC */
+static const struct sh_dmae_channel sh7757_sudmac_channel[] = {
+ {
+ .offset = 0,
+ .dmars = 0,
+ .dmars_bit = 0,
+ }
+};
+
+static const struct sh_dmae_slave_config sh7757_sudmac00_slaves[] = {
+ {
+ .slave_id = SHDMA_SLAVE_SUDMAC00,
+ .addr = 0xfe451000,
+ },
+};
+
+static struct sh_dmae_pdata sudmac00_platform_data = {
+ .slave = sh7757_sudmac00_slaves,
+ .slave_num = ARRAY_SIZE(sh7757_sudmac00_slaves),
+ .channel = sh7757_sudmac_channel,
+ .channel_num = 1,
+ .no_dmars = 1,
+ .sudmac = 1,
+};
+
+static struct resource sh7757_sudmac00_resources[] = {
+ [0] = {
+ .start = 0xfe451000,
+ .end = 0xfe451000,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = SH_DMA_IRQ_CHANNEL,
+ .start = 50,
+ .end = 50,
+ .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
+ },
+};
+
+static struct platform_device sudmac00_device = {
+ .name = "sh-dma-engine",
+ .id = 4,
+ .resource = sh7757_sudmac00_resources,
+ .num_resources = ARRAY_SIZE(sh7757_sudmac00_resources),
+ .dev = {
+ .platform_data = &sudmac00_platform_data,
+ },
+};
+
static struct platform_device spi0_device = {
.name = "sh_spi",
.id = 0,
@@ -734,6 +783,7 @@ static struct platform_device *sh7757_devices[] __initdata = {
&dma1_device,
&dma2_device,
&dma3_device,
+ &sudmac00_device,
&spi0_device,
&usb_ehci_device,
&usb_ohci_device,
--
1.7.1
^ permalink raw reply related
* [PATCH v3 2/2] sh: enable the SUDMAC of renesas_usbhs in board-sh7757lcr
From: Shimoda, Yoshihiro @ 2012-01-11 7:28 UTC (permalink / raw)
To: linux-sh
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
---
about v3:
- No change
arch/sh/boards/board-sh7757lcr.c | 4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/arch/sh/boards/board-sh7757lcr.c b/arch/sh/boards/board-sh7757lcr.c
index 0838154..40872e8 100644
--- a/arch/sh/boards/board-sh7757lcr.c
+++ b/arch/sh/boards/board-sh7757lcr.c
@@ -276,6 +276,8 @@ static struct renesas_usbhs_platform_info usb0_data = {
},
.driver_param = {
.buswait_bwait = 5,
+ .d0_tx_id = SHDMA_SLAVE_SUDMAC00,
+ .has_sudmac = 1,
}
};
@@ -288,7 +290,7 @@ static struct resource usb0_resources[] = {
[1] = {
.start = 50,
.end = 50,
- .flags = IORESOURCE_IRQ,
+ .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
},
};
--
1.7.1
^ permalink raw reply related
* Re: MMCIF support on sh7757lcr
From: Guennadi Liakhovetski @ 2012-01-11 8:24 UTC (permalink / raw)
To: linux-sh
In-Reply-To: <Pine.LNX.4.64.1201101646050.530@axis700.grange>
On Wed, 11 Jan 2012, Shimoda, Yoshihiro wrote:
> Hello Guennadi-san,
>
> Thank you for your review.
>
> 2012/01/11 0:55, Guennadi Liakhovetski wrote:
> > Hello Shimoda-san
> >
> > While reviewing MMCIF platform bindings, I came across your commit
> >
> > commit 65f63eab38626a79f8a54d13686680a1ea898f72
> > Author: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> > Date: Fri Feb 25 07:40:27 2011 +0000
> >
> > sh: add platform_device of tmio_mmc and sh_mmcif to sh7757lcr
> >
> > There you only specify MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA
> > capabilities for MMCIF. The MMCIF controller does not have any native
> > support for card hotplug detection, therefore it must either be polled, or
> > the card has to be marked non-removable. For polling it is also desired to
> > provide a .get_cd() method. Neither of these is done for sh7757lcr. Is the
> > MMC card on it removable? If so, is there any way to detect card presence
> > in the slot?
>
> This board doesn't have the MMC card slot. A MMC chip is on the board,
> so we cannot remove the chip.
> In the linux-3.2-rc7, the sh7757lcr can detect the MMC chip and
> I can see the "mmcblk" device.
Right, it is detected upon driver initialisation, but id it were a normal
slot, card ejects and inserts wouldn't be recognised. In this case we have
to specify MMC_CAP_NONREMOVABLE among controller sapabilities:
static struct sh_mmcif_plat_data sh_mmcif_plat = {
...
.caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA |
MMC_CAP_NONREMOVABLE,
Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.
Freelance Open-Source Software Developer
http://www.open-technology.de/
^ permalink raw reply
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