* How does an UNEXPECTED_IO_APIC happen?
@ 2003-04-17 12:58 Earle R. Nietzel
2003-04-17 17:16 ` Randy.Dunlap
0 siblings, 1 reply; 2+ messages in thread
From: Earle R. Nietzel @ 2003-04-17 12:58 UTC (permalink / raw)
To: linux-smp
How does an UNEXPECTED_IO_APIC happen?
(as of 2.4.20)
Probably everyone has seen this common message among who has new
hardware or
hardware that is not very common.
"An unexpected IO-APIC was found."
The most common questions that are askes as a result are:
Many people will ask what does this mean? Is something broke? Is my
system not stable because of this? Does this affect my performance? How
can I fix this?
To answer all of those questions with just one answer:
This message does not identify that something is broke, or that a system
is unstable, or that it could affect your performance what it does do is
allow kernel programmers (most likely Ingo Molnar) to see what types of
hardware (motherboards) are out there and to create a known list (the
vanilla list).
How does your hardware get onto the list?
That I do not know and the maintainer (Ingo Molnar) would be the person
to ask.
How does an UNEXPECTED_IO_APIC happen?
The IO_APIC is read into 3 structures that are each 32 bits (u32) and
are packed with different fields:
register#00 = 0x02000000
|||-----
rIr
eDe
s s
1 2
res1 is 4 bits (reserved)
ID is 4 bits
res2 is the remaining 24 bits (reserved)
register#01 = 0x00178020
|-|-|-|-
r e Prv
e n Ree
s t Qsr
1 r 2s
i i
e o
s n
res1 is 8 bits (reserved)
entries is 8 bits
*PRQ is 1 bit (the 16th bit)
*res2 is 7 bits (reserved)
version is 8 bits
(*PRQ and reserved make up 8 bits with PRQ being the first)
register#02 = 0x00000000
|||-----
rar
ere
sbs
1i2
t
r
a
t
i
o
n
res1 is 4 bits (reserved)
arbitration is 4 bits
res2 is the remaining 24 bits (reserved)
After reading each IO_APIC they are examined, for example:
On my SuperMicro X5DAE (Dual Xeon 2.4G, Intel E7505):
IO APIC #2......
.... register #00: 02000000
....... : physical APIC id: 02
.... register #01: 00178020
....... : max redirection entries: 0017
....... : PRQ implemented: 1
....... : IO APIC version: 0020
.... register #02: 00000000
....... : arbitration: 00
IO APIC #3......
.... register #00: 03000000
....... : physical APIC id: 03
.... register #01: 00178020
....... : max redirection entries: 0017
....... : PRQ implemented: 1
....... : IO APIC version: 0020
.... register #02: 03000000
....... : arbitration: 03
IO APIC #4......
.... register #00: 04000000
....... : physical APIC id: 04
.... register #01: 00178020
....... : max redirection entries: 0017
....... : PRQ implemented: 1
....... : IO APIC version: 0020
.... register #02: 04000000
....... : arbitration: 04
The rules for generating an UNEXPECTED_IO_APIC are:
1)If any value other than 0 is found in the reserved bit areas (res1 ||
res2) of the 3 registers it is considered an unexpected IO_APIC.
2)In register#01 if the entries field contains any other value except:
0x0f (older (Neptune) boards)
0x17 (typical ISA+PCI boards)
0x1b (Compaq Proliant boards)
0x1f (dual Xeon boards)
0x22 (bigger Xeon boards)
0x2E (?)
0x3F (?)
3)In register#01 if the version field contains any other value except:
0x01 (82489DX IO-APICs)
0x02 (VIA)
0x10 (oldest IO-APICs)
0x11 (Pentium/Pro IO-APICs)
0x13 (Xeon IO-APICs)
0x20 (Intel P64H [82806 AA])
--
Earle R. Nietzel <nietzel@rhinobox.org>
^ permalink raw reply [flat|nested] 2+ messages in thread* Re: How does an UNEXPECTED_IO_APIC happen?
2003-04-17 12:58 How does an UNEXPECTED_IO_APIC happen? Earle R. Nietzel
@ 2003-04-17 17:16 ` Randy.Dunlap
0 siblings, 0 replies; 2+ messages in thread
From: Randy.Dunlap @ 2003-04-17 17:16 UTC (permalink / raw)
To: Earle R. Nietzel; +Cc: linux-smp
Hi Earle,
Good job. This should be added to the linux-smp FAQ, but I can't
find it's URL just now.
I've asked the (latest) maintainer about its location...if any.
I have a few corrections below if you want them.
On 17 Apr 2003 14:58:01 +0200 "Earle R. Nietzel" <nietzel@rhinobox.org> wrote:
| How does an UNEXPECTED_IO_APIC happen?
| (as of 2.4.20)
|
| Probably everyone has seen this common message among who has new
* among those who have new
| hardware or hardware that is not very common.
|
| "An unexpected IO-APIC was found."
|
| The most common questions that are askes as a result are:
* asked
| Many people will ask what does this mean? Is something broke? Is my
| system not stable because of this? Does this affect my performance? How
| can I fix this?
|
| To answer all of those questions with just one answer:
| This message does not identify that something is broke, or that a system
* broken,
| is unstable, or that it could affect your performance what it does do is
* performance. What
| allow kernel programmers (most likely Ingo Molnar) to see what types of
| hardware (motherboards) are out there and to create a known list (the
| vanilla list).
* or white list).
|
| How does your hardware get onto the list?
| That I do not know and the maintainer (Ingo Molnar) would be the person
| to ask.
[I have added some entries to the white list. Probably Alan has also.
Probably MKP(?) also. For me it's just a matter of having hard data,
preferably chipset specs, to validate/verify the devices.]
| How does an UNEXPECTED_IO_APIC happen?
|
| The IO_APIC is read into 3 structures that are each 32 bits (u32) and
| are packed with different fields:
|
|
| register#00 = 0x02000000
| |||-----
| rIr
| eDe
| s s
| 1 2
|
| res1 is 4 bits (reserved)
| ID is 4 bits
| res2 is the remaining 24 bits (reserved)
|
|
| register#01 = 0x00178020
| |-|-|-|-
| r e Prv
| e n Ree
| s t Qsr
| 1 r 2s
| i i
| e o
| s n
|
| res1 is 8 bits (reserved)
| entries is 8 bits
| *PRQ is 1 bit (the 16th bit)
* (bit 15)
[since the bits are numbered from the right/low-order side or end
and begin with 0]
| *res2 is 7 bits (reserved)
| version is 8 bits
|
| (*PRQ and reserved make up 8 bits with PRQ being the first)
|
|
| register#02 = 0x00000000
| |||-----
| rar
| ere
| sbs
| 1i2
| t
| r
| a
| t
| i
| o
| n
|
| res1 is 4 bits (reserved)
| arbitration is 4 bits
| res2 is the remaining 24 bits (reserved)
|
|
| After reading each IO_APIC they are examined, for example:
| On my SuperMicro X5DAE (Dual Xeon 2.4G, Intel E7505):
|
| IO APIC #2......
| .... register #00: 02000000
| ....... : physical APIC id: 02
| .... register #01: 00178020
| ....... : max redirection entries: 0017
| ....... : PRQ implemented: 1
| ....... : IO APIC version: 0020
| .... register #02: 00000000
| ....... : arbitration: 00
...
|
| The rules for generating an UNEXPECTED_IO_APIC are:
|
| 1)If any value other than 0 is found in the reserved bit areas (res1 ||
| res2) of the 3 registers it is considered an unexpected IO_APIC.
|
| 2)In register#01 if the entries field contains any other value except:
* any value other than:
| 0x0f (older (Neptune) boards)
| 0x17 (typical ISA+PCI boards)
| 0x1b (Compaq Proliant boards)
| 0x1f (dual Xeon boards)
| 0x22 (bigger Xeon boards)
| 0x2E (?)
| 0x3F (?)
|
| 3)In register#01 if the version field contains any other value except:
* any value other than:
| 0x01 (82489DX IO-APICs)
| 0x02 (VIA)
| 0x10 (oldest IO-APICs)
| 0x11 (Pentium/Pro IO-APICs)
| 0x13 (Xeon IO-APICs)
| 0x20 (Intel P64H [82806 AA])
|
| --
--
~Randy
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2003-04-17 17:16 ` Randy.Dunlap
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