* All Interrupts going to CPU0
@ 2003-06-14 9:13 Earle R. Nietzel
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From: Earle R. Nietzel @ 2003-06-14 9:13 UTC (permalink / raw)
To: linux-smp
Andrew Morton wrote:
That is a deliberate part of the new interrupt balancing code.
If the interrupt rate is low, it is better to keep all the interrupt
processing code and data in the cache of a single CPU.
It is only if that CPU starts to run out of steam that it is worthwhile
taking the hit of getting other CPUs to service interrupts as well.
(I think. At least, it sounds good and the benchmarks came out well).
--
Does any one know if this made it into the 2.4 kernels? I am
experiencing all interrupts going to CPU0 also on 2.4.20-13.9smp.
CPU0 CPU1
0: 244951 0 IO-APIC-edge timer
1: 1036 0 IO-APIC-edge keyboard
2: 0 0 XT-PIC cascade
8: 1 0 IO-APIC-edge rtc
12: 88125 0 IO-APIC-edge PS/2 Mouse
14: 16820 0 IO-APIC-edge ide0
15: 66284 1 IO-APIC-edge ide1
16: 556 0 IO-APIC-level usb-uhci
17: 6336 0 IO-APIC-level Intel 82801DB-ICH4
18: 0 0 IO-APIC-level usb-uhci
19: 0 0 IO-APIC-level usb-uhci
21: 205100 0 IO-APIC-level nvidia
23: 0 0 IO-APIC-level ehci-hcd
54: 3796 0 IO-APIC-level eth0
NMI: 0 0
LOC: 244868 244879
ERR: 0
MIS: 0
--
Earle R. Nietzel <nietzel@rhinobox.org>
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