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From: noamca@mellanox.com (Noam Camus)
To: linux-snps-arc@lists.infradead.org
Subject: [PATCH v3 11/11] ARC: [plat-eznps] avoid toggling of DPC register
Date: Thu, 15 Jun 2017 11:44:01 +0300	[thread overview]
Message-ID: <1497516241-16446-12-git-send-email-noamca@mellanox.com> (raw)
In-Reply-To: <1497516241-16446-1-git-send-email-noamca@mellanox.com>

From: Elad Kanfi <eladkan@mellanox.com>

HW bug description: in case of HW thread context switch
the dpc configuration of the exiting thread is dragged
one cycle into the next thread.
In order to avoid the consequences of this bug, the DPC register
is set to an initial value, and not changed afterwards.

Signed-off-by: Elad Kanfi <eladkan at mellanox.com>
Signed-off-by: Noam Camus <noamca at mellanox.com>
---
 arch/arc/plat-eznps/include/plat/ctop.h |    1 +
 arch/arc/plat-eznps/mtm.c               |   12 ++++++++++++
 2 files changed, 13 insertions(+), 0 deletions(-)

diff --git a/arch/arc/plat-eznps/include/plat/ctop.h b/arch/arc/plat-eznps/include/plat/ctop.h
index 7729d3d..0c7d110 100644
--- a/arch/arc/plat-eznps/include/plat/ctop.h
+++ b/arch/arc/plat-eznps/include/plat/ctop.h
@@ -39,6 +39,7 @@
 #define CTOP_AUX_LOGIC_CORE_ID			(CTOP_AUX_BASE + 0x018)
 #define CTOP_AUX_MT_CTRL			(CTOP_AUX_BASE + 0x020)
 #define CTOP_AUX_HW_COMPLY			(CTOP_AUX_BASE + 0x024)
+#define CTOP_AUX_DPC				(CTOP_AUX_BASE + 0x02C)
 #define CTOP_AUX_LPC				(CTOP_AUX_BASE + 0x030)
 #define CTOP_AUX_EFLAGS				(CTOP_AUX_BASE + 0x080)
 #define CTOP_AUX_IACK				(CTOP_AUX_BASE + 0x088)
diff --git a/arch/arc/plat-eznps/mtm.c b/arch/arc/plat-eznps/mtm.c
index 9c78ad6..909bbd4 100644
--- a/arch/arc/plat-eznps/mtm.c
+++ b/arch/arc/plat-eznps/mtm.c
@@ -110,6 +110,18 @@ void mtm_enable_core(unsigned int cpu)
 	int i;
 	struct nps_host_reg_aux_mt_ctrl mt_ctrl;
 	struct nps_host_reg_mtm_cfg mtm_cfg;
+	struct nps_host_reg_aux_dpc dpc;
+
+	/*
+	 * Initializing dpc register in each CPU.
+	 * Overwriting the init value of the DPC
+	 * register so that CMEM and FMT virtual address
+	 * spaces are accessible, and Data Plane HW
+	 * facilities are enabled.
+	 */
+	dpc.ien = 1;
+	dpc.men = 1;
+	write_aux_reg(CTOP_AUX_DPC, dpc.value);
 
 	if (NPS_CPU_TO_THREAD_NUM(cpu) != 0)
 		return;
-- 
1.7.1

      parent reply	other threads:[~2017-06-15  8:44 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-15  8:43 [PATCH v3 00/11] plat-eznps upstream cont. set 2 Noam Camus
2017-06-15  8:43 ` [PATCH v3 01/11] ARC: set level of log per CPU during boot to be info level Noam Camus
2017-06-15  8:43 ` [PATCH v3 02/11] ARC: send ipi to all cpus sharing task mm in case of page fault Noam Camus
2017-06-15  8:43 ` [PATCH v3 03/11] ARC: Allow irq threading Noam Camus
2017-08-25 20:45   ` Vineet Gupta
2017-08-25 20:59     ` Thomas Gleixner
2017-08-25 21:02       ` Thomas Gleixner
2017-06-15  8:43 ` [PATCH v3 04/11] ARC: Add CPU topology Noam Camus
2017-06-15  8:43 ` [PATCH v3 05/11] ARC: Support more than one PGDIR for KVADDR Noam Camus
2017-06-15  8:43 ` [PATCH v3 06/11] ARC: [NUMA] added CONFIG_NUMA for plat-eznps Noam Camus
2017-06-15  8:43 ` [PATCH v3 07/11] ARC: [plat-eznps] new command line argument for HW scheduler at MTM Noam Camus
2017-08-21 17:04   ` Vineet Gupta
2017-08-22  6:16     ` Noam Camus
2017-06-15  8:43 ` [PATCH v3 08/11] ARC: [plat-eznps] Update the init sequence of aux regs per cpu Noam Camus
2017-06-15  8:43 ` [PATCH v3 09/11] ARC: [plat-eznps] Save/Restore extra auxiliary registers Noam Camus
2017-06-15  8:44 ` [PATCH v3 10/11] ARC: [plat-eznps] handle dedicated AUX registers Noam Camus
2017-06-15  8:44 ` Noam Camus [this message]

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