* [PATCH] ARC: Enable automatic support for newer ARC ISA variants (ARCv3)
@ 2021-02-23 2:37 Vineet Gupta
2021-02-23 20:14 ` Dmitry V. Levin
0 siblings, 1 reply; 2+ messages in thread
From: Vineet Gupta @ 2021-02-23 2:37 UTC (permalink / raw)
To: strace-devel; +Cc: Vineet Gupta, linux-snps-arc
The syscall TRAP instruction used to be 4 bytes on legacy ARCompact
based ARC700 cores. Since then ARCv2 (circa 2014) and the upcoming ARCv3
use the same 2-byte TRAP_S instruction.
To ease porting of software to new ISA, special case ARC700.
This is the only change needed to get strace working on 64-bit ARCv3
cores (kudos to strace for making porting so easy)
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
---
src/linux/arc/raw_syscall.h | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/src/linux/arc/raw_syscall.h b/src/linux/arc/raw_syscall.h
index 6e60a6112b31..f54fe06f33df 100644
--- a/src/linux/arc/raw_syscall.h
+++ b/src/linux/arc/raw_syscall.h
@@ -21,10 +21,8 @@ raw_syscall_0(const kernel_ulong_t nr, kernel_ulong_t *err)
# ifdef __A7__
# define ARC_TRAP_INSN "trap0"
-# elif defined __HS__
-# define ARC_TRAP_INSN "trap_s 0 "
# else
-# error unrecognized arc
+# define ARC_TRAP_INSN "trap_s 0 "
# endif
__asm__ __volatile__(ARC_TRAP_INSN
--
2.25.1
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^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] ARC: Enable automatic support for newer ARC ISA variants (ARCv3)
2021-02-23 2:37 [PATCH] ARC: Enable automatic support for newer ARC ISA variants (ARCv3) Vineet Gupta
@ 2021-02-23 20:14 ` Dmitry V. Levin
0 siblings, 0 replies; 2+ messages in thread
From: Dmitry V. Levin @ 2021-02-23 20:14 UTC (permalink / raw)
To: Vineet Gupta; +Cc: linux-snps-arc, strace-devel
On Mon, Feb 22, 2021 at 06:37:54PM -0800, Vineet Gupta wrote:
> The syscall TRAP instruction used to be 4 bytes on legacy ARCompact
> based ARC700 cores. Since then ARCv2 (circa 2014) and the upcoming ARCv3
> use the same 2-byte TRAP_S instruction.
>
> To ease porting of software to new ISA, special case ARC700.
>
> This is the only change needed to get strace working on 64-bit ARCv3
> cores (kudos to strace for making porting so easy)
>
> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
> ---
> src/linux/arc/raw_syscall.h | 4 +---
> 1 file changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/src/linux/arc/raw_syscall.h b/src/linux/arc/raw_syscall.h
> index 6e60a6112b31..f54fe06f33df 100644
> --- a/src/linux/arc/raw_syscall.h
> +++ b/src/linux/arc/raw_syscall.h
> @@ -21,10 +21,8 @@ raw_syscall_0(const kernel_ulong_t nr, kernel_ulong_t *err)
>
> # ifdef __A7__
> # define ARC_TRAP_INSN "trap0"
> -# elif defined __HS__
> -# define ARC_TRAP_INSN "trap_s 0 "
> # else
> -# error unrecognized arc
> +# define ARC_TRAP_INSN "trap_s 0 "
> # endif
>
> __asm__ __volatile__(ARC_TRAP_INSN
Applied, thanks.
--
ldv
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2021-02-23 20:14 ` Dmitry V. Levin
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