From: Cezary Rojewski <cezary.rojewski@intel.com>
To: broonie@kernel.org
Cc: linux-sound@vger.kernel.org, tiwai@suse.com, perex@perex.cz,
amadeuszx.slawinski@linux.intel.com,
Cezary Rojewski <cezary.rojewski@intel.com>
Subject: [PATCH 11/13] ASoC: Intel: avs: Adjust DSP status register names
Date: Thu, 9 Jan 2025 13:22:14 +0100 [thread overview]
Message-ID: <20250109122216.3667847-12-cezary.rojewski@intel.com> (raw)
In-Reply-To: <20250109122216.3667847-1-cezary.rojewski@intel.com>
Both status and error are "codes". Update the wording to make code
cohesive.
Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
---
sound/soc/intel/avs/loader.c | 12 ++++++------
sound/soc/intel/avs/registers.h | 2 +-
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/sound/soc/intel/avs/loader.c b/sound/soc/intel/avs/loader.c
index b3ea35d267e9..9ff7818395cd 100644
--- a/sound/soc/intel/avs/loader.c
+++ b/sound/soc/intel/avs/loader.c
@@ -168,7 +168,7 @@ int avs_cldma_load_basefw(struct avs_dev *adev, struct firmware *fw)
AVS_ROM_INIT_POLLING_US, SKL_ROM_INIT_TIMEOUT_US);
if (ret < 0) {
dev_err(adev->dev, "rom init failed: %d, status: 0x%08x, lec: 0x%08x\n",
- ret, reg, snd_hdac_adsp_readl(adev, AVS_FW_REG_ERROR_CODE(adev)));
+ ret, reg, snd_hdac_adsp_readl(adev, AVS_FW_REG_ERROR(adev)));
avs_dsp_core_disable(adev, AVS_MAIN_CORE_MASK);
return ret;
}
@@ -182,7 +182,7 @@ int avs_cldma_load_basefw(struct avs_dev *adev, struct firmware *fw)
hda_cldma_stop(cl);
if (ret < 0) {
dev_err(adev->dev, "transfer fw failed: %d, status: 0x%08x, lec: 0x%08x\n",
- ret, reg, snd_hdac_adsp_readl(adev, AVS_FW_REG_ERROR_CODE(adev)));
+ ret, reg, snd_hdac_adsp_readl(adev, AVS_FW_REG_ERROR(adev)));
avs_dsp_core_disable(adev, AVS_MAIN_CORE_MASK);
return ret;
}
@@ -316,7 +316,7 @@ avs_hda_init_rom(struct avs_dev *adev, unsigned int dma_id, bool purge)
AVS_ROM_INIT_POLLING_US, APL_ROM_INIT_TIMEOUT_US);
if (ret < 0) {
dev_err(adev->dev, "rom init failed: %d, status: 0x%08x, lec: 0x%08x\n",
- ret, reg, snd_hdac_adsp_readl(adev, AVS_FW_REG_ERROR_CODE(adev)));
+ ret, reg, snd_hdac_adsp_readl(adev, AVS_FW_REG_ERROR(adev)));
goto err;
}
@@ -348,7 +348,7 @@ static int avs_imr_load_basefw(struct avs_dev *adev)
if (!ret) {
dev_err(adev->dev, "firmware ready timeout, status: 0x%08x, lec: 0x%08x\n",
snd_hdac_adsp_readl(adev, AVS_FW_REG_STATUS(adev)),
- snd_hdac_adsp_readl(adev, AVS_FW_REG_ERROR_CODE(adev)));
+ snd_hdac_adsp_readl(adev, AVS_FW_REG_ERROR(adev)));
avs_dsp_core_disable(adev, AVS_MAIN_CORE_MASK);
return -ETIMEDOUT;
}
@@ -408,7 +408,7 @@ int avs_hda_load_basefw(struct avs_dev *adev, struct firmware *fw)
snd_hdac_dsp_trigger(hstream, false);
if (ret < 0) {
dev_err(adev->dev, "transfer fw failed: %d, status: 0x%08x, lec: 0x%08x\n",
- ret, reg, snd_hdac_adsp_readl(adev, AVS_FW_REG_ERROR_CODE(adev)));
+ ret, reg, snd_hdac_adsp_readl(adev, AVS_FW_REG_ERROR(adev)));
avs_dsp_core_disable(adev, AVS_MAIN_CORE_MASK);
}
@@ -590,7 +590,7 @@ static int avs_dsp_load_basefw(struct avs_dev *adev)
if (!ret) {
dev_err(adev->dev, "firmware ready timeout, status: 0x%08x, lec: 0x%08x\n",
snd_hdac_adsp_readl(adev, AVS_FW_REG_STATUS(adev)),
- snd_hdac_adsp_readl(adev, AVS_FW_REG_ERROR_CODE(adev)));
+ snd_hdac_adsp_readl(adev, AVS_FW_REG_ERROR(adev)));
avs_dsp_core_disable(adev, AVS_MAIN_CORE_MASK);
ret = -ETIMEDOUT;
goto release_fw;
diff --git a/sound/soc/intel/avs/registers.h b/sound/soc/intel/avs/registers.h
index f76e91cff2a9..64afd56b1897 100644
--- a/sound/soc/intel/avs/registers.h
+++ b/sound/soc/intel/avs/registers.h
@@ -74,7 +74,7 @@
/* Constants used when accessing SRAM, space shared with firmware */
#define AVS_FW_REG_BASE(adev) ((adev)->spec->sram->base_offset)
#define AVS_FW_REG_STATUS(adev) (AVS_FW_REG_BASE(adev) + 0x0)
-#define AVS_FW_REG_ERROR_CODE(adev) (AVS_FW_REG_BASE(adev) + 0x4)
+#define AVS_FW_REG_ERROR(adev) (AVS_FW_REG_BASE(adev) + 0x4)
#define AVS_WINDOW_CHUNK_SIZE SZ_4K
#define AVS_FW_REGS_SIZE AVS_WINDOW_CHUNK_SIZE
--
2.25.1
next prev parent reply other threads:[~2025-01-09 12:08 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-09 12:22 [PATCH 00/13] ASoC: Intel: avs: Fixes and cleanups Cezary Rojewski
2025-01-09 12:22 ` [PATCH 01/13] ASoC: Intel: avs: Do not readq() u32 registers Cezary Rojewski
2025-01-09 12:22 ` [PATCH 02/13] ASoC: Intel: avs: Fix the minimum firmware version numbers Cezary Rojewski
2025-01-09 12:22 ` [PATCH 03/13] ASoC: Intel: avs: Fix theoretical infinite loop Cezary Rojewski
2025-01-09 12:22 ` [PATCH 04/13] ASoC: Intel: avs: Fix init-config parsing Cezary Rojewski
2025-01-09 12:22 ` [PATCH 05/13] ASoC: Intel: avs: Update hda component teardown sequences Cezary Rojewski
2025-01-09 12:22 ` [PATCH 06/13] ASoC: Intel: avs: Print IPC error messages in lower layer Cezary Rojewski
2025-01-09 12:22 ` [PATCH 07/13] ASoC: Intel: avs: Add MODULE_FIRMWARE to inform about FW Cezary Rojewski
2025-01-10 18:09 ` Pierre-Louis Bossart
2025-01-13 9:41 ` Cezary Rojewski
2025-01-17 15:59 ` Pierre-Louis Bossart
2025-01-21 8:39 ` Cezary Rojewski
2025-01-09 12:22 ` [PATCH 08/13] ASoC: Intel: avs: Clearly state assumptions of hw_params() Cezary Rojewski
2025-01-09 12:22 ` [PATCH 09/13] ASoC: Intel: avs: Improve logging of firmware loading Cezary Rojewski
2025-01-09 12:22 ` [PATCH 10/13] ASoC: Intel: avs: Update ASRC definition Cezary Rojewski
2025-01-09 12:22 ` Cezary Rojewski [this message]
2025-01-09 12:22 ` [PATCH 12/13] ASoC: Intel: avs: Adjust IPC traces Cezary Rojewski
2025-01-09 12:22 ` [PATCH 13/13] ASoC: Intel: avs: Add missing includes Cezary Rojewski
2025-01-09 16:40 ` [PATCH 00/13] ASoC: Intel: avs: Fixes and cleanups Mark Brown
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