[PATCH v2 0/6] Subject: [PATCH 0/6] Add audio support for QCS6490 Thundercomm RubikPi3

[PATCH v2 0/6] Subject: [PATCH 0/6] Add audio support for QCS6490 Thundercomm RubikPi3

[Hongyang Zhao]

This series adds audio support for the Thundercomm RubikPi3 board
(QCS6490-based) using AudioReach.

The changes include:
- Document the missing everest,jack-detect-inverted DT binding property
  for the ES8316 codec
- Improve the ES8316 codec driver to auto-detect sysclk from MCLK when
  not explicitly set
- Add MCLK clock IDs to the QDSP6 PRM clock driver
- Enable MI2S jack detection in the Qualcomm common sound driver
- Set codec DAI format for MI2S links in the sc8280xp machine driver
- Add DTS nodes for audio on RubikPi3

Currently only headphone playback and recording via ES8316 have been
validated. HDMI audio and 40-pin I2S are not yet functional due to
upstream LPASS MI2S channel support still being a work in progress.

Signed-off-by: Hongyang Zhao <hongyang.zhao@thundersoft.com>
---
Changes in v2:
- Move the retrieval of the mclk rate for the es8316 codec to the es8316_probe() function
- Drop [PATCH 3/6] ASoC: qdsp6: q6prm: Add MCLK and internal digital codec core clock IDs
  and use the patches previously sent by Neil instead: https://lkml.org/lkml/2025/10/6/828
- Modify the device tree:
    1. Swap the positions of the spdif_tx and spdif_rx nodes.
    2. Adjust the order of properties under the sound node and add necessary blank lines.
    3. Merge gpios with the same configuration into a single node: lpass_qua_mi2s_data
    4. Change es8316: es8316@11 to es8316: audio-codec@11
- Link to v1: https://lore.kernel.org/r/20260305-rubikpi-next-20260304-v1-0-327595a4528a@thundersoft.com

---
Hongyang Zhao (6):
      ASoC: dt-bindings: es8316: Document everest,jack-detect-inverted property
      ASoC: es8316: Get sysclk rate from MCLK clock when not explicitly set
      ASoC: qcom: qdsp6: q6prm: add the missing MCLK clock IDs
      ASoC: qcom: common: Add MI2S port IDs to jack setup
      ASoC: qcom: sc8280xp: Set codec DAI format for MI2S links
      arm64: dts: qcom: qcs6490-rubikpi3: Add audio support

 .../devicetree/bindings/sound/everest,es8316.yaml  |   5 +
 .../boot/dts/qcom/qcs6490-thundercomm-rubikpi3.dts | 191 +++++++++++++++++++++
 sound/soc/codecs/es8316.c                          |   3 +
 sound/soc/qcom/common.c                            |   2 +
 sound/soc/qcom/qdsp6/q6prm-clocks.c                |   5 +
 sound/soc/qcom/qdsp6/q6prm.h                       |  11 ++
 sound/soc/qcom/sc8280xp.c                          |   4 +
 7 files changed, 221 insertions(+)
---
base-commit: fc7b1a72c6cd5cbbd989c6c32a6486e3e4e3594d
change-id: 20260305-rubikpi-next-20260304-7f91c9380dee

Best regards,
-- 
Hongyang Zhao <hongyang.zhao@thundersoft.com>

[PATCH v2 1/6] ASoC: dt-bindings: es8316: Document everest,jack-detect-inverted property

[Hongyang Zhao]

The es8316 codec driver already supports the everest,jack-detect-inverted
property to invert the jack detection logic, but it was not documented in
the devicetree binding. Add the missing property documentation.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Hongyang Zhao <hongyang.zhao@thundersoft.com>
---
 Documentation/devicetree/bindings/sound/everest,es8316.yaml | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/Documentation/devicetree/bindings/sound/everest,es8316.yaml b/Documentation/devicetree/bindings/sound/everest,es8316.yaml
index fe5d938ca310..a0a4c1c99cf3 100644
--- a/Documentation/devicetree/bindings/sound/everest,es8316.yaml
+++ b/Documentation/devicetree/bindings/sound/everest,es8316.yaml
@@ -60,6 +60,11 @@ properties:
   "#sound-dai-cells":
     const: 0
 
+  everest,jack-detect-inverted:
+    $ref: /schemas/types.yaml#/definitions/flag
+    description:
+      Defined to invert the jack detection.
+
 required:
   - compatible
   - reg

-- 
2.43.0

[PATCH v2 2/6] ASoC: es8316: Get sysclk rate from MCLK clock when not explicitly set

[Hongyang Zhao]

When the sysclk has not been set via set_sysclk(), try to get the clock
rate from the MCLK clock provider. This is useful when the codec's MCLK
is managed by an external clock controller and the machine driver does
not explicitly call set_sysclk().

Signed-off-by: Hongyang Zhao <hongyang.zhao@thundersoft.com>
---
 sound/soc/codecs/es8316.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/sound/soc/codecs/es8316.c b/sound/soc/codecs/es8316.c
index 9245c33700de..3889cb36a654 100644
--- a/sound/soc/codecs/es8316.c
+++ b/sound/soc/codecs/es8316.c
@@ -774,6 +774,9 @@ static int es8316_probe(struct snd_soc_component *component)
 		return ret;
 	}
 
+	if (es8316->mclk)
+		es8316->sysclk = clk_get_rate(es8316->mclk);
+
 	/* Reset codec and enable current state machine */
 	snd_soc_component_write(component, ES8316_RESET, 0x3f);
 	usleep_range(5000, 5500);

-- 
2.43.0

[PATCH v2 3/6] ASoC: qcom: qdsp6: q6prm: add the missing MCLK clock IDs

[Hongyang Zhao]

Add the missing MCLK ids for the q6prm DSP interface.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
 sound/soc/qcom/qdsp6/q6prm-clocks.c |  5 +++++
 sound/soc/qcom/qdsp6/q6prm.h        | 11 +++++++++++
 2 files changed, 16 insertions(+)

diff --git a/sound/soc/qcom/qdsp6/q6prm-clocks.c b/sound/soc/qcom/qdsp6/q6prm-clocks.c
index 4c574b48ab00..51b131fa9531 100644
--- a/sound/soc/qcom/qdsp6/q6prm-clocks.c
+++ b/sound/soc/qcom/qdsp6/q6prm-clocks.c
@@ -42,6 +42,11 @@ static const struct q6dsp_clk_init q6prm_clks[] = {
 	Q6PRM_CLK(LPASS_CLK_ID_INT5_MI2S_IBIT),
 	Q6PRM_CLK(LPASS_CLK_ID_INT6_MI2S_IBIT),
 	Q6PRM_CLK(LPASS_CLK_ID_QUI_MI2S_OSR),
+	Q6PRM_CLK(LPASS_CLK_ID_MCLK_1),
+	Q6PRM_CLK(LPASS_CLK_ID_MCLK_2),
+	Q6PRM_CLK(LPASS_CLK_ID_MCLK_3),
+	Q6PRM_CLK(LPASS_CLK_ID_MCLK_4),
+	Q6PRM_CLK(LPASS_CLK_ID_MCLK_5),
 	Q6PRM_CLK(LPASS_CLK_ID_WSA_CORE_MCLK),
 	Q6PRM_CLK(LPASS_CLK_ID_WSA_CORE_NPL_MCLK),
 	Q6PRM_CLK(LPASS_CLK_ID_VA_CORE_MCLK),
diff --git a/sound/soc/qcom/qdsp6/q6prm.h b/sound/soc/qcom/qdsp6/q6prm.h
index a988a32086fe..7a3f2ad7bbd4 100644
--- a/sound/soc/qcom/qdsp6/q6prm.h
+++ b/sound/soc/qcom/qdsp6/q6prm.h
@@ -52,6 +52,17 @@
 /* Clock ID for QUINARY MI2S OSR CLK  */
 #define Q6PRM_LPASS_CLK_ID_QUI_MI2S_OSR                         0x116
 
+/* Clock ID for MCLK1 */
+#define Q6PRM_LPASS_CLK_ID_MCLK_1                                 0x300
+/* Clock ID for MCLK2 */
+#define Q6PRM_LPASS_CLK_ID_MCLK_2                                 0x301
+/* Clock ID for MCLK3 */
+#define Q6PRM_LPASS_CLK_ID_MCLK_3                                 0x302
+/* Clock ID for MCLK4 */
+#define Q6PRM_LPASS_CLK_ID_MCLK_4                                 0x303
+/* Clock ID for MCLK5 */
+#define Q6PRM_LPASS_CLK_ID_MCLK_5                                 0x305
+
 #define Q6PRM_LPASS_CLK_ID_WSA_CORE_MCLK			0x305
 #define Q6PRM_LPASS_CLK_ID_WSA_CORE_NPL_MCLK			0x306
 

-- 
2.43.0

Re: [PATCH v2 3/6] ASoC: qcom: qdsp6: q6prm: add the missing MCLK clock IDs

[Mark Brown]

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On Tue, Mar 17, 2026 at 04:35:42PM +0800, Hongyang Zhao wrote:

> +/* Clock ID for MCLK5 */
> +#define Q6PRM_LPASS_CLK_ID_MCLK_5                                 0x305
> +
>  #define Q6PRM_LPASS_CLK_ID_WSA_CORE_MCLK			0x305

These two share the same ID?

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Re: [PATCH v2 3/6] ASoC: qcom: qdsp6: q6prm: add the missing MCLK clock IDs

[Hongyang Zhao]

Thanks for the review!

> On Tue, Mar 17, 2026 at 04:35:42PM +0800, Hongyang Zhao wrote:
> 
> > +/* Clock ID for MCLK5 */
> > +#define Q6PRM_LPASS_CLK_ID_MCLK_5                                 0x305
> > +
> >  #define Q6PRM_LPASS_CLK_ID_WSA_CORE_MCLK			0x305
> 
> These two share the same ID?

This patch series depends on a patch previously submitted by Neil.
The issue has already been fixed in [1]; I had applied the wrong patch.
I will include patch [1] in the next v3 revision.

[1] https://lore.kernel.org/all/20251008-topic-sm8x50-next-hdk-i2s-v2-1-6b7d38d4ad5e@linaro.org/

Thanks,
Hongyang

[PATCH v2 4/6] ASoC: qcom: common: Add MI2S port IDs to jack setup

[Hongyang Zhao]

Add PRIMARY_MI2S_RX through QUATERNARY_MI2S_TX and QUINARY MI2S port IDs
to the qcom_snd_wcd_jack_setup() switch case, so that codecs connected
via MI2S can use jack detection.

Signed-off-by: Hongyang Zhao <hongyang.zhao@thundersoft.com>
---
 sound/soc/qcom/common.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/sound/soc/qcom/common.c b/sound/soc/qcom/common.c
index 7ee60a58a336..657378474254 100644
--- a/sound/soc/qcom/common.c
+++ b/sound/soc/qcom/common.c
@@ -230,6 +230,8 @@ int qcom_snd_wcd_jack_setup(struct snd_soc_pcm_runtime *rtd,
 	case TX_CODEC_DMA_TX_1:
 	case TX_CODEC_DMA_TX_2:
 	case TX_CODEC_DMA_TX_3:
+	case PRIMARY_MI2S_RX ... QUATERNARY_MI2S_TX:
+	case QUINARY_MI2S_RX ... QUINARY_MI2S_TX:
 		for_each_rtd_codec_dais(rtd, i, codec_dai) {
 			rval = snd_soc_component_set_jack(codec_dai->component,
 							  jack, NULL);

-- 
2.43.0

[PATCH v2 5/6] ASoC: qcom: sc8280xp: Set codec DAI format for MI2S links

[Hongyang Zhao]

Set the codec DAI format to I2S consumer mode (BC_FC) with normal bit
and frame clocks (NB_NF) for MI2S backend links. This is required for
external codecs connected via MI2S to work properly.

Signed-off-by: Hongyang Zhao <hongyang.zhao@thundersoft.com>
---
 sound/soc/qcom/sc8280xp.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/sound/soc/qcom/sc8280xp.c b/sound/soc/qcom/sc8280xp.c
index 7925aa3f63ba..04e15c85a145 100644
--- a/sound/soc/qcom/sc8280xp.c
+++ b/sound/soc/qcom/sc8280xp.c
@@ -27,6 +27,7 @@ static int sc8280xp_snd_init(struct snd_soc_pcm_runtime *rtd)
 {
 	struct sc8280xp_snd_data *data = snd_soc_card_get_drvdata(rtd->card);
 	struct snd_soc_dai *cpu_dai = snd_soc_rtd_to_cpu(rtd, 0);
+	struct snd_soc_dai *codec_dai = snd_soc_rtd_to_codec(rtd, 0);
 	struct snd_soc_card *card = rtd->card;
 	struct snd_soc_jack *dp_jack  = NULL;
 	int dp_pcm_id = 0;
@@ -35,6 +36,9 @@ static int sc8280xp_snd_init(struct snd_soc_pcm_runtime *rtd)
 	case PRIMARY_MI2S_RX...QUATERNARY_MI2S_TX:
 	case QUINARY_MI2S_RX...QUINARY_MI2S_TX:
 		snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_BP_FP);
+		snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_BC_FC |
+					       SND_SOC_DAIFMT_NB_NF |
+					       SND_SOC_DAIFMT_I2S);
 		break;
 	case WSA_CODEC_DMA_RX_0:
 	case WSA_CODEC_DMA_RX_1:

-- 
2.43.0

[PATCH v2 6/6] arm64: dts: qcom: qcs6490-rubikpi3: Add audio support

[Hongyang Zhao]

Add audio support for the Thundercomm RubikPi3 board:
- Enable AudioReach via qcs6490-audioreach.dtsi
- Add ES8316 codec on I2C0 with MCLK from LPASS PRM and jack detection
- Add fixed 3.3V regulator for ES8316 power supply
- Add MI2S playback/capture dai-links for ES8316
- Add HDMI audio via LT9611 bridge on quaternary MI2S
- Add SPDIF TX/RX on tertiary MI2S exposed at the board 40‑pin header
- Add LPASS pin configurations for quaternary MI2S and LPI I2S1

Signed-off-by: Hongyang Zhao <hongyang.zhao@thundersoft.com>
---
 .../boot/dts/qcom/qcs6490-thundercomm-rubikpi3.dts | 191 +++++++++++++++++++++
 1 file changed, 191 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/qcs6490-thundercomm-rubikpi3.dts b/arch/arm64/boot/dts/qcom/qcs6490-thundercomm-rubikpi3.dts
index 0b64a0b91202..6831a576fefb 100644
--- a/arch/arm64/boot/dts/qcom/qcs6490-thundercomm-rubikpi3.dts
+++ b/arch/arm64/boot/dts/qcom/qcs6490-thundercomm-rubikpi3.dts
@@ -19,6 +19,7 @@
 #include "pm7325.dtsi"
 #include "pm8350c.dtsi" /* PM7350C */
 #include "pmk8350.dtsi" /* PMK7325 */
+#include "qcs6490-audioreach.dtsi"
 
 /delete-node/ &adsp_mem;
 /delete-node/ &cdsp_mem;
@@ -128,6 +129,23 @@ fan0: pwm-fan {
 		pinctrl-names = "default";
 	};
 
+	vreg_es8316_3v3: vreg-es8316-3v3 {
+		compatible = "regulator-fixed";
+
+		regulator-name = "vreg_es8316_3v3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+
+		gpio = <&tlmm 117 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+
+		pinctrl-0 = <&es8316_power_on>;
+		pinctrl-names = "default";
+
+		regulator-always-on;
+		regulator-boot-on;
+	};
+
 	vreg_eth_1v8: regulator-eth-1v8 {
 		compatible = "regulator-fixed";
 
@@ -364,6 +382,16 @@ usb1_sbu_mux: endpoint {
 			};
 		};
 	};
+
+	spdif_rx: spdif-rx {
+		compatible = "linux,spdif-dir";
+		#sound-dai-cells = <0>;
+	};
+
+	spdif_tx: spdif-tx {
+		compatible = "linux,spdif-dit";
+		#sound-dai-cells = <0>;
+	};
 };
 
 &apps_rsc {
@@ -727,6 +755,23 @@ &gpu_zap_shader {
 	firmware-name = "qcom/qcs6490/a660_zap.mbn";
 };
 
+&i2c0 {
+	status = "okay";
+
+	es8316: audio-codec@11 {
+		compatible = "everest,es8316";
+		reg = <0x11>;
+		#sound-dai-cells = <0>;
+
+		clocks = <&q6prmcc LPASS_CLK_ID_MCLK_1 LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
+		clock-names = "mclk";
+
+		interrupts-extended = <&tlmm 63 IRQ_TYPE_EDGE_BOTH>;
+
+		everest,jack-detect-inverted;
+	};
+};
+
 /* Pin 3, 5 in 40-pin connector */
 &i2c1 {
 	status = "okay";
@@ -740,6 +785,7 @@ &i2c9 {
 	lt9611_codec: hdmi-bridge@39 {
 		compatible = "lontium,lt9611";
 		reg = <0x39>;
+		#sound-dai-cells = <1>;
 
 		interrupts-extended = <&tlmm 20 IRQ_TYPE_EDGE_FALLING>;
 		reset-gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>;
@@ -970,6 +1016,15 @@ &pon_resin {
 	status = "okay";
 };
 
+&q6apmbedai {
+	pinctrl-0 = <&mi2s0_data0>, <&mi2s0_data1>, <&mi2s0_mclk>,
+		    <&mi2s0_sclk>, <&mi2s0_ws>,
+		    <&lpass_qua_mi2s_sclk>, <&lpass_qua_mi2s_ws>, <&lpass_qua_mi2s_data>,
+		    <&lpass_lpi_i2s1_clk>, <&lpass_lpi_i2s1_ws>,
+		    <&lpass_lpi_i2s1_data0>, <&lpass_lpi_i2s1_data1>;
+	pinctrl-names = "default";
+};
+
 &qupv3_id_0 {
 	firmware-name = "qcom/qcm6490/qupv3fw.elf";
 
@@ -1006,6 +1061,91 @@ &sdhc_2 {
 	status = "okay";
 };
 
+&sound {
+	compatible = "qcom,qcs6490-rb3gen2-sndcard";
+	model = "QCS6490-Thundercomm-RubikPi3";
+
+	mi2s-playback-dai-link {
+		link-name = "MI2S-LPAIF-RX-PRIMARY";
+
+		codec {
+			sound-dai = <&es8316>;
+		};
+
+		cpu {
+			sound-dai = <&q6apmbedai PRIMARY_MI2S_RX>;
+		};
+
+		platform {
+			sound-dai = <&q6apm>;
+		};
+	};
+
+	mi2s-capture-dai-link {
+		link-name = "MI2S-LPAIF-TX-PRIMARY";
+
+		codec {
+			sound-dai = <&es8316>;
+		};
+
+		cpu {
+			sound-dai = <&q6apmbedai PRIMARY_MI2S_TX>;
+		};
+
+		platform {
+			sound-dai = <&q6apm>;
+		};
+	};
+
+	quaternary-mi2s-playback-dai-link {
+		link-name = "MI2S-LPAIF_RXTX-RX-PRIMARY";
+
+		codec {
+			sound-dai = <&lt9611_codec 0>;
+		};
+
+		cpu {
+			sound-dai = <&q6apmbedai QUATERNARY_MI2S_RX>;
+		};
+
+		platform {
+			sound-dai = <&q6apm>;
+		};
+	};
+
+	tert-mi2s-playback-dai-link {
+		link-name = "MI2S-LPAIF-RX-TERTIARY";
+
+		codec {
+			sound-dai = <&spdif_tx>;
+		};
+
+		cpu {
+			sound-dai = <&q6apmbedai TERTIARY_MI2S_RX>;
+		};
+
+		platform {
+			sound-dai = <&q6apm>;
+		};
+	};
+
+	tert-mi2s-capture-dai-link {
+		link-name = "MI2S-LPAIF-TX-TERTIARY";
+
+		codec {
+			sound-dai = <&spdif_rx>;
+		};
+
+		cpu {
+			sound-dai = <&q6apmbedai TERTIARY_MI2S_TX>;
+		};
+
+		platform {
+			sound-dai = <&q6apm>;
+		};
+	};
+};
+
 /* Pin 19, 21, 23, 24 in 40-pin connector */
 &spi12 {
 	status = "okay";
@@ -1220,6 +1360,50 @@ &sdc2_data {
 	drive-strength = <10>;
 };
 
+&lpass_tlmm {
+	lpass_qua_mi2s_sclk: qua-mi2s-sclk-state {
+		pins = "gpio0";
+		function = "qua_mi2s_sclk";
+		drive-strength = <8>;
+		bias-disable;
+		output-high;
+	};
+
+	lpass_qua_mi2s_ws: qua-mi2s-ws-state {
+		pins = "gpio1";
+		function = "qua_mi2s_ws";
+		drive-strength = <8>;
+		output-high;
+	};
+
+	lpass_qua_mi2s_data: qua-mi2s-data-state {
+		pins = "gpio2", "gpio3", "gpio4";
+		function = "qua_mi2s_data";
+		drive-strength = <8>;
+		bias-disable;
+	};
+
+	lpass_lpi_i2s1_clk: lpi-i2s1-clk-state {
+		pins = "gpio6";
+		function = "i2s1_clk";
+	};
+
+	lpass_lpi_i2s1_ws: lpi-i2s1-ws-state {
+		pins = "gpio7";
+		function = "i2s1_ws";
+	};
+
+	lpass_lpi_i2s1_data0: lpi-i2s1-data0-state {
+		pins = "gpio8";
+		function = "i2s1_data";
+	};
+
+	lpass_lpi_i2s1_data1: lpi-i2s1-data1-state {
+		pins = "gpio9";
+		function = "i2s1_data";
+	};
+};
+
 &tlmm {
 	pcie1_reset_n: pcie1-reset-n-state {
 		pins = "gpio2";
@@ -1387,6 +1571,13 @@ pcie0_wake_n: pcie0-wake-n-state {
 		bias-pull-up;
 	};
 
+	es8316_power_on: es8316-power-on-state {
+		pins = "gpio117";
+		function = "gpio";
+		drive-strength = <2>;
+		bias-pull-down;
+	};
+
 	wifi_power_on: wifi-power-on-state {
 		pins = "gpio125";
 		function = "gpio";

-- 
2.43.0