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From: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
To: Mark Brown <broonie@kernel.org>,
	Liam Girdwood <lgirdwood@gmail.com>,
	David Rhodes <david.rhodes@cirrus.com>,
	Richard Fitzgerald <rf@opensource.cirrus.com>
Cc: Charles Keepax <ckeepax@opensource.cirrus.com>,
	Vlad Karpovich <vkarpovi@opensource.cirrus.com>,
	Paul Handrigan <Paul.Handrigan@cirrus.com>,
	patches@opensource.cirrus.com, linux-sound@vger.kernel.org,
	stable@vger.kernel.org
Subject: [PATCH 1/3] ASoC: cs35l41: sort the register default table
Date: Wed,  5 Aug 2026 11:24:11 +0300	[thread overview]
Message-ID: <20260805082413.26174-2-peter.ujfalusi@linux.intel.com> (raw)
In-Reply-To: <20260805082413.26174-1-peter.ujfalusi@linux.intel.com>

reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch().  See commit
fd80df352ba1 ("regcache: Add support for sorting defaults arrays").

cs35l41_reg[] lists CS35L41_BSTCVRT_PEAK_CUR (0x3808) after
CS35L41_BSTCVRT_COEFF (0x3810) and CS35L41_BSTCVRT_SLOPE_LBST (0x3814), so
the binary search does not find those two entries.
regcache_reg_needs_sync() then cannot compare them against their default
and reports that a sync is needed, so they are written to the device on
every regcache_sync() even when they were never touched.

Sort the table by register address.

Fixes: 5f2f539901b0 ("ASoC: cs35l41: Correct handling of some registers in the cache")
Cc: stable@vger.kernel.org
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
---
 sound/soc/codecs/cs35l41-lib.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sound/soc/codecs/cs35l41-lib.c b/sound/soc/codecs/cs35l41-lib.c
index 1702f26049d3..b0fa80705be7 100644
--- a/sound/soc/codecs/cs35l41-lib.c
+++ b/sound/soc/codecs/cs35l41-lib.c
@@ -25,9 +25,9 @@ static const struct reg_default cs35l41_reg[] = {
 	{ CS35L41_GPIO_PAD_CONTROL,		0x00000000 },
 	{ CS35L41_GLOBAL_CLK_CTRL,		0x00000003 },
 	{ CS35L41_TST_FS_MON0,			0x00020016 },
+	{ CS35L41_BSTCVRT_PEAK_CUR,		0x0000004A },
 	{ CS35L41_BSTCVRT_COEFF,		0x00002424 },
 	{ CS35L41_BSTCVRT_SLOPE_LBST,		0x00007500 },
-	{ CS35L41_BSTCVRT_PEAK_CUR,		0x0000004A },
 	{ CS35L41_SP_ENABLES,			0x00000000 },
 	{ CS35L41_SP_RATE_CTRL,			0x00000028 },
 	{ CS35L41_SP_FORMAT,			0x18180200 },
-- 
2.55.0


  reply	other threads:[~2026-08-05  8:23 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-05  8:24 [PATCH 0/3] ASoC: cs35l41/cs35l45/cs4265: sort the reg_defaults tables Peter Ujfalusi
2026-08-05  8:24 ` Peter Ujfalusi [this message]
2026-08-05  9:58   ` [PATCH 1/3] ASoC: cs35l41: sort the register default table Richard Fitzgerald
2026-08-05  8:24 ` [PATCH 2/3] ASoC: cs35l45: " Peter Ujfalusi
2026-08-05 11:35   ` Richard Fitzgerald
2026-08-05  8:24 ` [PATCH 3/3] ASoC: cs4265: " Peter Ujfalusi
2026-08-05 11:31   ` Richard Fitzgerald
2026-08-05  8:40 ` [PATCH 0/3] ASoC: cs35l41/cs35l45/cs4265: sort the reg_defaults tables Pierre-Louis Bossart
2026-08-05  8:52   ` Péter Ujfalusi
2026-08-05  8:59     ` Pierre-Louis Bossart
2026-08-05  9:00   ` Richard Fitzgerald
2026-08-05  9:10     ` Péter Ujfalusi
2026-08-05  9:25       ` Charles Keepax
2026-08-05  9:38         ` Richard Fitzgerald
2026-08-05  9:52           ` Charles Keepax
2026-08-05  9:52           ` Péter Ujfalusi
2026-08-05  9:56             ` Richard Fitzgerald
2026-08-05  9:59               ` Péter Ujfalusi
2026-08-05 10:10                 ` Charles Keepax
2026-08-05 10:17                   ` Péter Ujfalusi
2026-08-05 10:36                     ` Richard Fitzgerald
2026-08-05 11:25                       ` Péter Ujfalusi
2026-08-05 11:31                         ` Charles Keepax
2026-08-05 11:38                           ` Richard Fitzgerald
2026-08-05 11:38                           ` Péter Ujfalusi
2026-08-05  9:25     ` Péter Ujfalusi
2026-08-05 10:38   ` Mark Brown
2026-08-05  8:59 ` Charles Keepax
2026-08-05 12:37 ` Mark Brown

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