From: Pierre-Louis Bossart <pierre-louis.bossart@linux.dev>
To: "Péter Ujfalusi" <peter.ujfalusi@linux.intel.com>,
"Mark Brown" <broonie@kernel.org>,
"Liam Girdwood" <lgirdwood@gmail.com>,
"David Rhodes" <david.rhodes@cirrus.com>,
"Richard Fitzgerald" <rf@opensource.cirrus.com>
Cc: Charles Keepax <ckeepax@opensource.cirrus.com>,
Vlad Karpovich <vkarpovi@opensource.cirrus.com>,
Paul Handrigan <Paul.Handrigan@cirrus.com>,
patches@opensource.cirrus.com, linux-sound@vger.kernel.org,
stable@vger.kernel.org
Subject: Re: [PATCH 0/3] ASoC: cs35l41/cs35l45/cs4265: sort the reg_defaults tables
Date: Wed, 5 Aug 2026 10:59:06 +0200 [thread overview]
Message-ID: <edf84874-d9f3-4211-bf66-6bcfb57613bc@linux.dev> (raw)
In-Reply-To: <7f7b5f6d-cead-4741-9b44-411ea56052f3@linux.intel.com>
On 8/5/26 10:52, Péter Ujfalusi wrote:
>
>
> On 05/08/2026 11:40, Pierre-Louis Bossart wrote:
>>
>>> reg_defaults must be sorted by ascending register address as
>>> regcache_lookup_reg() locates the entries in it with bsearch(), see commit
>>> fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
>>>
>>> These three tables have entries which are out of order, so the binary search
>>> does not find part of them. For those registers regcache_reg_needs_sync()
>>> cannot compare the cached value against the default and reports that a sync
>>> is needed, so they are written to the device on every regcache_sync() even
>>> when they were never touched.
>>>
>>> The patches only reorder the existing entries, the text of every entry is
>>> kept verbatim and no default value is changed. Each table was verified by
>>> evaluating the register addresses and replaying lib/bsearch.c on them.
>>>
>>> Entries not reachable by the binary search, per table:
>>>
>>> cs35l41_reg 2 (of 47)
>>> cs35l45_defaults 36 (of 73)
>>> cs4265_reg_defaults 3 (of 16)
>>>
>>> For cs35l45 this is nearly half of the table: the DSP1_RX*_RATE and
>>> DSP1_TX*_RATE registers sit in the middle of it while their addresses are
>>> far above everything else, which cuts the search off from the whole
>>> 0x4c40 - 0xf010 range.
>>>
>>> Found by an audit of all reg_defaults tables under sound/, the SoundWire
>>> codec drivers are fixed by a separate series.
>>
>> Wow. Would it make sense to have a regmap helper to double-check the
>> addresses are indeed in-order in those reg_default tables?
>> I am not sure how this requirement can be enforced by just inspection, a
>> warning would help detect this sort of issues on more platforms.
>
>
> I had this first:
> diff --git a/drivers/base/regmap/regcache.c b/drivers/base/regmap/regcache.c
> index be167ee6f57c..7d2f74494645 100644
> --- a/drivers/base/regmap/regcache.c
> +++ b/drivers/base/regmap/regcache.c
> @@ -187,6 +187,9 @@ int regcache_init(struct regmap *map, const struct
> regmap_config *config)
> if (!tmp_buf)
> return -ENOMEM;
> map->reg_defaults = tmp_buf;
> +
> + /* regcache_lookup_reg() bsearch()es this array */
> + regcache_sort_defaults(tmp_buf, map->num_reg_defaults);
> } else if (map->num_reg_defaults_raw) {
> count = regcache_count_cacheable_registers(map);
> if (!count)
>
>
> But it would run for all regmap on boot and I think that would be a big
> hit on boot time.
> I guess, a debug kernel option could enable ordering check for defaults
> in regmap and warn if it finds such?
reordering the tables could take time even on a perfectly ordered case,
I was only thinking of throwing a warning with a simple loop on the table.
Maybe also something for kernel tests? A warning would require user
feedback whereas a formal test could check for hundreds of regmap defaults.
next prev parent reply other threads:[~2026-08-05 8:59 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-05 8:24 [PATCH 0/3] ASoC: cs35l41/cs35l45/cs4265: sort the reg_defaults tables Peter Ujfalusi
2026-08-05 8:24 ` [PATCH 1/3] ASoC: cs35l41: sort the register default table Peter Ujfalusi
2026-08-05 9:58 ` Richard Fitzgerald
2026-08-05 8:24 ` [PATCH 2/3] ASoC: cs35l45: " Peter Ujfalusi
2026-08-05 11:35 ` Richard Fitzgerald
2026-08-05 8:24 ` [PATCH 3/3] ASoC: cs4265: " Peter Ujfalusi
2026-08-05 11:31 ` Richard Fitzgerald
2026-08-05 8:40 ` [PATCH 0/3] ASoC: cs35l41/cs35l45/cs4265: sort the reg_defaults tables Pierre-Louis Bossart
2026-08-05 8:52 ` Péter Ujfalusi
2026-08-05 8:59 ` Pierre-Louis Bossart [this message]
2026-08-05 9:00 ` Richard Fitzgerald
2026-08-05 9:10 ` Péter Ujfalusi
2026-08-05 9:25 ` Charles Keepax
2026-08-05 9:38 ` Richard Fitzgerald
2026-08-05 9:52 ` Charles Keepax
2026-08-05 9:52 ` Péter Ujfalusi
2026-08-05 9:56 ` Richard Fitzgerald
2026-08-05 9:59 ` Péter Ujfalusi
2026-08-05 10:10 ` Charles Keepax
2026-08-05 10:17 ` Péter Ujfalusi
2026-08-05 10:36 ` Richard Fitzgerald
2026-08-05 11:25 ` Péter Ujfalusi
2026-08-05 11:31 ` Charles Keepax
2026-08-05 11:38 ` Péter Ujfalusi
2026-08-05 11:38 ` Richard Fitzgerald
2026-08-05 9:25 ` Péter Ujfalusi
2026-08-05 10:38 ` Mark Brown
2026-08-05 8:59 ` Charles Keepax
2026-08-05 12:37 ` Mark Brown
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