From: Alexander Sverdlin <alexander.sverdlin@gmail.com>
To: Arnd Bergmann <arnd@kernel.org>,
Chen Wang <unicorn_wang@outlook.com>,
Inochi Amaoto <inochiama@gmail.com>,
"Anton D. Stavinskii" <stavinsky@gmail.com>
Cc: Arnd Bergmann <arnd@arndb.de>,
linux-sound@vger.kernel.org, sophgo@lists.linux.dev,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] ASoC: sophgo: fix 64-bit division build failure
Date: Mon, 02 Feb 2026 22:31:24 +0100 [thread overview]
Message-ID: <33cb662c718507c6ac747af4a9a3f5af10fcf5a5.camel@gmail.com> (raw)
In-Reply-To: <20260202095323.1233553-1-arnd@kernel.org>
Hi Arnd!
On Mon, 2026-02-02 at 10:53 +0100, Arnd Bergmann wrote:
> From: Arnd Bergmann <arnd@arndb.de>
>
> cv1800b_adc_setbclk_div() does four 64-bit divisions in a row, which
3 of the 4 divisors are actually a power of two, so it would be a bug
in the compiler to issue a division for them...
Regarding the 64 bits: seems that the actual issue is the tmp variable that
is of u64 type for no reason, because priv->mclk_rate is only u32.
Maybe turning tmp into a u32 would avoid unnecessary 64-bit division
altogether?
> is rather inefficient on 32-bit systems, and using the plain division
> causes a build failure as a result:
>
> ERROR: modpost: "__aeabi_uldivmod" [sound/soc/sophgo/cv1800b-sound-adc.ko] undefined!
>
> Consolidate those into a single division using the div_u64() macro.
>
> Fixes: 4cf8752a03e6 ("ASoC: sophgo: add CV1800B internal ADC codec driver")
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
> ---
> sound/soc/sophgo/cv1800b-sound-adc.c | 7 ++-----
> 1 file changed, 2 insertions(+), 5 deletions(-)
>
> diff --git a/sound/soc/sophgo/cv1800b-sound-adc.c b/sound/soc/sophgo/cv1800b-sound-adc.c
> index 794030b713e9..b66761156b99 100644
> --- a/sound/soc/sophgo/cv1800b-sound-adc.c
> +++ b/sound/soc/sophgo/cv1800b-sound-adc.c
> @@ -105,11 +105,8 @@ static int cv1800b_adc_setbclk_div(struct cv1800b_priv *priv, unsigned int rate)
> if (!priv->mclk_rate || !rate)
> return -EINVAL;
>
> - tmp = priv->mclk_rate;
> - tmp /= CV1800B_RXADC_WORD_LEN;
> - tmp /= CV1800B_RXADC_CHANNELS;
> - tmp /= rate;
> - tmp /= 2;
> + tmp = div_u64(priv->mclk_rate, CV1800B_RXADC_WORD_LEN *
> + CV1800B_RXADC_CHANNELS * rate * 2);
>
> if (!tmp) {
> dev_err(priv->dev, "computed BCLK divider is zero\n");
--
Alexander Sverdlin.
next prev parent reply other threads:[~2026-02-02 21:31 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-02 9:53 [PATCH] ASoC: sophgo: fix 64-bit division build failure Arnd Bergmann
2026-02-02 21:31 ` Alexander Sverdlin [this message]
2026-02-02 22:00 ` Arnd Bergmann
2026-02-02 22:48 ` Mark Brown
2026-02-03 0:11 ` Chen Wang
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