From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
To: vkoul@kernel.org, Frank.Li@kernel.org, lgirdwood@gmail.com,
broonie@kernel.org, perex@perex.cz, tiwai@suse.com,
biju.das.jz@bp.renesas.com,
prabhakar.mahadev-lad.rj@bp.renesas.com, p.zabel@pengutronix.de,
geert+renesas@glider.be, fabrizio.castro.jz@renesas.com,
long.luu.ur@renesas.com
Cc: dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-sound@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>,
stable@vger.kernel.org
Subject: sashiko.dev review (Re: [PATCH v4 01/17] dmaengine: sh: rz-dmac: Move interrupt request after everything is set up)
Date: Mon, 20 Apr 2026 15:33:09 +0300 [thread overview]
Message-ID: <631893a8-d5de-49f8-9d7b-a20db4a8ed08@tuxon.dev> (raw)
In-Reply-To: <20260411114303.2814115-2-claudiu.beznea.uj@bp.renesas.com>
> commit b3dfdd5fbd2463db407b1396ee1ae79801cb96bf
> Author: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
> dmaengine: sh: rz-dmac: Move interrupt request after everything is set up
> This patch moves the channel interrupt request to the end of the channel
> probe function to prevent the IRQ handler from accessing uninitialized
> data. It also replaces dma_alloc_coherent() with dmam_alloc_coherent()
> to simplify the error path.
> > diff --git a/drivers/dma/sh/rz-dmac.c b/drivers/dma/sh/rz-dmac.c
> > index 625ff29024de0..9f206a33dcc6b 100644
> > --- a/drivers/dma/sh/rz-dmac.c
> > +++ b/drivers/dma/sh/rz-dmac.c
> [ ... ]
> > @@ -1210,16 +1207,6 @@ static int rz_dmac_probe(struct platform_device *pdev)
> > dma_register_err:
> > of_dma_controller_free(pdev->dev.of_node);
> > err:
> > - channel_num = i ? i - 1 : 0;
> > - for (i = 0; i < channel_num; i++) {
> > - struct rz_dmac_chan *channel = &dmac->channels[i];
> > -
> > - dma_free_coherent(&pdev->dev,
> > - sizeof(struct rz_lmdesc) * DMAC_NR_LMDESC,
> > - channel->lmdesc.base,
> > - channel->lmdesc.base_dma);
> > - }
> > -
> > reset_control_assert(dmac->rstc);
> > err_pm_runtime_put:
> > pm_runtime_put(&pdev->dev);
> > @@ -1232,18 +1219,9 @@ static int rz_dmac_probe(struct platform_device *pdev)
> > static void rz_dmac_remove(struct platform_device *pdev)
> > {
> > struct rz_dmac *dmac = platform_get_drvdata(pdev);
> > - unsigned int i;
> >
> > dma_async_device_unregister(&dmac->engine);
> > of_dma_controller_free(pdev->dev.of_node);
> > - for (i = 0; i < dmac->n_channels; i++) {
> > - struct rz_dmac_chan *channel = &dmac->channels[i];
> > -
> > - dma_free_coherent(&pdev->dev,
> > - sizeof(struct rz_lmdesc) * DMAC_NR_LMDESC,
> > - channel->lmdesc.base,
> > - channel->lmdesc.base_dma);
> > - }
> > reset_control_assert(dmac->rstc);
> > pm_runtime_put(&pdev->dev);
> > pm_runtime_disable(&pdev->dev);
> > }
> While this patch fixes the initialization races, does it leave a similar
> vulnerability exposed during teardown?
> Since devm_request_threaded_irq() is used to allocate the interrupts, they
> will remain active until after rz_dmac_remove() and the rz_dmac_probe() error
> paths complete.
> If an interrupt fires during or just after rz_dmac_remove(), could the handler
> attempt to access hardware registers while the device is in reset or powered
> down by pm_runtime_put()?
> Would it be safer to explicitly free or disable the IRQs before asserting the
> hardware reset and disabling runtime PM, or perhaps manage the reset and PM
> states via devm actions to guarantee correct teardown ordering?
On either failure or remove path the device is with runtime PM put (clocks being
disabled) and in reset state. The controller cannot generate interrupts from
this state.
However, to keep this series simple, I'll add this in a cleanup patch after the
current series will be merged.
next prev parent reply other threads:[~2026-04-20 12:33 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-11 11:42 [PATCH v4 00/17] Renesas: dmaengine and ASoC fixes Claudiu
2026-04-11 11:42 ` [PATCH v4 01/17] dmaengine: sh: rz-dmac: Move interrupt request after everything is set up Claudiu
2026-04-11 12:17 ` Biju Das
2026-04-11 12:34 ` Claudiu Beznea
2026-04-20 12:33 ` Claudiu Beznea [this message]
2026-04-11 11:42 ` [PATCH v4 02/17] dmaengine: sh: rz-dmac: Fix incorrect NULL check on list_first_entry() Claudiu
2026-04-11 11:42 ` [PATCH v4 03/17] dmaengine: sh: rz-dmac: Use list_first_entry_or_null() Claudiu
2026-04-11 11:42 ` [PATCH v4 04/17] dmaengine: sh: rz-dmac: Use rz_dmac_disable_hw() Claudiu
2026-04-20 12:34 ` sashiko.dev review (Re: [PATCH v4 04/17] dmaengine: sh: rz-dmac: Use rz_dmac_disable_hw()) Claudiu Beznea
2026-04-11 11:42 ` [PATCH v4 05/17] dmaengine: sh: rz-dmac: Do not disable the channel on error Claudiu
2026-04-11 12:30 ` Biju Das
2026-04-14 8:28 ` Claudiu Beznea
2026-04-11 11:42 ` [PATCH v4 06/17] dmaengine: sh: rz-dmac: Add helper to compute the lmdesc address Claudiu
2026-04-11 11:42 ` [PATCH v4 07/17] dmaengine: sh: rz-dmac: Save the start LM descriptor Claudiu
2026-04-11 12:34 ` Biju Das
2026-04-11 12:38 ` Claudiu Beznea
2026-04-11 12:50 ` Biju Das
2026-04-20 12:37 ` sashiko.dev review (Re: [PATCH v4 07/17] dmaengine: sh: rz-dmac: Save the start LM descriptor) Claudiu Beznea
2026-04-11 11:42 ` [PATCH v4 08/17] dmaengine: sh: rz-dmac: Add helper to check if the channel is enabled Claudiu
2026-04-11 11:42 ` [PATCH v4 09/17] dmaengine: sh: rz-dmac: Add helper to check if the channel is paused Claudiu
2026-04-11 11:42 ` [PATCH v4 10/17] dmaengine: sh: rz-dmac: Use virt-dma APIs for channel descriptor processing Claudiu
2026-04-20 12:41 ` sashiko.dev review (Re: [PATCH v4 10/17] dmaengine: sh: rz-dmac: Use virt-dma APIs for channel descriptor processing) Claudiu Beznea
2026-04-11 11:42 ` [PATCH v4 11/17] dmaengine: sh: rz-dmac: Refactor pause/resume code Claudiu
2026-04-20 12:42 ` sashiko.dev review (Re: [PATCH v4 11/17] dmaengine: sh: rz-dmac: Refactor pause/resume code) Claudiu Beznea
2026-04-11 11:42 ` [PATCH v4 12/17] dmaengine: sh: rz-dmac: Drop the update of channel->chctrl with CHCTRL_SETEN Claudiu
2026-04-11 11:42 ` [PATCH v4 13/17] dmaengine: sh: rz-dmac: Add cyclic DMA support Claudiu
2026-04-20 12:51 ` sashiko.dev review (Re: [PATCH v4 13/17] dmaengine: sh: rz-dmac: Add cyclic DMA support) Claudiu Beznea
2026-04-11 11:43 ` [PATCH v4 14/17] dmaengine: sh: rz-dmac: Add suspend to RAM support Claudiu
2026-04-20 7:42 ` Biju Das
2026-04-20 14:15 ` Claudiu Beznea
2026-04-20 14:21 ` Biju Das
2026-04-20 14:37 ` Claudiu Beznea
2026-04-20 14:53 ` Biju Das
2026-04-20 12:52 ` sashiko.dev review (Re: [PATCH v4 14/17] dmaengine: sh: rz-dmac: Add suspend to RAM support) Claudiu Beznea
2026-04-11 11:43 ` [PATCH v4 15/17] ASoC: renesas: rz-ssi: Add pause support Claudiu
2026-04-11 11:43 ` [PATCH v4 16/17] ASoC: renesas: rz-ssi: Use generic PCM dmaengine APIs Claudiu
2026-04-11 11:43 ` [PATCH v4 17/17] dmaengine: sh: rz-dmac: Set the Link End (LE) bit on the last descriptor Claudiu
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