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From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
To: vkoul@kernel.org, Frank.Li@kernel.org, lgirdwood@gmail.com,
	broonie@kernel.org, perex@perex.cz, tiwai@suse.com,
	biju.das.jz@bp.renesas.com,
	prabhakar.mahadev-lad.rj@bp.renesas.com, p.zabel@pengutronix.de,
	geert+renesas@glider.be, fabrizio.castro.jz@renesas.com,
	long.luu.ur@renesas.com
Cc: dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-sound@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
	Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Subject: sashiko.dev review (Re: [PATCH v4 14/17] dmaengine: sh: rz-dmac: Add suspend to RAM support)
Date: Mon, 20 Apr 2026 15:52:22 +0300	[thread overview]
Message-ID: <e928f207-1497-4301-a814-3b5045adaa56@tuxon.dev> (raw)
In-Reply-To: <20260411114303.2814115-15-claudiu.beznea.uj@bp.renesas.com>

 > commit e7af08b0f2dc569cc63b17e07dd4e506e50fee28
 > Author: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
 > dmaengine: sh: rz-dmac: Add suspend to RAM support
 > The Renesas RZ/G3S SoC supports a power saving mode in which power to most
 > of the SoC components is turned off, including the DMA IP. Add suspend to
 > RAM support to save and restore the DMA IP registers.
 > > diff --git a/drivers/dma/sh/rz-dmac.c b/drivers/dma/sh/rz-dmac.c
 > > --- a/drivers/dma/sh/rz-dmac.c
 > > +++ b/drivers/dma/sh/rz-dmac.c
 > [ ... ]
 > > @@ -1354,6 +1407,130 @@ static void rz_dmac_remove(struct platform_device 
*pdev)
 > >     pm_runtime_disable(&pdev->dev);
 > >  }
 > >
 > > +static int rz_dmac_suspend_prepare(struct device *dev)
 > > +{
 > > +   struct rz_dmac *dmac = dev_get_drvdata(dev);
 > > +
 > > +   for (unsigned int i = 0; i < dmac->n_channels; i++) {
 > > +           struct rz_dmac_chan *channel = &dmac->channels[i];
 > > +
 > > +           guard(spinlock_irqsave)(&channel->vc.lock);
 > > +
 > > +           /* Wait for transfer completion, except in cyclic case. */
 > > +           if (channel->status & BIT(RZ_DMAC_CHAN_STATUS_CYCLIC))
 > > +                   continue;
 > > +
 > > +           if (rz_dmac_chan_is_enabled(channel))
 > > +                   return -EAGAIN;
 > Is it intended that this aborts the system suspend instead of waiting?

Returning -EAGAIN here makes the core suspend code to keep trying calling the 
prepare API of this driver. That's why it has mentioned waiting.

 > The commit message states the .prepare callback "waits for all the ongoing
 > transfers to complete before allowing suspend-to-RAM to proceed."
 > However, returning -EAGAIN from a system sleep .prepare callback immediately
 > aborts the system suspend process instead of waiting.
 > Additionally, since the PM core executes the .prepare phase for all devices
 > before executing any .suspend callbacks, consumer devices haven't yet run
 > their own .suspend callbacks to stop their DMA transfers.
 > If any normal background DMA activity is ongoing, won't this immediately
 > abort the entire system suspend transition?

If DMA activity is ongoing the expectation is that it will finish and the 
suspend_prepare() will go forward.

 > > +   }
 > > +
 > > +   return 0;
 > > +}
 > [ ... ]
 > > +static int rz_dmac_suspend(struct device *dev)
 > > +{
 > > +   struct rz_dmac *dmac = dev_get_drvdata(dev);
 > > +   int ret;
 > Can ret be used uninitialized here?

Yes, this is a typo. I'll properly initialize this here.

 > If the DMA controller has no cyclic channels configured, the loop below will
 > skip every iteration due to the continue statement, leaving ret
 > uninitialized.
 > > +
 > > +   for (unsigned int i = 0; i < dmac->n_channels; i++) {
 > > +           struct rz_dmac_chan *channel = &dmac->channels[i];
 > > +
 > > +           guard(spinlock_irqsave)(&channel->vc.lock);
 > > +
 > > +           if (!(channel->status & BIT(RZ_DMAC_CHAN_STATUS_CYCLIC)))
 > > +                   continue;
 > > +
 > > +           ret = rz_dmac_device_pause_internal(channel);
 > > +           if (ret) {
 > > +                   dev_err(dev, "Failed to suspend channel %s\n",
 > > +                           dma_chan_name(&channel->vc.chan));
 > > +                   break;
 > > +           }
 > > +
 > > +           channel->pm_state.nxla = rz_dmac_ch_readl(channel, NXLA, 1);
 > > +   }
 > > +
 > > +   if (ret) {
 > If ret contains uninitialized stack memory that evaluates to true, could this
 > trigger the error recovery path and silently abort the system suspend
 > transition?
 > > +           rz_dmac_suspend_recover(dmac);
 > > +           return ret;
 > > +   }
 > > +
 > > +   pm_runtime_put_sync(dmac->dev);
 > > +
 > > +   ret = reset_control_assert(dmac->rstc);
 > Is the ordering of runtime PM and reset control inverted here compared to
 > rz_dmac_remove()?

Yes, I'll adjust it.

 > In rz_dmac_remove(), reset_control_assert() is called before pm_runtime_put().
 > Operating on the reset control after the device's power domain is suspended
 > might cause the operations to be silently ignored by the hardware or lead to
 > system bus lockups.
 > > +   if (ret) {
 > > +           pm_runtime_resume_and_get(dmac->dev);
 > > +           rz_dmac_suspend_recover(dmac);
 > > +   }
 > > +
 > > +   return ret;
 > > +}
 > > +
 > > +static int rz_dmac_resume(struct device *dev)
 > > +{
 > > +   struct rz_dmac *dmac = dev_get_drvdata(dev);
 > > +   int errors = 0, ret;
 > > +
 > > +   ret = reset_control_deassert(dmac->rstc);
 > Similarly, is the ordering of reset control and runtime PM inverted here
 > compared to rz_dmac_probe()?

Yes, I'll adjust it.

 > In rz_dmac_probe(), pm_runtime_resume_and_get() is called before
 > reset_control_deassert(). Doing this in the reverse order here means the
 > reset is deasserted before the hardware power domain is enabled.
 > > +   if (ret)
 > > +           return ret;
 > > +
 > > +   ret = pm_runtime_resume_and_get(dmac->dev);
 > > +   if (ret) {
 > > +           reset_control_assert(dmac->rstc);
 > > +           return ret;
 > > +   }
 > [ ... ]
 > > @@ -1380,6 +1557,7 @@ static struct platform_driver rz_dmac_driver = {
 > >     .driver         = {
 > >             .name   = "rz-dmac",
 > >             .of_match_table = of_rz_dmac_match,
 > > +           .pm     = pm_sleep_ptr(&rz_dmac_pm_ops),
 > Should this use pm_ptr() instead of pm_sleep_ptr()?
 > If CONFIG_PM_SLEEP is disabled, pm_sleep_ptr() evaluates to NULL, but the
 > struct rz_dmac_pm_ops itself and its unconditional callbacks like
 > rz_dmac_suspend_prepare will remain fully compiled into the binary as unused
 > dead code, potentially leading to compiler warnings.
 > Using pm_ptr() for the dev_pm_ops structure pointer and pm_sleep_ptr()
 > around the sleep callbacks inside the structure might resolve this.
 > >     },
 > >     .probe          = rz_dmac_probe,
 > >     .remove         = rz_dmac_remove,

I think pm_sleep_ptr() fits better here as CONFIG_PM_SLEEP depends on 
CONFIG_SUSPEND which is the flag under which the system suspend/resume code 
resides. Also, CONFIG_PM_SLEEP selects CONFIG_PM, so CONFIG_PM_SLEEP cannot be 
enabled w/o CONFIG_PM.

  parent reply	other threads:[~2026-04-20 12:52 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-11 11:42 [PATCH v4 00/17] Renesas: dmaengine and ASoC fixes Claudiu
2026-04-11 11:42 ` [PATCH v4 01/17] dmaengine: sh: rz-dmac: Move interrupt request after everything is set up Claudiu
2026-04-11 12:17   ` Biju Das
2026-04-11 12:34     ` Claudiu Beznea
2026-04-20 12:33   ` sashiko.dev review (Re: [PATCH v4 01/17] dmaengine: sh: rz-dmac: Move interrupt request after everything is set up) Claudiu Beznea
2026-04-11 11:42 ` [PATCH v4 02/17] dmaengine: sh: rz-dmac: Fix incorrect NULL check on list_first_entry() Claudiu
2026-04-11 11:42 ` [PATCH v4 03/17] dmaengine: sh: rz-dmac: Use list_first_entry_or_null() Claudiu
2026-04-11 11:42 ` [PATCH v4 04/17] dmaengine: sh: rz-dmac: Use rz_dmac_disable_hw() Claudiu
2026-04-20 12:34   ` sashiko.dev review (Re: [PATCH v4 04/17] dmaengine: sh: rz-dmac: Use rz_dmac_disable_hw()) Claudiu Beznea
2026-04-11 11:42 ` [PATCH v4 05/17] dmaengine: sh: rz-dmac: Do not disable the channel on error Claudiu
2026-04-11 12:30   ` Biju Das
2026-04-14  8:28     ` Claudiu Beznea
2026-04-11 11:42 ` [PATCH v4 06/17] dmaengine: sh: rz-dmac: Add helper to compute the lmdesc address Claudiu
2026-04-11 11:42 ` [PATCH v4 07/17] dmaengine: sh: rz-dmac: Save the start LM descriptor Claudiu
2026-04-11 12:34   ` Biju Das
2026-04-11 12:38     ` Claudiu Beznea
2026-04-11 12:50       ` Biju Das
2026-04-20 12:37   ` sashiko.dev review (Re: [PATCH v4 07/17] dmaengine: sh: rz-dmac: Save the start LM descriptor) Claudiu Beznea
2026-04-11 11:42 ` [PATCH v4 08/17] dmaengine: sh: rz-dmac: Add helper to check if the channel is enabled Claudiu
2026-04-11 11:42 ` [PATCH v4 09/17] dmaengine: sh: rz-dmac: Add helper to check if the channel is paused Claudiu
2026-04-11 11:42 ` [PATCH v4 10/17] dmaengine: sh: rz-dmac: Use virt-dma APIs for channel descriptor processing Claudiu
2026-04-20 12:41   ` sashiko.dev review (Re: [PATCH v4 10/17] dmaengine: sh: rz-dmac: Use virt-dma APIs for channel descriptor processing) Claudiu Beznea
2026-04-11 11:42 ` [PATCH v4 11/17] dmaengine: sh: rz-dmac: Refactor pause/resume code Claudiu
2026-04-20 12:42   ` sashiko.dev review (Re: [PATCH v4 11/17] dmaengine: sh: rz-dmac: Refactor pause/resume code) Claudiu Beznea
2026-04-11 11:42 ` [PATCH v4 12/17] dmaengine: sh: rz-dmac: Drop the update of channel->chctrl with CHCTRL_SETEN Claudiu
2026-04-11 11:42 ` [PATCH v4 13/17] dmaengine: sh: rz-dmac: Add cyclic DMA support Claudiu
2026-04-20 12:51   ` sashiko.dev review (Re: [PATCH v4 13/17] dmaengine: sh: rz-dmac: Add cyclic DMA support) Claudiu Beznea
2026-04-11 11:43 ` [PATCH v4 14/17] dmaengine: sh: rz-dmac: Add suspend to RAM support Claudiu
2026-04-20  7:42   ` Biju Das
2026-04-20 14:15     ` Claudiu Beznea
2026-04-20 14:21       ` Biju Das
2026-04-20 14:37         ` Claudiu Beznea
2026-04-20 14:53           ` Biju Das
2026-04-20 12:52   ` Claudiu Beznea [this message]
2026-04-11 11:43 ` [PATCH v4 15/17] ASoC: renesas: rz-ssi: Add pause support Claudiu
2026-04-11 11:43 ` [PATCH v4 16/17] ASoC: renesas: rz-ssi: Use generic PCM dmaengine APIs Claudiu
2026-04-11 11:43 ` [PATCH v4 17/17] dmaengine: sh: rz-dmac: Set the Link End (LE) bit on the last descriptor Claudiu

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