Re: [PATCH 7/8] ALSA: hda: Fix single byte writing issue for Hygon family 18h model 5h

[Takashi Iwai <tiwai@suse.de>]

On Fri, 27 Mar 2026 09:11:13 +0100,
Fu Hao wrote:
> 
> On Hygon family 18h model 5h controller, some registers such as
> GCTL, SD_CTL and SD_CTL_3B should be accessed in dword, or the
> writing will fail.
> 
> Signed-off-by: Fu Hao <fuhao@open-hieco.net>
> ---
>  include/sound/hdaudio.h       |  1 +
>  sound/hda/controllers/intel.c |  4 ++++
>  sound/hda/core/controller.c   | 10 +++++++--
>  sound/hda/core/stream.c       | 42 ++++++++++++++++++++++++++---------
>  4 files changed, 45 insertions(+), 12 deletions(-)
> 
> diff --git a/include/sound/hdaudio.h b/include/sound/hdaudio.h
> index f11bfc6b9..57a144fec 100644
> --- a/include/sound/hdaudio.h
> +++ b/include/sound/hdaudio.h
> @@ -352,6 +352,7 @@ struct hdac_bus {
>  	bool not_use_interrupts:1;	/* prohibiting the RIRB IRQ */
>  	bool access_sdnctl_in_dword:1;	/* accessing the sdnctl register by dword */
>  	bool use_pio_for_commands:1;	/* Use PIO instead of CORB for commands */
> +	bool hygon_dword_access:1;
>  
>  	int poll_count;
>  

I hesitate to add another flag just for this platform.
And looking at the changes, all appear to be about the dword access
for sdnctl writes.  So I believe we can simply extend
access_sdnctl_in_dword to do the dword access in each write access,
instead?  The performance shouldn't matter as it's no hot path.

Alternatively, you can enable bus->aligned_mmio flag, but this needs
to enable CONFIG_SND_HDA_ALIGNED_MMIO.  That's a visible cost for
other platforms, though.


thanks,

Takashi