From: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
To: broonie@kernel.org
Cc: greg.malysa@timesys.com, linux-kernel@vger.kernel.org,
linux-spi@vger.kernel.org, nathan.morrison@timesys.com
Subject: RE: [PATCH] spi: cadence-quadspi: Add upper limit safety check to baudrate divisor
Date: Thu, 24 Nov 2022 06:53:54 -0500 [thread overview]
Message-ID: <20221124115354.132832-1-nathan.morrison@timesys.com> (raw)
In-Reply-To: <Y39YJL02jFbkEMqw@sirena.org.uk>
Hi Mark & Dhruva,
Your understanding is correct. This is just checking if the divisor field has exceed the bit field's full scale (0xF) in this case. This was observed when we had a reference block of 500MHz and a max SPI clock of 10MHz setting.
500000000/2*10000000 = 25
25 > 0xF (15)
Would you like me to add a dev_err (or such) bailout error condition and resubmit?
Sincerely,
Nathan
next prev parent reply other threads:[~2022-11-24 11:53 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-23 21:17 [PATCH] spi: cadence-quadspi: Add upper limit safety check to baudrate divisor Nathan Barrett-Morrison
2022-11-24 6:46 ` Dhruva Gole
2022-11-24 11:35 ` Mark Brown
2022-11-24 12:27 ` Dhruva Gole
2022-11-24 12:41 ` Mark Brown
2022-11-24 11:40 ` Mark Brown
2022-11-24 11:53 ` Nathan Barrett-Morrison [this message]
2022-11-24 12:02 ` Mark Brown
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