[PATCH 0/5] spi: dw: use threaded interrupt

[Jisheng Zhang <jszhang@kernel.org>]

To avoid blocking for an excessive amount of time, eventually impacting
on system responsiveness, hard interrupt handlers should finish
executing in as little time as possible.

Use threaded interrupt and move the SPI transfer handling to an
interrupt thread.

After that, since the dw_reader() and dw_writer() are called in
threaded ISR now, so we can delay the unmasking interrupts until no
rx and tx action is taken, thus reduce the interrupt numbers further.

patch1 fixes a trival bug which prevents dma usage for the first
transfer.
patch2, patch3 and patch4 are small clean ups
patch5 does the conversion and optimization.

Here are the performance numbers:

Tested with below two cmds
./spidev_test -D /dev/spidev1.3 -s 30000000 -S 327680 -I 1

./spidev_test -D /dev/spidev1.3 -s 30000000 -S 327680 -I 1000
./rtla timerlat top -q -k -P f:95

The first cmd is to check the interrupt numbers optmizaion result, the
2nd cmd group is to check the threaded interrupt improvement.

Before the patch:
each 32KB spi spidev_test transfer triggers 33118 interrupts

spidev_test reports ~22090kbps
and rtla reports:
                                     Timer Latency
  0 00:00:37   |          IRQ Timer Latency (us)        |         Thread Timer Latency (us)
CPU COUNT      |      cur       min       avg       max |      cur       min       avg       max
  0 #9958      |        1         0        67    103394 |        6         4      2198    105031
  1 #36902     |        1         0         1        18 |        5         4         5        29

After the patch:
each 32KB spi spidev_test transfer only triggers 3 interrupts

spidev_test reports ~23520kbps
and now rtla reports:
                                    Timer Latency
  0 00:00:58   |          IRQ Timer Latency (us)        |         Thread Timer Latency (us)
CPU COUNT      |      cur       min       avg       max |      cur       min       avg       max
  0 #58362     |        1         0         0        29 |        6         3         4        56
  1 #58363     |        1         0         1        23 |        6         4         5        68

In summary:
before the patch	after the patch
33118 interrutps	3 interrupts	 	reduced by 11038 times!
103394 us max latency	29 us max latency	reduced by 3564 times!
22090 kbps		23520 kbps		improved by 6.5%	


Jisheng Zhang (5):
  spi: dw: fix first spi transfer with dma always fallback to PIO
  spi: dw: use the correct error msg if request_irq() fails
  spi: dw: use DW_SPI_ISR directly
  spi: dw: use DW_SPI_INT_MASK instead of hardcoded 0xff
  spi: dw: use threaded interrupt and optimize the threaded ISR

 drivers/spi/spi-dw-core.c | 108 +++++++++++++++++++++++---------------
 drivers/spi/spi-dw-dma.c  |   3 +-
 2 files changed, 67 insertions(+), 44 deletions(-)

-- 
2.53.0