From: Changhuang Liang <changhuang.liang@starfivetech.com>
To: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Mark Brown <broonie@kernel.org>
Cc: Sudip Mukherjee <sudip.mukherjee@sifive.com>,
Serge Semin <fancer.lancer@gmail.com>,
linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org,
Changhuang Liang <changhuang.liang@starfivetech.com>
Subject: [PATCH v1 00/11] Add support for StarFive JHB100 SFC
Date: Wed, 8 Jul 2026 22:51:53 -0700 [thread overview]
Message-ID: <20260709055204.138168-1-changhuang.liang@starfivetech.com> (raw)
This serial add support for the StarFive JHB100 SoC SPI Flash
Controller (SFC), which is based on the Synopsys DesignWare SSI
version 2.00a but with some customizations and it also add
enhanced SPI for DesignWare SPI controllers.
I picked up some patches from series [1].
This series depends on the series [2]:
[1] https://lore.kernel.org/all/20221212180732.79167-1-sudip.mukherjee@sifive.com/
[2] https://lore.kernel.org/all/20260521012932.24163-1-changhuang.liang@starfivetech.com/
The expected SFC device tree configuration is as follows:
sfc0_filter_syscon: syscon@14090000 {
compatible = "starfive,jhb100-sfc-filter-syscon", "syscon";
reg = <0x0 0x14090000 0x0 0x1000>;
};
sfc0: spi@18000000 {
compatible = "starfive,jhb100-sfc";
reg = <0x0 0x18000000 0x0 0x10000>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <111>;
clocks = <&per1crg JHB100_PER1CLK_MAIN_ICG_EN_SFC0>;
resets = <&per1crg JHB100_PER1RST_MAIN_RSTN_SFC0>;
reset-names = "spi";
starfive,sfc-filter-syscon = <&sfc0_filter_syscon>;
num-cs = <2>;
status = "disabled";
};
I will send a new version of series [2] to add the sfc0_filter_syscon node.
Changhuang Liang (2):
spi: dt-bindings: snps,dw-apb-ssi: Add starfive,jhb100-sfc
spi: dw: Add support for StarFive JHB100 SoC SFC
Sudip Mukherjee (9):
spi: dw: Introduce spi_frf and STD_SPI
spi: dw: update NDF while using enhanced spi mode
spi: dw: update SPI_CTRLR0 register
spi: dw: add check for support of enhanced spi
spi: dw: Introduce enhanced single/dual/quad/octal spi
spi: dw: send cmd and addr to start the spi transfer
spi: dw: use irq handler for enhanced spi
spi: dw: adjust size of mem_op
spi: dw: detect enhanced spi mode
.../bindings/spi/snps,dw-apb-ssi.yaml | 22 ++
drivers/spi/spi-dw-core.c | 344 +++++++++++++++++-
drivers/spi/spi-dw-mmio.c | 42 +++
drivers/spi/spi-dw.h | 52 ++-
4 files changed, 450 insertions(+), 10 deletions(-)
--
2.25.1
next reply other threads:[~2026-07-09 6:25 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-09 5:51 Changhuang Liang [this message]
2026-07-09 5:51 ` [PATCH v1 01/11] spi: dw: Introduce spi_frf and STD_SPI Changhuang Liang
2026-07-09 5:51 ` [PATCH v1 02/11] spi: dw: update NDF while using enhanced spi mode Changhuang Liang
2026-07-09 5:51 ` [PATCH v1 03/11] spi: dw: update SPI_CTRLR0 register Changhuang Liang
2026-07-09 5:51 ` [PATCH v1 04/11] spi: dw: add check for support of enhanced spi Changhuang Liang
2026-07-09 5:51 ` [PATCH v1 05/11] spi: dw: Introduce enhanced single/dual/quad/octal spi Changhuang Liang
2026-07-09 5:51 ` [PATCH v1 06/11] spi: dw: send cmd and addr to start the spi transfer Changhuang Liang
2026-07-09 5:52 ` [PATCH v1 07/11] spi: dw: use irq handler for enhanced spi Changhuang Liang
2026-07-09 5:52 ` [PATCH v1 08/11] spi: dw: adjust size of mem_op Changhuang Liang
2026-07-09 5:52 ` [PATCH v1 09/11] spi: dw: detect enhanced spi mode Changhuang Liang
2026-07-09 5:52 ` [PATCH v1 10/11] spi: dt-bindings: snps,dw-apb-ssi: Add starfive,jhb100-sfc Changhuang Liang
2026-07-09 17:55 ` Conor Dooley
2026-07-09 5:52 ` [PATCH v1 11/11] spi: dw: Add support for StarFive JHB100 SoC SFC Changhuang Liang
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260709055204.138168-1-changhuang.liang@starfivetech.com \
--to=changhuang.liang@starfivetech.com \
--cc=broonie@kernel.org \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=fancer.lancer@gmail.com \
--cc=krzk+dt@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-spi@vger.kernel.org \
--cc=robh@kernel.org \
--cc=sudip.mukherjee@sifive.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox