Re: [PATCH 1/5] spi: spi-nxp-fspi: extract function nxp_fspi_dll_override()

[Frank Li <Frank.li@nxp.com>]

On Tue, Sep 16, 2025 at 03:56:40PM +0800, Haibo Chen wrote:
> Extract function nxp_fspi_dll_override(), this is the suggested setting
> when clock rate < 100MHz. Just the preparation of supportting DTR mode.
>
> Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
> ---
>  drivers/spi/spi-nxp-fspi.c | 21 ++++++++++++++-------
>  1 file changed, 14 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/spi/spi-nxp-fspi.c b/drivers/spi/spi-nxp-fspi.c
> index 848fa9319e36d65e8152931324b8e34eb162f5d3..a1c9ad03379682dc1fc2908fbd83e1ae8e91588f 100644
> --- a/drivers/spi/spi-nxp-fspi.c
> +++ b/drivers/spi/spi-nxp-fspi.c
> @@ -674,6 +674,17 @@ static void nxp_fspi_dll_calibration(struct nxp_fspi *f)
>  		dev_warn(f->dev, "DLL lock failed, please fix it!\n");
>  }
>
> +/*
> + * Config the DLL register to default value, enable the target clock delay
> + * line delay cell override mode, and use 1 fixed delay cell in DLL delay
> + * chain, this is the suggested setting when clock rate < 100MHz.
> + */
> +static void nxp_fspi_dll_override(struct nxp_fspi *f)
> +{
> +	fspi_writel(f, FSPI_DLLACR_OVRDEN, f->iobase + FSPI_DLLACR);
> +	fspi_writel(f, FSPI_DLLBCR_OVRDEN, f->iobase + FSPI_DLLBCR);
> +}
> +
>  /*
>   * In FlexSPI controller, flash access is based on value of FSPI_FLSHXXCR0
>   * register and start base address of the target device.
> @@ -756,6 +767,8 @@ static void nxp_fspi_select_mem(struct nxp_fspi *f, struct spi_device *spi,
>  	 */
>  	if (rate > 100000000)
>  		nxp_fspi_dll_calibration(f);
> +	else
> +		nxp_fspi_dll_override(f);

This one doesn't belong trivial code restruture. Suggest use new patch for
it.

Frank
>
>  	f->selected = spi_get_chipselect(spi, 0);
>  }
> @@ -1071,13 +1084,7 @@ static int nxp_fspi_default_setup(struct nxp_fspi *f)
>  	/* Disable the module */
>  	fspi_writel(f, FSPI_MCR0_MDIS, base + FSPI_MCR0);
>
> -	/*
> -	 * Config the DLL register to default value, enable the target clock delay
> -	 * line delay cell override mode, and use 1 fixed delay cell in DLL delay
> -	 * chain, this is the suggested setting when clock rate < 100MHz.
> -	 */
> -	fspi_writel(f, FSPI_DLLACR_OVRDEN, base + FSPI_DLLACR);
> -	fspi_writel(f, FSPI_DLLBCR_OVRDEN, base + FSPI_DLLBCR);
> +	nxp_fspi_dll_override(f);
>
>  	/* enable module */
>  	fspi_writel(f, FSPI_MCR0_AHB_TIMEOUT(0xFF) |
>
> --
> 2.34.1
>