From: Jisheng Zhang <jszhang@kernel.org>
To: Mark Brown <broonie@kernel.org>
Cc: linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3] spi: cadence-xspi: Support 32bit and 64bit slave dma interface
Date: Thu, 4 Jun 2026 07:51:12 +0800 [thread overview]
Message-ID: <aiC98CaOgjs-q39m@xhacker> (raw)
In-Reply-To: <e9259b2d-38f4-47bd-8816-3940c2314e9d@sirena.org.uk>
On Wed, Jun 03, 2026 at 09:20:29AM +0100, Mark Brown wrote:
> On Wed, Jun 03, 2026 at 07:58:25AM +0800, Jisheng Zhang wrote:
>
> > + } else {
> > + if (IS_ALIGNED((uintptr_t)src, 8) && IS_ALIGNED((uintptr_t)buf, 8)) {
> > + readsq(src, buf, len >> 3);
>
> readsq() and writesq() are only defined under CONFIG_64BIT AFAICT, but
> the driver will build on 32 bit. We need to configure out this option
> on 32 bit architectures.
Currently, the cadence-xspi has depended on 64BIT, the dependency was
introduced by commit d58ecc54bb09 ("spi: cadence: Add 64BIT Kconfig
dependency") for marvell sdma handling. So we have two choices:
A. guard the marvell sdma handling with CONFIG_64BIT, and remove the
above hardcoded dependency, then introduce proper readsq/writesq
handling.
B. keep the 64BIT dependency, and review the merge this patch as is.
Which do you prefer? I'll cook newer version if you prefer option A.
Thanks
next prev parent reply other threads:[~2026-06-04 0:10 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-02 23:58 [PATCH v3] spi: cadence-xspi: Support 32bit and 64bit slave dma interface Jisheng Zhang
2026-06-03 8:20 ` Mark Brown
2026-06-03 23:51 ` Jisheng Zhang [this message]
2026-06-04 10:30 ` Mark Brown
2026-06-04 10:27 ` Mark Brown
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