* [PATCH] staging: atomisp: fix coding style issues in mmu_public.h
@ 2026-04-26 4:46 kernelcoredev
2026-04-26 4:46 ` [PATCH] staging: media: " kernelcoredev
0 siblings, 1 reply; 2+ messages in thread
From: kernelcoredev @ 2026-04-26 4:46 UTC (permalink / raw)
To: hansg, mchehab, gregkh
Cc: linux-media, linux-staging, linux-kernel, kernelcoredev
Fix several checkpatch.pl warnings:
- remove leading spaces
- fix block comment style
- avoid open-ended lines
- remove unnecessary return in void function
No functional changes.
Signed-off-by: kernelcoredev <sonionwhat@gmail.com>
---
.../hive_isp_css_include/host/mmu_public.h | 94 +++++++++----------
1 file changed, 44 insertions(+), 50 deletions(-)
diff --git a/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/mmu_public.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/mmu_public.h
index 1a435a348..58b1af384 100644
--- a/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/mmu_public.h
+++ b/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/mmu_public.h
@@ -11,72 +11,66 @@
#include "device_access.h"
#include "assert_support.h"
-/*! Set the page table base index of MMU[ID]
-
- \param ID[in] MMU identifier
- \param base_index[in] page table base index
-
- \return none, MMU[ID].page_table_base_index = base_index
+/* Set the page table base index of MMU[ID]
+ *
+ * \param ID[in] MMU identifier
+ * \param base_index[in] page table base index
+ *
+ * \return none, MMU[ID].page_table_base_index = base_index
*/
-void mmu_set_page_table_base_index(
- const mmu_ID_t ID,
- const hrt_data base_index);
-
-/*! Get the page table base index of MMU[ID]
-
- \param ID[in] MMU identifier
- \param base_index[in] page table base index
-
- \return MMU[ID].page_table_base_index
+void mmu_set_page_table_base_index(const mmu_ID_t ID,
+ const hrt_data base_index);
+
+/* Get the page table base index of MMU[ID]
+ *
+ * \param ID[in] MMU identifier
+ * \param base_index[in] page table base index
+ *
+ * \return MMU[ID].page_table_base_index
*/
-hrt_data mmu_get_page_table_base_index(
- const mmu_ID_t ID);
-
-/*! Invalidate the page table cache of MMU[ID]
+hrt_data mmu_get_page_table_base_index(const mmu_ID_t ID);
- \param ID[in] MMU identifier
-
- \return none
+/* Invalidate the page table cache of MMU[ID]
+ *
+ * \param ID[in] MMU identifier
+ *
+ * \return none
*/
-void mmu_invalidate_cache(
- const mmu_ID_t ID);
-
-/*! Invalidate the page table cache of all MMUs
+void mmu_invalidate_cache(const mmu_ID_t ID);
- \return none
+/* Invalidate the page table cache of all MMUs
+ *
+ * \return none
*/
void mmu_invalidate_cache_all(void);
-/*! Write to a control register of MMU[ID]
-
- \param ID[in] MMU identifier
- \param reg[in] register index
- \param value[in] The data to be written
-
- \return none, MMU[ID].ctrl[reg] = value
+/* Write to a control register of MMU[ID]
+ *
+ * \param ID[in] MMU identifier
+ * \param reg[in] register index
+ * \param value[in] The data to be written
+ *
+ * \return none, MMU[ID].ctrl[reg] = value
*/
-static inline void mmu_reg_store(
- const mmu_ID_t ID,
- const unsigned int reg,
- const hrt_data value)
+static inline void mmu_reg_store(const mmu_ID_t ID,
+ const unsigned int reg,
+ const hrt_data value)
{
assert(ID < N_MMU_ID);
assert(MMU_BASE[ID] != (hrt_address) - 1);
ia_css_device_store_uint32(MMU_BASE[ID] + reg * sizeof(hrt_data), value);
- return;
}
-/*! Read from a control register of MMU[ID]
-
- \param ID[in] MMU identifier
- \param reg[in] register index
- \param value[in] The data to be written
-
- \return MMU[ID].ctrl[reg]
+/* Read from a control register of MMU[ID]
+ *
+ * \param ID[in] MMU identifier
+ * \param reg[in] register index
+ * \param value[in] The data to be written
+ *
+ * \return MMU[ID].ctrl[reg]
*/
-static inline hrt_data mmu_reg_load(
- const mmu_ID_t ID,
- const unsigned int reg)
+static inline hrt_data mmu_reg_load(const mmu_ID_t ID,
+ const unsigned int reg)
{
assert(ID < N_MMU_ID);
assert(MMU_BASE[ID] != (hrt_address) - 1);
--
2.53.0
^ permalink raw reply related [flat|nested] 2+ messages in thread
* [PATCH] staging: media: atomisp: fix coding style issues in mmu_public.h
2026-04-26 4:46 [PATCH] staging: atomisp: fix coding style issues in mmu_public.h kernelcoredev
@ 2026-04-26 4:46 ` kernelcoredev
0 siblings, 0 replies; 2+ messages in thread
From: kernelcoredev @ 2026-04-26 4:46 UTC (permalink / raw)
To: hansg, mchehab, gregkh
Cc: linux-media, linux-staging, linux-kernel, kernelcoredev
Fix several checkpatch.pl warnings:
- remove leading spaces
- fix block comment style
- avoid open-ended lines
- remove unnecessary return in void function
No functional changes.
Signed-off-by: kernelcoredev <sonionwhat@gmail.com>
---
.../hive_isp_css_include/host/mmu_public.h | 94 +++++++++----------
1 file changed, 44 insertions(+), 50 deletions(-)
diff --git a/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/mmu_public.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/mmu_public.h
index 1a435a348..58b1af384 100644
--- a/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/mmu_public.h
+++ b/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/mmu_public.h
@@ -11,72 +11,66 @@
#include "device_access.h"
#include "assert_support.h"
-/*! Set the page table base index of MMU[ID]
-
- \param ID[in] MMU identifier
- \param base_index[in] page table base index
-
- \return none, MMU[ID].page_table_base_index = base_index
+/* Set the page table base index of MMU[ID]
+ *
+ * \param ID[in] MMU identifier
+ * \param base_index[in] page table base index
+ *
+ * \return none, MMU[ID].page_table_base_index = base_index
*/
-void mmu_set_page_table_base_index(
- const mmu_ID_t ID,
- const hrt_data base_index);
-
-/*! Get the page table base index of MMU[ID]
-
- \param ID[in] MMU identifier
- \param base_index[in] page table base index
-
- \return MMU[ID].page_table_base_index
+void mmu_set_page_table_base_index(const mmu_ID_t ID,
+ const hrt_data base_index);
+
+/* Get the page table base index of MMU[ID]
+ *
+ * \param ID[in] MMU identifier
+ * \param base_index[in] page table base index
+ *
+ * \return MMU[ID].page_table_base_index
*/
-hrt_data mmu_get_page_table_base_index(
- const mmu_ID_t ID);
-
-/*! Invalidate the page table cache of MMU[ID]
+hrt_data mmu_get_page_table_base_index(const mmu_ID_t ID);
- \param ID[in] MMU identifier
-
- \return none
+/* Invalidate the page table cache of MMU[ID]
+ *
+ * \param ID[in] MMU identifier
+ *
+ * \return none
*/
-void mmu_invalidate_cache(
- const mmu_ID_t ID);
-
-/*! Invalidate the page table cache of all MMUs
+void mmu_invalidate_cache(const mmu_ID_t ID);
- \return none
+/* Invalidate the page table cache of all MMUs
+ *
+ * \return none
*/
void mmu_invalidate_cache_all(void);
-/*! Write to a control register of MMU[ID]
-
- \param ID[in] MMU identifier
- \param reg[in] register index
- \param value[in] The data to be written
-
- \return none, MMU[ID].ctrl[reg] = value
+/* Write to a control register of MMU[ID]
+ *
+ * \param ID[in] MMU identifier
+ * \param reg[in] register index
+ * \param value[in] The data to be written
+ *
+ * \return none, MMU[ID].ctrl[reg] = value
*/
-static inline void mmu_reg_store(
- const mmu_ID_t ID,
- const unsigned int reg,
- const hrt_data value)
+static inline void mmu_reg_store(const mmu_ID_t ID,
+ const unsigned int reg,
+ const hrt_data value)
{
assert(ID < N_MMU_ID);
assert(MMU_BASE[ID] != (hrt_address) - 1);
ia_css_device_store_uint32(MMU_BASE[ID] + reg * sizeof(hrt_data), value);
- return;
}
-/*! Read from a control register of MMU[ID]
-
- \param ID[in] MMU identifier
- \param reg[in] register index
- \param value[in] The data to be written
-
- \return MMU[ID].ctrl[reg]
+/* Read from a control register of MMU[ID]
+ *
+ * \param ID[in] MMU identifier
+ * \param reg[in] register index
+ * \param value[in] The data to be written
+ *
+ * \return MMU[ID].ctrl[reg]
*/
-static inline hrt_data mmu_reg_load(
- const mmu_ID_t ID,
- const unsigned int reg)
+static inline hrt_data mmu_reg_load(const mmu_ID_t ID,
+ const unsigned int reg)
{
assert(ID < N_MMU_ID);
assert(MMU_BASE[ID] != (hrt_address) - 1);
--
2.53.0
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