* [PATCH 1/3] staging: rtl8723bs: delete empty comment lines in hal_com_reg.h
2026-09-10 22:03 [PATCH 0/3] staging: rtl8723bs: delete empty comment lines Jennifer Guo
@ 2026-09-10 22:03 ` Jennifer Guo
2026-09-10 22:03 ` [PATCH 2/3] staging: rtl8723bs: delete empty comment lines in rtl8723b_*.h files Jennifer Guo
2026-09-10 22:03 ` [PATCH 3/3] staging: rtl8723bs: delete empty comment lines in header files Jennifer Guo
2 siblings, 0 replies; 4+ messages in thread
From: Jennifer Guo @ 2026-09-10 22:03 UTC (permalink / raw)
To: linux-staging; +Cc: gregkh, guojy.bj
Delete all empty comment lines /* */ in hal_com_reg.h as they are not
serving any purpose. Add back a newline if needed for spacing, while
avoiding multiple blank lines.
Signed-off-by: Jennifer Guo <guojy.bj@gmail.com>
---
.../staging/rtl8723bs/include/hal_com_reg.h | 92 +------------------
1 file changed, 3 insertions(+), 89 deletions(-)
diff --git a/drivers/staging/rtl8723bs/include/hal_com_reg.h b/drivers/staging/rtl8723bs/include/hal_com_reg.h
index 4671fdfff916..352280ed3c56 100644
--- a/drivers/staging/rtl8723bs/include/hal_com_reg.h
+++ b/drivers/staging/rtl8723bs/include/hal_com_reg.h
@@ -7,11 +7,7 @@
#ifndef __HAL_COMMON_REG_H__
#define __HAL_COMMON_REG_H__
-/* */
-/* */
/* 0x0000h ~ 0x00FFh System Configuration */
-/* */
-/* */
#define REG_SYS_FUNC_EN 0x0002
#define REG_APS_FSMCO 0x0004
#define REG_SYS_CLKR 0x0008
@@ -36,11 +32,7 @@
#define REG_SYS_CFG 0x00F0
#define REG_GPIO_OUTSTS 0x00F4 /* For RTL8723 only. */
-/* */
-/* */
/* 0x0100h ~ 0x01FFh MACTOP General Configuration */
-/* */
-/* */
#define REG_CR 0x0100
#define REG_PBP 0x0104
#define REG_TRXDMA_CTRL 0x010C
@@ -53,31 +45,18 @@
#define REG_HMETFR 0x01CC
#define REG_HMEBOX_0 0x01D0
-/* */
-/* */
/* 0x0200h ~ 0x027Fh TXDMA Configuration */
-/* */
-/* */
#define REG_RQPN 0x0200
#define REG_TDECTRL 0x0208
#define REG_TXDMA_STATUS 0x0210
#define REG_RQPN_NPQ 0x0214
#define REG_AUTO_LLT 0x0224
-
-/* */
-/* */
/* 0x0280h ~ 0x02FFh RXDMA Configuration */
-/* */
-/* */
#define REG_RXDMA_AGG_PG_TH 0x0280
#define REG_RXPKT_NUM 0x0284
-/* */
-/* */
/* 0x0400h ~ 0x047Fh Protocol Configuration */
-/* */
-/* */
#define REG_TXPKT_EMPTY 0x041A
#define REG_FWHW_TXQ_CTRL 0x0420
#define REG_HWSEQ_CTRL 0x0423
@@ -92,11 +71,7 @@
#define REG_MACID_SLEEP 0x04D4
#define REG_NQOS_SEQ 0x04DC
-/* */
-/* */
/* 0x0500h ~ 0x05FFh EDCA Configuration */
-/* */
-/* */
#define REG_EDCA_VO_PARAM 0x0500
#define REG_EDCA_VI_PARAM 0x0504
#define REG_EDCA_BE_PARAM 0x0508
@@ -108,7 +83,7 @@
#define REG_SLOT 0x051B
#define REG_TXPAUSE 0x0522
#define REG_RD_CTRL 0x0524
-/* */
+
/* Format for offset 540h-542h: */
/* [3:0]: TBTT prohibit setup in unit of 32us. The time for HW getting beacon content before TBTT. */
/* [7:4]: Reserved. */
@@ -122,7 +97,6 @@
/* TBTT */
/* Note: We cannot update beacon content to HW or send any AC packets during the time between Setup and Hold. */
/* Described by Designer Tim and Bruce, 2011-01-14. */
-/* */
#define REG_TBTT_PROHIBIT 0x0540
#define REG_BCN_CTRL 0x0550
#define REG_BCN_CTRL_1 0x0551
@@ -137,11 +111,7 @@
#define REG_TSFTR 0x0560
#define REG_ACMHWCTRL 0x05C0
-/* */
-/* */
/* 0x0600h ~ 0x07FFh WMAC Configuration */
-/* */
-/* */
#define REG_BWOPMODE 0x0603
#define REG_TCR 0x0604
#define REG_RCR 0x0608
@@ -158,7 +128,6 @@
#define REG_ACKTO 0x0640
-/* */
/* Note: */
/* The NAV upper value is very important to WiFi 11n 5.2.3 NAV test. The default value is */
/* always too small, but the WiFi TestPlan test by 25, 000 microseconds of NAV through sending */
@@ -166,7 +135,6 @@
/* The offset of NAV_UPPER in 8192C Spec is incorrect, and the offset should be 0x0652. Commented */
/* by SD1 Scott. */
/* By Bruce, 2011-07-18. */
-/* */
#define REG_NAV_UPPER 0x0652 /* unit of 128 */
/* WMA, BA, CCX */
@@ -184,35 +152,25 @@
#define REG_RXFLTMAP2 0x06A4
#define REG_BCN_PSR_RPT 0x06A8
-/* */
-/* */
/* Redefine 8192C register definition for compatibility */
-/* */
-/* */
#define EFUSE_CTRL REG_EFUSE_CTRL /* E-Fuse Control. */
#define EFUSE_TEST REG_EFUSE_TEST /* E-Fuse Test. */
#define MSR (REG_CR + 2) /* Media Status register */
#define PBP REG_PBP
-/* */
/* 9. Security Control Registers (Offset:) */
-/* */
#define RWCAM REG_CAMCMD /* IN 8190 Data Sheet is called CAMcmd */
#define WCAMI REG_CAMWRITE /* Software write CAM input content */
-/* */
/* 8723/8188E Host System Interrupt Status Register (offset 0x5C, 32 byte) */
-/* */
#define HSISR_GPIO12_0_INT BIT(0)
#define HSISR_SPS_OCP_INT BIT(5)
#define HSISR_RON_INT BIT(6)
#define HSISR_PDNINT BIT(7)
#define HSISR_GPIO9_INT BIT(25)
-/* */
/* Response Rate Set Register (offset 0x440, 24bits) */
-/* */
#define RRSR_1M BIT(0)
#define RRSR_2M BIT(1)
#define RRSR_5_5M BIT(2)
@@ -223,9 +181,7 @@
#define RRSR_CCK_RATES (RRSR_11M|RRSR_5_5M|RRSR_2M|RRSR_1M)
-/* */
/* Rate Definition */
-/* */
/* CCK */
#define RATE_1M BIT(0)
#define RATE_2M BIT(1)
@@ -247,14 +203,10 @@
/* Only use CCK 1M rate for ACK */
#define RATE_RRSR_CCK_ONLY_1M 0xFFFF1
-/* */
/* BW_OPMODE bits (Offset 0x603, 8bit) */
-/* */
#define BW_OPMODE_20MHZ BIT(2)
-/* */
/* CAM Config Setting (offset 0x680, 1 byte) */
-/* */
#define CAM_VALID BIT(15)
#define CAM_CONTENT_COUNT 8
@@ -266,13 +218,9 @@
#define CAM_WRITE BIT(16)
#define CAM_POLLINIG BIT(31)
-/* */
/* 12. Host Interrupt Status Registers */
-/* */
-/* */
/* 8192C (RCR) Receive Configuration Register (Offset 0x608, 32 bits) */
-/* */
#define RCR_APPFCS BIT(31) /* WMAC append FCS after payload */
#define RCR_APP_MIC BIT(30) /* MACRX will retain the MIC at the bottom of the packet. */
#define RCR_APP_ICV BIT(29) /* MACRX will retain the ICV at the bottom of the packet. */
@@ -289,11 +237,7 @@
#define RCR_APM BIT(1) /* Accept physical match packet */
-/* */
-/* */
/* 0x0000h ~ 0x00FFh System Configuration */
-/* */
-/* */
/* 2 SYS_FUNC_EN */
#define FEN_BBRSTB BIT(0)
@@ -350,11 +294,7 @@
/* 2 REG_GPIO_OUTSTS (For RTL8723 only) */
#define RF_RL_ID (BIT(31)|BIT(30)|BIT(29)|BIT(28))
-/* */
-/* */
/* 0x0100h ~ 0x01FFh MACTOP General Configuration */
-/* */
-/* */
/* 2 Function Enable Registers */
/* 2 CR */
@@ -397,11 +337,8 @@
#define QUEUE_NORMAL 2
#define QUEUE_HIGH 3
-/* */
-/* */
/* 0x0200h ~ 0x027Fh TXDMA Configuration */
-/* */
-/* */
+
/* 2 RQPN */
#define _HPQ(x) ((x) & 0xFF)
#define _LPQ(x) (((x) & 0xFF) << 8)
@@ -413,11 +350,7 @@
/* 2 AUTO_LLT */
#define BIT_AUTO_INIT_LLT BIT(16)
-/* */
-/* */
/* 0x0280h ~ 0x028Bh RX DMA Configuration */
-/* */
-/* */
/* 2 REG_RXDMA_CONTROL, 0x0286h */
/* Write only. When this bit is set, RXDMA will decrease RX PKT counter by one. Before */
@@ -435,11 +368,8 @@
#define RXDMA_IDLE BIT(17)
#define RW_RELEASE_EN BIT(18)
-/* */
-/* */
/* 0x0400h ~ 0x047Fh Protocol Configuration */
-/* */
-/* */
+
/* 2 FWHW_TXQ_CTRL */
#define EN_AMPDU_RTY_NEW BIT(7)
@@ -452,11 +382,7 @@
#define RETRY_LIMIT_SHORT_SHIFT 8
#define RETRY_LIMIT_LONG_SHIFT 0
-/* */
-/* */
/* 0x0500h ~ 0x05FFh EDCA Configuration */
-/* */
-/* */
#define _LRL(x) ((x) & 0x3F)
#define _SRL(x) (((x) & 0x3F) << 8)
@@ -476,11 +402,7 @@
#define AcmHw_ViqEn BIT(2)
#define AcmHw_VoqEn BIT(3)
-/* */
-/* */
/* 0x0600h ~ 0x07FFh WMAC Configuration */
-/* */
-/* */
/* 2 TCR */
#define TSFRST BIT(0)
@@ -497,11 +419,7 @@
#define SCR_RXBCUSEDK BIT(7) /* Force Rx Broadcast packets Use Default Key */
#define SCR_CHK_KEYID BIT(8)
-/* */
-/* */
/* SDIO Bus Specification */
-/* */
-/* */
/* I/O bus domain address mapping */
#define SDIO_LOCAL_BASE 0x10250000
@@ -578,11 +496,7 @@
/* SDIO Tx FIFO related */
#define SDIO_TX_FREE_PG_QUEUE 4 /* The number of Tx FIFO free page */
-/* */
-/* */
/* 0xFE00h ~ 0xFE55h USB Configuration */
-/* */
-/* */
/* 2REG_C2HEVT_CLEAR */
#define C2H_EVT_HOST_CLOSE 0x00 /* Set by driver and notify FW that the driver has read the C2H command message */
--
2.34.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 2/3] staging: rtl8723bs: delete empty comment lines in rtl8723b_*.h files
2026-09-10 22:03 [PATCH 0/3] staging: rtl8723bs: delete empty comment lines Jennifer Guo
2026-09-10 22:03 ` [PATCH 1/3] staging: rtl8723bs: delete empty comment lines in hal_com_reg.h Jennifer Guo
@ 2026-09-10 22:03 ` Jennifer Guo
2026-09-10 22:03 ` [PATCH 3/3] staging: rtl8723bs: delete empty comment lines in header files Jennifer Guo
2 siblings, 0 replies; 4+ messages in thread
From: Jennifer Guo @ 2026-09-10 22:03 UTC (permalink / raw)
To: linux-staging; +Cc: gregkh, guojy.bj
Delete all empty comment lines /* */ in
include/rtl8723b_*.h header files as they are not serving any purpose.
Add back a newline if needed for spacing, while avoiding multiple blank
lines.
Signed-off-by: Jennifer Guo <guojy.bj@gmail.com>
---
.../staging/rtl8723bs/include/rtl8723b_cmd.h | 8 +--
.../staging/rtl8723bs/include/rtl8723b_dm.h | 10 +--
.../staging/rtl8723bs/include/rtl8723b_hal.h | 4 --
.../staging/rtl8723bs/include/rtl8723b_spec.h | 72 +------------------
.../staging/rtl8723bs/include/rtl8723b_xmit.h | 10 +--
5 files changed, 7 insertions(+), 97 deletions(-)
diff --git a/drivers/staging/rtl8723bs/include/rtl8723b_cmd.h b/drivers/staging/rtl8723bs/include/rtl8723b_cmd.h
index 6b2d79e19088..fb874971a2d4 100644
--- a/drivers/staging/rtl8723bs/include/rtl8723b_cmd.h
+++ b/drivers/staging/rtl8723bs/include/rtl8723b_cmd.h
@@ -7,9 +7,7 @@
#ifndef __RTL8723B_CMD_H__
#define __RTL8723B_CMD_H__
-/* */
/* H2C CMD DEFINITION ------------------------------------------------ */
-/* */
enum {
/* Common Class: 000 */
@@ -71,9 +69,9 @@ enum {
H2C_8723B_RESET_TSF = 0xC0,
H2C_8723B_MAXID,
};
-/* */
+
/* H2C CMD CONTENT -------------------------------------------------- */
-/* */
+
/* _RSVDPAGE_LOC_CMD_0x00 */
#define SET_8723B_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd, 0, 8, __Value)
#define SET_8723B_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+1, 0, 8, __Value)
@@ -158,9 +156,7 @@ enum {
#define SET_8723B_H2CCMD_BT_FW_PATCH_ADDR2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value)
#define SET_8723B_H2CCMD_BT_FW_PATCH_ADDR3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value)
-/* */
/* Function Statement -------------------------------------------------- */
-/* */
/* host message to firmware cmd */
void rtl8723b_set_FwPwrMode_cmd(struct adapter *padapter, u8 Mode);
diff --git a/drivers/staging/rtl8723bs/include/rtl8723b_dm.h b/drivers/staging/rtl8723bs/include/rtl8723b_dm.h
index 50ab7aed079e..cc94edcaeb3c 100644
--- a/drivers/staging/rtl8723bs/include/rtl8723b_dm.h
+++ b/drivers/staging/rtl8723bs/include/rtl8723b_dm.h
@@ -6,21 +6,13 @@
******************************************************************************/
#ifndef __RTL8723B_DM_H__
#define __RTL8723B_DM_H__
-/* */
+
/* Description: */
-/* */
/* This file is for 8723B dynamic mechanism only */
-/* */
-/* */
-/* */
-/* */
/* structure and define */
-/* */
-/* */
/* function prototype */
-/* */
void rtl8723b_init_dm_priv(struct adapter *padapter);
diff --git a/drivers/staging/rtl8723bs/include/rtl8723b_hal.h b/drivers/staging/rtl8723bs/include/rtl8723b_hal.h
index 497b1cbc54c8..8d1d721a6d72 100644
--- a/drivers/staging/rtl8723bs/include/rtl8723b_hal.h
+++ b/drivers/staging/rtl8723bs/include/rtl8723b_hal.h
@@ -19,9 +19,7 @@
#include "Hal8192CPhyReg.h"
#include "hal_phy_cfg.h"
-/* */
/* RTL8723B From header */
-/* */
#define FW_8723B_SIZE 0x8000
#define FW_8723B_START_ADDRESS 0x1000
@@ -150,9 +148,7 @@ struct rt_firmware_hdr {
#define EFUSE_ACCESS_ON 0x69 /* For RTL8723 only. */
#define EFUSE_ACCESS_OFF 0x00 /* For RTL8723 only. */
-/* */
/* EFUSE for BT definition */
-/* */
#define EFUSE_BT_REAL_BANK_CONTENT_LEN 512
#define EFUSE_BT_REAL_CONTENT_LEN 1536 /* 512*3 */
#define EFUSE_BT_MAP_LEN 1024 /* 1k bytes */
diff --git a/drivers/staging/rtl8723bs/include/rtl8723b_spec.h b/drivers/staging/rtl8723bs/include/rtl8723b_spec.h
index 7f749e32a5b9..a5ca5ae1a934 100644
--- a/drivers/staging/rtl8723bs/include/rtl8723b_spec.h
+++ b/drivers/staging/rtl8723bs/include/rtl8723b_spec.h
@@ -9,11 +9,7 @@
#define HAL_NAV_UPPER_UNIT_8723B 128 /* micro-second */
-/* */
-/* */
/* 0x0000h ~ 0x00FFh System Configuration */
-/* */
-/* */
#define REG_RSV_CTRL_8723B 0x001C /* 3 Byte */
#define REG_BT_WIFI_ANTENNA_SWITCH_8723B 0x0038
#define REG_HSISR_8723B 0x005c
@@ -29,11 +25,7 @@
#define REG_HISR1_8723B 0x00BC
#define REG_PMC_DBG_CTRL2_8723B 0x00CC
-/* */
-/* */
/* 0x0100h ~ 0x01FFh MACTOP General Configuration */
-/* */
-/* */
#define REG_C2HEVT_CMD_ID_8723B 0x01A0
#define REG_C2HEVT_CMD_LEN_8723B 0x01AE
#define REG_WOWLAN_WAKE_REASON 0x01C7
@@ -45,25 +37,14 @@
#define REG_HMEBOX_EXT2_8723B 0x01F8
#define REG_HMEBOX_EXT3_8723B 0x01FC
-/* */
-/* */
/* 0x0200h ~ 0x027Fh TXDMA Configuration */
-/* */
-/* */
-/* */
-/* */
/* 0x0280h ~ 0x02FFh RXDMA Configuration */
-/* */
-/* */
+
#define REG_RXDMA_CONTROL_8723B 0x0286 /* Control the RX DMA. */
#define REG_RXDMA_MODE_CTRL_8723B 0x0290
-/* */
-/* */
/* 0x0300h ~ 0x03FFh PCIe */
-/* */
-/* */
#define REG_PCIE_CTRL_REG_8723B 0x0300
#define REG_INT_MIG_8723B 0x0304 /* Interrupt Migration */
#define REG_BCNQ_DESA_8723B 0x0308 /* TX Beacon Descriptor Address */
@@ -86,49 +67,27 @@
#define REG_PCIE_HCPWM_8723B 0x0363 /* PCIe CPWM */
#define REG_PCIE_MULTIFET_CTRL_8723B 0x036A /* PCIE Multi-Fethc Control */
-/* */
-/* */
/* 0x0400h ~ 0x047Fh Protocol Configuration */
-/* */
-/* */
#define REG_TXPKTBUF_BCNQ_BDNY_8723B 0x0424
#define REG_TXPKTBUF_MGQ_BDNY_8723B 0x0425
#define REG_TXPKTBUF_WMAC_LBK_BF_HD_8723B 0x045D
#define REG_AMPDU_BURST_MODE_8723B 0x04BC
-/* */
-/* */
/* 0x0500h ~ 0x05FFh EDCA Configuration */
-/* */
-/* */
#define REG_SECONDARY_CCA_CTRL_8723B 0x0577
-/* */
-/* */
/* 0x0600h ~ 0x07FFh WMAC Configuration */
-/* */
-/* */
-/* */
/* SDIO Bus Specification */
-/* */
-/* */
/* SDIO CMD Address Mapping */
-/* */
-/* */
/* I/O bus domain (Host) */
-/* */
-/* */
/* SDIO register */
-/* */
#define SDIO_REG_HCPWM1_8723B 0x025 /* HCI Current Power Mode 1 */
-/* */
/* 8723 Register Bit and Content definition */
-/* */
/* 2 HSISR */
/* interrupt mask which needs to clear */
@@ -138,54 +97,27 @@
HSISR_PDNINT |\
HSISR_GPIO9_INT)
-/* */
-/* */
/* 0x0100h ~ 0x01FFh MACTOP General Configuration */
-/* */
-/* */
-/* */
-/* */
/* 0x0200h ~ 0x027Fh TXDMA Configuration */
-/* */
-/* */
-/* */
-/* */
/* 0x0280h ~ 0x02FFh RXDMA Configuration */
-/* */
-/* */
#define BIT_USB_RXDMA_AGG_EN BIT(31)
#define RXDMA_AGG_MODE_EN BIT(1)
-/* */
-/* */
/* 0x0400h ~ 0x047Fh Protocol Configuration */
-/* */
-/* */
-/* */
/* 8723B REG_CCK_CHECK (offset 0x454) */
-/* */
+
#define BIT_BCN_PORT_SEL BIT(5)
-/* */
-/* */
/* 0x0500h ~ 0x05FFh EDCA Configuration */
-/* */
-/* */
-/* */
-/* */
/* 0x0600h ~ 0x07FFh WMAC Configuration */
-/* */
-/* */
#define EEPROM_RF_GAIN_OFFSET 0xC1
#define EEPROM_RF_GAIN_VAL 0x1F6
-/* */
/* 8195 IMR/ISR bits (offset 0xB0, 8bits) */
-/* */
#define IMR_DISABLED_8723B 0
/* IMR DW0(0x00B0-00B3) Bit 0-31 */
#define IMR_TIMER2_8723B BIT(31) /* Timeout interrupt 2 */
diff --git a/drivers/staging/rtl8723bs/include/rtl8723b_xmit.h b/drivers/staging/rtl8723bs/include/rtl8723b_xmit.h
index ddf868c7899b..d02ead67777a 100644
--- a/drivers/staging/rtl8723bs/include/rtl8723b_xmit.h
+++ b/drivers/staging/rtl8723bs/include/rtl8723b_xmit.h
@@ -7,9 +7,7 @@
#ifndef __RTL8723B_XMIT_H__
#define __RTL8723B_XMIT_H__
-/* */
/* Queue Select Value in TxDesc */
-/* */
#define QSLT_BK 0x2/* 0x01 */
#define QSLT_BE 0x0
#define QSLT_VI 0x5/* 0x4 */
@@ -56,9 +54,7 @@
/* OFFSET 20 */
#define SGI BIT(6)
-/* */
/* defined for TX DESC Operation */
-/* */
struct txdesc_8723b {
/* Offset 0 */
u32 pktlen:16;
@@ -364,11 +360,9 @@ struct txdesc_8723b {
#define SET_EARLYMODE_LEN3_8723B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value)
#endif
-/* */
-/* */
+
/* Rate */
-/* */
-/* */
+
/* CCK Rates, TxHT = 0 */
#define DESC8723B_RATE1M 0x00
#define DESC8723B_RATE2M 0x01
--
2.34.1
^ permalink raw reply related [flat|nested] 4+ messages in thread* [PATCH 3/3] staging: rtl8723bs: delete empty comment lines in header files
2026-09-10 22:03 [PATCH 0/3] staging: rtl8723bs: delete empty comment lines Jennifer Guo
2026-09-10 22:03 ` [PATCH 1/3] staging: rtl8723bs: delete empty comment lines in hal_com_reg.h Jennifer Guo
2026-09-10 22:03 ` [PATCH 2/3] staging: rtl8723bs: delete empty comment lines in rtl8723b_*.h files Jennifer Guo
@ 2026-09-10 22:03 ` Jennifer Guo
2 siblings, 0 replies; 4+ messages in thread
From: Jennifer Guo @ 2026-09-10 22:03 UTC (permalink / raw)
To: linux-staging; +Cc: gregkh, guojy.bj
Delete all empty comment lines in a bunch of include/ header files.
Add back a newline if needed for spacing, while avoiding multiple blank
lines.
Signed-off-by: Jennifer Guo <guojy.bj@gmail.com>
---
drivers/staging/rtl8723bs/include/HalPwrSeqCmd.h | 2 --
drivers/staging/rtl8723bs/include/basic_types.h | 2 --
drivers/staging/rtl8723bs/include/drv_types.h | 3 ---
drivers/staging/rtl8723bs/include/hal_com.h | 5 ++---
drivers/staging/rtl8723bs/include/hal_com_h2c.h | 2 --
drivers/staging/rtl8723bs/include/hal_data.h | 1 -
drivers/staging/rtl8723bs/include/hal_phy.h | 3 +--
drivers/staging/rtl8723bs/include/rtw_eeprom.h | 2 --
drivers/staging/rtl8723bs/include/rtw_efuse.h | 4 +---
drivers/staging/rtl8723bs/include/rtw_mlme_ext.h | 2 --
drivers/staging/rtl8723bs/include/rtw_recv.h | 2 --
drivers/staging/rtl8723bs/include/sta_info.h | 7 +------
12 files changed, 5 insertions(+), 30 deletions(-)
diff --git a/drivers/staging/rtl8723bs/include/HalPwrSeqCmd.h b/drivers/staging/rtl8723bs/include/HalPwrSeqCmd.h
index b81252d374ef..a0c4461557e7 100644
--- a/drivers/staging/rtl8723bs/include/HalPwrSeqCmd.h
+++ b/drivers/staging/rtl8723bs/include/HalPwrSeqCmd.h
@@ -98,9 +98,7 @@ struct wlan_pwr_cfg {
#define GET_PWR_CFG_VALUE(__PWR_CMD) __PWR_CMD.value
-/* */
/* Prototype of protected function. */
-/* */
u8 HalPwrSeqCmdParsing(
struct adapter *padapter,
u8 CutVersion,
diff --git a/drivers/staging/rtl8723bs/include/basic_types.h b/drivers/staging/rtl8723bs/include/basic_types.h
index aaa1e60f4295..ff6435e2ca68 100644
--- a/drivers/staging/rtl8723bs/include/basic_types.h
+++ b/drivers/staging/rtl8723bs/include/basic_types.h
@@ -25,9 +25,7 @@
* 3. After read integer from IO.
*/
-/* */
/* Byte Swapping routine. */
-/* */
#define EF1Byte (u8)
#define EF2Byte le16_to_cpu
#define EF4Byte le32_to_cpu
diff --git a/drivers/staging/rtl8723bs/include/drv_types.h b/drivers/staging/rtl8723bs/include/drv_types.h
index 20265770ed77..9de6a3f7364b 100644
--- a/drivers/staging/rtl8723bs/include/drv_types.h
+++ b/drivers/staging/rtl8723bs/include/drv_types.h
@@ -209,7 +209,6 @@ struct dvobj_priv {
s32 processing_dev_remove;
/* for local/global synchronization */
- /* */
spinlock_t lock;
int macid[NUM_STA];
@@ -377,9 +376,7 @@ struct adapter {
#define adapter_to_pwrctl(adapter) (dvobj_to_pwrctl(adapter->dvobj))
#define adapter_wdev_data(adapter) (&((adapter)->wdev_data))
-/* */
/* Function disabled. */
-/* */
#define DF_TX_BIT BIT(0)
#define DF_RX_BIT BIT(1)
#define DF_IO_BIT BIT(2)
diff --git a/drivers/staging/rtl8723bs/include/hal_com.h b/drivers/staging/rtl8723bs/include/hal_com.h
index 17bce0f88bac..6cf4f7f678d2 100644
--- a/drivers/staging/rtl8723bs/include/hal_com.h
+++ b/drivers/staging/rtl8723bs/include/hal_com.h
@@ -15,10 +15,9 @@
/*------------------------------ Tx Desc definition Macro ------------------------*/
/* pragma mark -- Tx Desc related definition. -- */
-/* */
-/* */
+
/* Rate */
-/* */
+
/* CCK Rates, TxHT = 0 */
#define DESC_RATE1M 0x00
#define DESC_RATE2M 0x01
diff --git a/drivers/staging/rtl8723bs/include/hal_com_h2c.h b/drivers/staging/rtl8723bs/include/hal_com_h2c.h
index a59d13090565..889b12719e2e 100644
--- a/drivers/staging/rtl8723bs/include/hal_com_h2c.h
+++ b/drivers/staging/rtl8723bs/include/hal_com_h2c.h
@@ -14,9 +14,7 @@
#define H2C_MACID_CFG_LEN 7
#define H2C_RSSI_SETTING_LEN 4
-/* */
/* Structure -------------------------------------------------- */
-/* */
struct rsvdpage_loc {
u8 LocProbeRsp;
u8 LocPsPoll;
diff --git a/drivers/staging/rtl8723bs/include/hal_data.h b/drivers/staging/rtl8723bs/include/hal_data.h
index 614fd885451b..07a956cc47f6 100644
--- a/drivers/staging/rtl8723bs/include/hal_data.h
+++ b/drivers/staging/rtl8723bs/include/hal_data.h
@@ -174,7 +174,6 @@ struct hal_com_data {
/* RF: at most 2 = AB = 0/1 */
/* CCK = 0 OFDM = 1 HT-MCS 0-7 = 2 */
s8 TxPwrByRateOffset[MAX_RF_PATH_NUM][TX_PWR_BY_RATE_NUM_RATE];
- /* */
/* Power Limit Table for 2.4G */
s8 TxPwrLimit_2_4G[MAX_REGULATION_NUM]
diff --git a/drivers/staging/rtl8723bs/include/hal_phy.h b/drivers/staging/rtl8723bs/include/hal_phy.h
index ec9bc47816db..2e519a3044d8 100644
--- a/drivers/staging/rtl8723bs/include/hal_phy.h
+++ b/drivers/staging/rtl8723bs/include/hal_phy.h
@@ -6,10 +6,9 @@
******************************************************************************/
#ifndef __HAL_PHY_H__
#define __HAL_PHY_H__
-/* */
+
/* Antenna detection method, i.e., using single tone detection or RSSI reported from each antenna detected. */
/* Added by Roger, 2013.05.22. */
-/* */
#define ANT_DETECT_BY_SINGLE_TONE BIT(0)
#define ANT_DETECT_BY_RSSI BIT(1)
#define IS_ANT_DETECT_SUPPORT_SINGLE_TONE(__Adapter) ((GET_HAL_DATA(__Adapter)->AntDetection) & ANT_DETECT_BY_SINGLE_TONE)
diff --git a/drivers/staging/rtl8723bs/include/rtw_eeprom.h b/drivers/staging/rtl8723bs/include/rtw_eeprom.h
index 9b84105af816..4294b021f1bd 100644
--- a/drivers/staging/rtl8723bs/include/rtw_eeprom.h
+++ b/drivers/staging/rtl8723bs/include/rtw_eeprom.h
@@ -34,14 +34,12 @@
#define eeprom_cis0_sz 17
#define eeprom_cis1_sz 50
-/* */
/* Customer ID, note that: */
/* This variable is initiailzed through EEPROM or registry, */
/* however, its definition may be different with that in EEPROM for */
/* EEPROM size consideration. So, we have to perform proper translation between them. */
/* Besides, CustomerID of registry has precedence of that of EEPROM. */
/* defined below. 060703, by rcnjko. */
-/* */
enum {
RT_CID_DEFAULT = 0,
RT_CID_8187_ALPHA0 = 1,
diff --git a/drivers/staging/rtl8723bs/include/rtw_efuse.h b/drivers/staging/rtl8723bs/include/rtw_efuse.h
index 1e5d61f4587b..865a47637b5a 100644
--- a/drivers/staging/rtl8723bs/include/rtw_efuse.h
+++ b/drivers/staging/rtl8723bs/include/rtw_efuse.h
@@ -30,13 +30,11 @@ enum {
#define EFUSE_REPEAT_THRESHOLD_ 3
-/* */
/* The following is for BT Efuse definition */
-/* */
#define EFUSE_BT_MAX_MAP_LEN 1024
#define EFUSE_MAX_BANK 4
#define EFUSE_MAX_BT_BANK (EFUSE_MAX_BANK-1)
-/* */
+
/*--------------------------Define Parameters-------------------------------*/
#define EFUSE_MAX_WORD_UNIT 4
diff --git a/drivers/staging/rtl8723bs/include/rtw_mlme_ext.h b/drivers/staging/rtl8723bs/include/rtw_mlme_ext.h
index d486cd462509..eaa3e9e9d58f 100644
--- a/drivers/staging/rtl8723bs/include/rtw_mlme_ext.h
+++ b/drivers/staging/rtl8723bs/include/rtw_mlme_ext.h
@@ -70,14 +70,12 @@ extern unsigned char WMM_INFO_OUI[];
extern unsigned char WMM_PARA_OUI[];
-/* */
/* Channel Plan Type. */
/* Note: */
/* We just add new channel plan when the new channel plan is different from any of the following */
/* channel plan. */
/* If you just want to customize the actions(scan period or join actions) about one of the channel plan, */
/* customize them in rt_channel_info in the RT_CHANNEL_LIST. */
-/* */
enum {
/* old channel plan mapping ===== */
RT_CHANNEL_DOMAIN_FCC = 0x00,
diff --git a/drivers/staging/rtl8723bs/include/rtw_recv.h b/drivers/staging/rtl8723bs/include/rtw_recv.h
index 5c197bd6915f..3c94f97d86db 100644
--- a/drivers/staging/rtl8723bs/include/rtw_recv.h
+++ b/drivers/staging/rtl8723bs/include/rtw_recv.h
@@ -296,8 +296,6 @@ struct recv_frame_hdr {
void *precvbuf;
-
- /* */
struct sta_info *psta;
/* for A-MPDU Rx reordering buffer control */
diff --git a/drivers/staging/rtl8723bs/include/sta_info.h b/drivers/staging/rtl8723bs/include/sta_info.h
index bc78c32192c0..9fa5d5319997 100644
--- a/drivers/staging/rtl8723bs/include/sta_info.h
+++ b/drivers/staging/rtl8723bs/include/sta_info.h
@@ -189,16 +189,13 @@ struct sta_info {
/* ODM_STA_INFO_T */
/* ================ODM Relative Info ======================= */
/* Please be care, dont declare too much structure here. It will cost memory * STA support num. */
- /* */
- /* */
/* 2011/10/20 MH Add for ODM STA info. */
- /* */
/* Driver Write */
u8 bValid; /* record the sta status link or not? */
u8 IOTPeer; /* Enum value. HT_IOT_PEER_E */
/* ODM Write */
/* 1 PHY_STATUS_INFO */
- u8 RSSI_Path[4]; /* */
+ u8 RSSI_Path[4];
u8 RSSI_Ave;
u8 RXEVM[4];
u8 RXSNR[4];
@@ -207,9 +204,7 @@ struct sta_info {
/* ODM Write */
/* 1 TX_INFO (may changed by IC) */
/* TX_INFO_T pTxInfo; Define in IC folder. Move lower layer. */
- /* */
/* ================ODM Relative Info ======================= */
- /* */
/* To store the sequence number of received management frame */
u16 rx_mgmt_frame_seq_num;
--
2.34.1
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