From: Andre Przywara <andre.przywara@arm.com>
To: Jernej Skrabec <jernej.skrabec@gmail.com>,
Samuel Holland <samuel@sholland.org>,
Chen-Yu Tsai <wens@csie.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: devicetree@vger.kernel.org, linux-sunxi@lists.linux.dev,
linux-arm-kernel@lists.infradead.org,
Icenowy Zheng <uwu@icenowy.me>,
Mauro Carvalho Chehab <mchehab@kernel.org>,
linux-media@vger.kernel.org
Subject: [PATCH 7/9] ARM: dts: suniv: f1c100s: add CIR DT node
Date: Tue, 1 Nov 2022 14:16:56 +0000 [thread overview]
Message-ID: <20221101141658.3631342-8-andre.przywara@arm.com> (raw)
In-Reply-To: <20221101141658.3631342-1-andre.przywara@arm.com>
The CIR (infrared receiver) controller in the Allwinner F1C100s series
of SoCs is compatible to the ones used in other Allwinner SoCs.
Add the DT node describing the resources of the controller.
There are multiple possible pinmuxes, but none as them seem to be an
obvious choice, so refrain from adding any pincontroller subnodes for
now.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arch/arm/boot/dts/suniv-f1c100s.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/suniv-f1c100s.dtsi b/arch/arm/boot/dts/suniv-f1c100s.dtsi
index 2901c586971b4..d29b48f23b89a 100644
--- a/arch/arm/boot/dts/suniv-f1c100s.dtsi
+++ b/arch/arm/boot/dts/suniv-f1c100s.dtsi
@@ -251,6 +251,17 @@ pwm: pwm@1c21000 {
status = "disabled";
};
+ ir: ir@1c22c00 {
+ compatible = "allwinner,suniv-f1c100s-ir",
+ "allwinner,sun6i-a31-ir";
+ reg = <0x01c22c00 0x400>;
+ clocks = <&ccu CLK_BUS_IR>, <&ccu CLK_IR>;
+ clock-names = "apb", "ir";
+ resets = <&ccu RST_BUS_IR>;
+ interrupts = <6>;
+ status = "disabled";
+ };
+
uart0: serial@1c25000 {
compatible = "snps,dw-apb-uart";
reg = <0x01c25000 0x400>;
--
2.25.1
next prev parent reply other threads:[~2022-11-01 14:17 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-01 14:16 [PATCH 0/9] ARM: dts: suniv: F1C100s: add more peripherals Andre Przywara
2022-11-01 14:16 ` [PATCH 1/9] dt-bindings: pwm: allwinner,sun4i-a10: Add F1C100s compatible Andre Przywara
2022-11-02 17:28 ` Rob Herring
2022-11-17 12:05 ` Uwe Kleine-König
2022-11-01 14:16 ` [PATCH 2/9] ARM: dts: suniv: f1c100s: add PWM node Andre Przywara
2022-11-06 7:56 ` Jernej Škrabec
2022-11-17 12:03 ` Uwe Kleine-König
2022-11-17 13:43 ` Andre Przywara
2022-11-01 14:16 ` [PATCH 3/9] dt-bindings: i2c: mv64xxx: Add F1C100s compatible string Andre Przywara
2022-11-02 17:28 ` Rob Herring
2022-11-02 20:19 ` Wolfram Sang
2022-11-01 14:16 ` [PATCH 4/9] ARM: dts: suniv: f1c100s: add I2C DT nodes Andre Przywara
2022-11-06 8:09 ` Jernej Škrabec
2022-11-06 23:12 ` Andre Przywara
2022-11-01 14:16 ` [PATCH 5/9] clk: sunxi-ng: f1c100s: Add IR mod clock Andre Przywara
2022-11-06 8:22 ` Jernej Škrabec
2022-11-01 14:16 ` [PATCH 6/9] dt-bindings: media: IR: Add F1C100s IR compatible string Andre Przywara
2022-11-02 17:28 ` Rob Herring
2022-11-01 14:16 ` Andre Przywara [this message]
2022-11-06 8:23 ` [PATCH 7/9] ARM: dts: suniv: f1c100s: add CIR DT node Jernej Škrabec
2022-11-01 14:16 ` [PATCH 8/9] dt-bindings: input: sun4i-lradc-keys: Add F1C100s compatible Andre Przywara
2022-11-02 17:28 ` Rob Herring
2022-11-03 20:45 ` Dmitry Torokhov
2022-11-01 14:16 ` [PATCH 9/9] ARM: dts: suniv: f1c100s: add LRADC node Andre Przywara
2022-11-06 8:25 ` Jernej Škrabec
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