ARM Sunxi Platform Development
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From: Samuel Holland <samuel@sholland.org>
To: Joerg Roedel <joro@8bytes.org>, Will Deacon <will@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>, Chen-Yu Tsai <wens@csie.org>,
	Jernej Skrabec <jernej.skrabec@gmail.com>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Rob Herring <robh+dt@kernel.org>
Cc: iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
	linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org, Maxime Ripard <mripard@kernel.org>,
	Samuel Holland <samuel@sholland.org>
Subject: [PATCH v2 3/6] iommu/sun50i: Keep the bypass register up to date
Date: Mon,  2 Jan 2023 19:09:00 -0600	[thread overview]
Message-ID: <20230103010903.11181-4-samuel@sholland.org> (raw)
In-Reply-To: <20230103010903.11181-1-samuel@sholland.org>

Currently, the IOMMU driver leaves the bypass register at its default
value. The H6 variant of the hardware disables bypass by default. So
once the first device is attached to the IOMMU, translation is enabled
for all masters, even those not attached to an IOMMU group/domain.

On the other hand, the D1 hardware variant enables bypass by default, so
keeping the default value prevents the IOMMU from functioning entirely.

Fixes: 4100b8c229b3 ("iommu: Add Allwinner H6 IOMMU driver")
Signed-off-by: Samuel Holland <samuel@sholland.org>
---

Changes in v2:
 - Set bypass based on attached devices instead of using a fixed value

 drivers/iommu/sun50i-iommu.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/drivers/iommu/sun50i-iommu.c b/drivers/iommu/sun50i-iommu.c
index 3757d5a18318..a3a462933c62 100644
--- a/drivers/iommu/sun50i-iommu.c
+++ b/drivers/iommu/sun50i-iommu.c
@@ -441,6 +441,9 @@ static int sun50i_iommu_enable(struct sun50i_iommu *iommu)
 
 	spin_lock_irqsave(&iommu->iommu_lock, flags);
 
+	iommu_write(iommu, IOMMU_BYPASS_REG,
+		    ~atomic_read(&sun50i_domain->masters));
+
 	iommu_write(iommu, IOMMU_TTB_REG, sun50i_domain->dt_dma);
 	iommu_write(iommu, IOMMU_TLB_PREFETCH_REG,
 		    IOMMU_TLB_PREFETCH_MASTER_ENABLE(0) |
@@ -755,6 +758,17 @@ static void sun50i_iommu_detach_domain(struct sun50i_iommu *iommu,
 	iommu->domain = NULL;
 }
 
+static void sun50i_iommu_update_masters(struct sun50i_iommu *iommu,
+					struct sun50i_iommu_domain *sun50i_domain)
+{
+	unsigned long flags;
+
+	spin_lock_irqsave(&iommu->iommu_lock, flags);
+	iommu_write(iommu, IOMMU_BYPASS_REG,
+		    ~atomic_read(&sun50i_domain->masters));
+	spin_unlock_irqrestore(&iommu->iommu_lock, flags);
+}
+
 static void sun50i_iommu_detach_device(struct iommu_domain *domain,
 				       struct device *dev)
 {
@@ -770,6 +784,8 @@ static void sun50i_iommu_detach_device(struct iommu_domain *domain,
 
 	if (atomic_fetch_andnot(masters, &sun50i_domain->masters) == masters)
 		sun50i_iommu_detach_domain(iommu, sun50i_domain);
+	else
+		sun50i_iommu_update_masters(iommu, sun50i_domain);
 }
 
 static int sun50i_iommu_attach_device(struct iommu_domain *domain,
@@ -791,6 +807,8 @@ static int sun50i_iommu_attach_device(struct iommu_domain *domain,
 
 	if (atomic_fetch_or(masters, &sun50i_domain->masters) == 0)
 		sun50i_iommu_attach_domain(iommu, sun50i_domain);
+	else
+		sun50i_iommu_update_masters(iommu, sun50i_domain);
 
 	return 0;
 }
-- 
2.37.4


  parent reply	other threads:[~2023-01-03  1:09 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-03  1:08 [PATCH v2 0/6] iommu/sun50i: Allwinner D1 support Samuel Holland
2023-01-03  1:08 ` [PATCH v2 1/6] dt-bindings: iommu: sun50i: Add compatible for Allwinner D1 Samuel Holland
2023-01-08 20:53   ` Rob Herring
2023-01-03  1:08 ` [PATCH v2 2/6] iommu/sun50i: Track masters attached to the domain Samuel Holland
2023-01-04 22:04   ` Jernej Škrabec
2023-01-03  1:09 ` Samuel Holland [this message]
2023-01-04 22:06   ` [PATCH v2 3/6] iommu/sun50i: Keep the bypass register up to date Jernej Škrabec
2023-01-03  1:09 ` [PATCH v2 4/6] iommu/sun50i: Support variants without an external reset Samuel Holland
2023-01-03  1:09 ` [PATCH v2 5/6] iommu/sun50i: Add support for the D1 variant Samuel Holland
2023-01-03  1:09 ` [PATCH v2 6/6] riscv: dts: allwinner: d1: Add the IOMMU node Samuel Holland
2023-01-04 22:07   ` Jernej Škrabec
2023-01-13 15:35   ` Joerg Roedel
2023-01-14 17:17     ` Samuel Holland
2023-01-20  9:18       ` Joerg Roedel
2023-01-20 15:11 ` [PATCH v2 0/6] iommu/sun50i: Allwinner D1 support Joerg Roedel
2023-02-03 10:21   ` Joerg Roedel
2023-02-04 14:49     ` Samuel Holland

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