ARM Sunxi Platform Development
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From: Roman Beranek <me@crly.cz>
To: Maxime Ripard <mripard@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
	David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>,
	Jernej Skrabec <jernej.skrabec@gmail.com>,
	Samuel Holland <samuel@sholland.org>
Cc: Roman Beranek <me@crly.cz>, Frank Oltmanns <frank@oltmanns.dev>,
	Icenowy Zheng <icenowy@aosp.io>, Ondrej Jirman <megi@xff.cz>,
	dri-devel@lists.freedesktop.org,
	linux-arm-kernel@lists.infradead.org,
	linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org
Subject: [PATCH v2 1/7] clk: sunxi-ng: a64: propagate rate change from pll-mipi
Date: Tue, 18 Apr 2023 09:40:02 +0200	[thread overview]
Message-ID: <20230418074008.69752-2-me@crly.cz> (raw)
In-Reply-To: <20230418074008.69752-1-me@crly.cz>

Propagating rate change from tcon0 all the way to pll-video0 allows for
greater precision in matching requested display timing.

Signed-off-by: Roman Beranek <me@crly.cz>
---
 drivers/clk/sunxi-ng/ccu-sun50i-a64.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
index 41519185600a..dd6212286dcd 100644
--- a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
@@ -179,7 +179,8 @@ static struct ccu_nkm pll_mipi_clk = {
 	.common		= {
 		.reg		= 0x040,
 		.hw.init	= CLK_HW_INIT("pll-mipi", "pll-video0",
-					      &ccu_nkm_ops, CLK_SET_RATE_UNGATE),
+					      &ccu_nkm_ops, CLK_SET_RATE_UNGATE
+							  | CLK_SET_RATE_PARENT),
 	},
 };
 
-- 
2.34.1



  reply	other threads:[~2023-04-18  7:53 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-18  7:40 [PATCH v2 0/7] drm: sun4i: set proper TCON0 DCLK rate in DSI mode Roman Beranek
2023-04-18  7:40 ` Roman Beranek [this message]
2023-04-25 16:09   ` [PATCH v2 1/7] clk: sunxi-ng: a64: propagate rate change from pll-mipi Maxime Ripard
2023-04-18  7:40 ` [PATCH v2 2/7] clk: sunxi-ng: a64: export PLL_MIPI Roman Beranek
2023-04-18  7:40 ` [PATCH v2 3/7] clk: sunxi-ng: a64: prevent CLK_TCON0 being reparented Roman Beranek
2023-04-18  7:40 ` [PATCH v2 4/7] arm64: dts: allwinner: a64: assign PLL_MIPI to CLK_TCON0 Roman Beranek
2023-04-25 16:10   ` Maxime Ripard
2023-04-18  7:40 ` [PATCH v2 5/7] ARM: dts: sunxi: rename tcon's clock output Roman Beranek
2023-04-18  7:40 ` [PATCH v2 6/7] drm: sun4i: rename sun4i_dotclock to sun4i_tcon_dclk Roman Beranek
2023-04-18  7:40 ` [PATCH v2 7/7] drm: sun4i: calculate proper DCLK rate for DSI Roman Beranek
2023-04-23 13:24 ` [PATCH v2 0/7] drm: sun4i: set proper TCON0 DCLK rate in DSI mode Frank Oltmanns
2023-05-01 13:40   ` Frank Oltmanns
2023-05-03 14:22     ` Roman Beranek
2023-05-08  6:54       ` Frank Oltmanns
2023-05-08 14:08         ` Frank Oltmanns
2023-05-10 18:41           ` Jernej Škrabec

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