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From: Andre Przywara <andre.przywara@arm.com>
To: Vasily Khoruzhick <anarsoul@gmail.com>,
	Yangtao Li <tiny.windzz@gmail.com>, Chen-Yu Tsai <wens@csie.org>,
	Jernej Skrabec <jernej.skrabec@gmail.com>,
	Samuel Holland <samuel@sholland.org>
Cc: "Rafael J . Wysocki" <rafael@kernel.org>,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	Zhang Rui <rui.zhang@intel.com>,
	Lukasz Luba <lukasz.luba@arm.com>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Martin Botka <martin.botka@somainline.org>,
	Bob McChesney <bob@electricworry.net>,
	linux-pm@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-sunxi@lists.linux.dev
Subject: [PATCH v3 6/6] arm64: dts: allwinner: h616: Add thermal sensor and zones
Date: Tue, 28 Nov 2023 00:58:49 +0000	[thread overview]
Message-ID: <20231128005849.19044-7-andre.przywara@arm.com> (raw)
In-Reply-To: <20231128005849.19044-1-andre.przywara@arm.com>

From: Martin Botka <martin.botka@somainline.org>

There are four thermal sensors:
- CPU
- GPU
- VE
- DRAM

Add the thermal sensor configuration and the thermal zones.

Signed-off-by: Martin Botka <martin.botka@somainline.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 .../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 88 +++++++++++++++++++
 1 file changed, 88 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
index d549d277d9729..94764f2bd375b 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
@@ -9,6 +9,7 @@
 #include <dt-bindings/clock/sun6i-rtc.h>
 #include <dt-bindings/reset/sun50i-h616-ccu.h>
 #include <dt-bindings/reset/sun50i-h6-r-ccu.h>
+#include <dt-bindings/thermal/thermal.h>
 
 / {
 	interrupt-parent = <&gic>;
@@ -138,6 +139,10 @@ sid: efuse@3006000 {
 			reg = <0x03006000 0x1000>;
 			#address-cells = <1>;
 			#size-cells = <1>;
+
+			ths_calibration: thermal-sensor-calibration@14 {
+				reg = <0x14 0x8>;
+			};
 		};
 
 		watchdog: watchdog@30090a0 {
@@ -511,6 +516,19 @@ mdio0: mdio {
 			};
 		};
 
+		ths: thermal-sensor@5070400 {
+			compatible = "allwinner,sun50i-h616-ths";
+			reg = <0x05070400 0x400>;
+			interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&ccu CLK_BUS_THS>;
+			clock-names = "bus";
+			resets = <&ccu RST_BUS_THS>;
+			nvmem-cells = <&ths_calibration>;
+			nvmem-cell-names = "calibration";
+			syscon = <&syscon>;
+			#thermal-sensor-cells = <1>;
+		};
+
 		usbotg: usb@5100000 {
 			compatible = "allwinner,sun50i-h616-musb",
 				     "allwinner,sun8i-h3-musb";
@@ -755,4 +773,74 @@ r_rsb: rsb@7083000 {
 			#size-cells = <0>;
 		};
 	};
+
+	thermal-zones {
+		cpu-thermal {
+			polling-delay-passive = <500>;
+			polling-delay = <1000>;
+			thermal-sensors = <&ths 2>;
+			sustainable-power = <1000>;
+
+			trips {
+				cpu_threshold: cpu-trip-0 {
+					temperature = <60000>;
+					type = "passive";
+					hysteresis = <0>;
+				};
+				cpu_target: cpu-trip-1 {
+					temperature = <70000>;
+					type = "passive";
+					hysteresis = <0>;
+				};
+				cpu_critical: cpu-trip-2 {
+					temperature = <110000>;
+					type = "critical";
+					hysteresis = <0>;
+				};
+			};
+		};
+
+		gpu-thermal {
+			polling-delay-passive = <500>;
+			polling-delay = <1000>;
+			thermal-sensors = <&ths 0>;
+			sustainable-power = <1100>;
+
+			trips {
+				gpu_temp_critical: gpu-trip-0 {
+					temperature = <110000>;
+					type = "critical";
+					hysteresis = <0>;
+				};
+			};
+		};
+
+		ve-thermal {
+			polling-delay-passive = <0>;
+			polling-delay = <0>;
+			thermal-sensors = <&ths 1>;
+
+			trips {
+				ve_temp_critical: ve-trip-0 {
+					temperature = <110000>;
+					type = "critical";
+					hysteresis = <0>;
+				};
+			};
+		};
+
+		ddr-thermal {
+			polling-delay-passive = <0>;
+			polling-delay = <0>;
+			thermal-sensors = <&ths 3>;
+
+			trips {
+				ddr_temp_critical: ddr-trip-0 {
+					temperature = <110000>;
+					type = "critical";
+					hysteresis = <0>;
+				};
+			};
+		};
+	};
 };
-- 
2.35.8


      parent reply	other threads:[~2023-11-28  1:00 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-28  0:58 [PATCH v3 0/6] Add support for H616 Thermal system Andre Przywara
2023-11-28  0:58 ` [PATCH v3 1/6] soc: sunxi: sram: export register 0 for THS on H616 Andre Przywara
2023-11-28  0:58 ` [PATCH v3 2/6] dt-bindings: thermal: sun8i: Add H616 THS controller Andre Przywara
2023-11-28  7:41   ` Krzysztof Kozlowski
2023-11-28  0:58 ` [PATCH v3 3/6] thermal: sun8i: explain unknown H6 register value Andre Przywara
2023-11-28  0:58 ` [PATCH v3 4/6] thermal: sun8i: add syscon register access code Andre Przywara
2023-11-28  7:43   ` Krzysztof Kozlowski
2023-11-28  7:50     ` Chen-Yu Tsai
2023-11-28  8:29       ` Krzysztof Kozlowski
2023-11-28  8:59         ` Chen-Yu Tsai
2023-11-28  9:02           ` Chen-Yu Tsai
2023-11-28  9:09             ` Chen-Yu Tsai
2023-11-28  9:13               ` Krzysztof Kozlowski
2023-11-28 14:11                 ` Krzysztof Kozlowski
2023-11-28 14:33     ` Andre Przywara
2023-11-28 14:48       ` Krzysztof Kozlowski
2023-11-28 16:10         ` Andre Przywara
2023-11-28 16:39           ` Chen-Yu Tsai
2023-11-28 16:50           ` Rob Herring
2023-11-29 17:03             ` Andre Przywara
2023-11-29 17:09               ` Chen-Yu Tsai
2023-11-28  0:58 ` [PATCH v3 5/6] thermal: sun8i: add support for H616 THS controller Andre Przywara
2023-12-09 10:44   ` Maksim Kiselev
2023-12-11  0:05     ` Andre Przywara
2023-12-12 18:09       ` Maxim Kiselev
2023-12-14  9:59         ` Andre Przywara
2023-12-17 14:16           ` Maxim Kiselev
2023-11-28  0:58 ` Andre Przywara [this message]

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