ARM Sunxi Platform Development
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From: Andre Przywara <andre.przywara@arm.com>
To: u-boot@lists.denx.de
Cc: Jagan Teki <jagan@amarulasolutions.com>,
	Cody Eksal <masterr3c0rd@epochal.quest>,
	Philippe Simons <simons.philippe@gmail.com>,
	Sumit Garg <sumit.garg@kernel.org>,
	linux-sunxi@lists.linux.dev, Tom Rini <trini@konsulko.com>,
	Jernej Skrabec <jernej.skrabec@gmail.com>
Subject: [PATCH v2 6/6] sunxi: add support for Liontron H-A133L board
Date: Sun, 11 May 2025 02:10:03 +0100	[thread overview]
Message-ID: <20250511011003.15654-7-andre.przywara@arm.com> (raw)
In-Reply-To: <20250511011003.15654-1-andre.przywara@arm.com>

The Liontron H-A133L is an industrial development board based on the
Allwinner A133 SoC. It uses LPDDR4 DRAM, eMMC, and an AXP707 PMIC.

Add a defconfig with the required DRAM settings.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 configs/liontron-h-a133l_defconfig | 37 ++++++++++++++++++++++++++++++
 1 file changed, 37 insertions(+)
 create mode 100644 configs/liontron-h-a133l_defconfig

diff --git a/configs/liontron-h-a133l_defconfig b/configs/liontron-h-a133l_defconfig
new file mode 100644
index 00000000000..4b769768e5f
--- /dev/null
+++ b/configs/liontron-h-a133l_defconfig
@@ -0,0 +1,37 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_DEFAULT_DEVICE_TREE="allwinner/sun50i-a133-liontron-h-a133l"
+CONFIG_SPL=y
+CONFIG_DRAM_SUNXI_DX_ODT=0x7070707
+CONFIG_DRAM_SUNXI_DX_DRI=0xd0d0d0d
+CONFIG_DRAM_SUNXI_CA_DRI=0xe0e
+CONFIG_DRAM_SUNXI_PARA0=0xd0a050c
+CONFIG_DRAM_SUNXI_MR11=0x4
+CONFIG_DRAM_SUNXI_MR12=0x72
+CONFIG_DRAM_SUNXI_MR13=0x0
+CONFIG_DRAM_SUNXI_MR14=0x7
+CONFIG_DRAM_SUNXI_TPR1=0x26
+CONFIG_DRAM_SUNXI_TPR2=0x6060606
+CONFIG_DRAM_SUNXI_TPR3=0x84040404
+CONFIG_DRAM_SUNXI_TPR6=0x48000000
+CONFIG_DRAM_SUNXI_TPR10=0x273333
+CONFIG_DRAM_SUNXI_TPR11=0x231d151c
+CONFIG_DRAM_SUNXI_TPR12=0x1212110e
+CONFIG_DRAM_SUNXI_TPR13=0x7521
+CONFIG_DRAM_SUNXI_TPR14=0x2023211f
+CONFIG_MACH_SUN50I_A133=y
+CONFIG_DRAM_CLK=792
+CONFIG_MMC_SUNXI_SLOT_EXTRA=2
+CONFIG_SUNXI_DRAM_A133_LPDDR4=y
+CONFIG_R_I2C_ENABLE=y
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SPL_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
+CONFIG_AXP803_POWER=y
+CONFIG_AXP_DCDC5_VOLT=1100
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_OHCI_HCD=y
-- 
2.46.3


      parent reply	other threads:[~2025-05-11  1:10 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-11  1:09 [PATCH v2 0/6] sunxi: Allwinner A133 SoC support Andre Przywara
2025-05-11  1:09 ` [PATCH v2 1/6] sunxi: A133: add DRAM init code Andre Przywara
2025-05-11  9:23   ` Andre Przywara
2025-05-12  9:21   ` Quentin Schulz
2025-05-12 10:49     ` Andre Przywara
2025-05-12 15:12   ` Cody Eksal
2025-05-26 13:45     ` Parthiban
2025-05-11  1:09 ` [PATCH v2 2/6] sunxi: add support for the Allwinner A100/A133 SoC Andre Przywara
2025-05-11  1:10 ` [PATCH v2 3/6] arm64: dts: allwinner: a100: Add CPU Operating Performance Points table Andre Przywara
2025-05-12  9:24   ` Quentin Schulz
2025-05-12 10:46     ` Andre Przywara
2025-05-12 15:58       ` Quentin Schulz
2025-05-11  1:10 ` [PATCH v2 4/6] arm64: dts: allwinner: a100: set maximum MMC frequency Andre Przywara
2025-05-11  1:10 ` [PATCH v2 5/6] arm64: dts: allwinner: a100: add Liontron H-A133L board support Andre Przywara
2025-05-11  1:10 ` Andre Przywara [this message]

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