* [PATCH 1/2] iommu: fix typos in comments
[not found] <20260904121047.21701-1-hemanth.selam@gmail.com>
@ 2026-09-04 12:10 ` Hemanth Selam
0 siblings, 0 replies; only message in thread
From: Hemanth Selam @ 2026-09-04 12:10 UTC (permalink / raw)
To: Joerg Roedel (AMD), Suravee Suthikulpanit, Vasant Hegde,
Will Deacon, Robin Murphy, David Woodhouse, Lu Baolu,
Chen-Yu Tsai, Jernej Skrabec, Samuel Holland
Cc: linux-kernel, iommu, linux-arm-kernel, linux-sunxi
Fix typos in comments, reported by scripts/checkpatch.pl using the
misspelling list in scripts/spelling.txt. Only touches comments, no code
changes.
Assisted-by: Cursor:claude-opus-5
Signed-off-by: Hemanth Selam <hemanth.selam@gmail.com>
---
drivers/iommu/amd/amd_iommu_types.h | 4 ++--
drivers/iommu/intel/dmar.c | 2 +-
drivers/iommu/omap-iommu.c | 2 +-
drivers/iommu/sun50i-iommu.c | 2 +-
4 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/iommu/amd/amd_iommu_types.h b/drivers/iommu/amd/amd_iommu_types.h
index 3dbe20023456..a1cd29f0d03f 100644
--- a/drivers/iommu/amd/amd_iommu_types.h
+++ b/drivers/iommu/amd/amd_iommu_types.h
@@ -121,8 +121,8 @@
/* Note:
* The current driver only support 16-bit PASID.
- * Currently, hardware only implement upto 16-bit PASID
- * even though the spec says it could have upto 20 bits.
+ * Currently, hardware only implement up to 16-bit PASID
+ * even though the spec says it could have up to 20 bits.
*/
#define PASID_MASK 0x0000ffff
diff --git a/drivers/iommu/intel/dmar.c b/drivers/iommu/intel/dmar.c
index ba675b08cd20..e80a2eb3e64e 100644
--- a/drivers/iommu/intel/dmar.c
+++ b/drivers/iommu/intel/dmar.c
@@ -1034,7 +1034,7 @@ static void unmap_iommu(struct intel_iommu *iommu)
* @drhd: DMA remapping hardware definition structure
*
* Memory map the iommu's registers. Start w/ a single page, and
- * possibly expand if that turns out to be insufficent.
+ * possibly expand if that turns out to be insufficient.
*/
static int map_iommu(struct intel_iommu *iommu, struct dmar_drhd_unit *drhd)
{
diff --git a/drivers/iommu/omap-iommu.c b/drivers/iommu/omap-iommu.c
index 8231d7d6bb6a..7e43c6d64434 100644
--- a/drivers/iommu/omap-iommu.c
+++ b/drivers/iommu/omap-iommu.c
@@ -1732,7 +1732,7 @@ static int __init omap_iommu_init(void)
{
struct kmem_cache *p;
const slab_flags_t flags = SLAB_HWCACHE_ALIGN;
- size_t align = 1 << 10; /* L2 pagetable alignement */
+ size_t align = 1 << 10; /* L2 pagetable alignment */
struct device_node *np;
int ret;
diff --git a/drivers/iommu/sun50i-iommu.c b/drivers/iommu/sun50i-iommu.c
index be3f1ce696ba..8c9ed9e5f1cb 100644
--- a/drivers/iommu/sun50i-iommu.c
+++ b/drivers/iommu/sun50i-iommu.c
@@ -152,7 +152,7 @@ static void iommu_write(struct sun50i_iommu *iommu, u32 offset, u32 value)
* 4096 4-bytes Directory Table Entries (DTE), each pointing to a Page
* Table (PT).
*
- * Each PT consits of 256 4-bytes Page Table Entries (PTE), each
+ * Each PT consists of 256 4-bytes Page Table Entries (PTE), each
* pointing to a 4kB page of physical memory.
*
* The IOMMU supports a single DT, pointed by the IOMMU_TTB_REG
--
2.48.1
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2026-09-04 12:10 ` [PATCH 1/2] iommu: fix typos in comments Hemanth Selam
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