* new A64-OLinuXino revisions
@ 2026-04-24 9:25 Roman Riabenko
2026-04-24 10:08 ` Andre Przywara
0 siblings, 1 reply; 3+ messages in thread
From: Roman Riabenko @ 2026-04-24 9:25 UTC (permalink / raw)
To: linux-sunxi
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Hello.
The vendor revised A64-OLinuXino and released additional devicetrees.
Mainline Das U-Boot and Linux support revisions C and D. However,
revision E and later require the vendor devicetree files to operate
properly. For example, RX delay is required for stable download. There
are also changes to voltages. Vendor's local changes to the kernel may
need to be considered too.
The vendor u-boot repository has old devicetrees only. The vendor also
provides a single customised Debian image for all A64-OLinuXino, which
does some initial board-specific setup at first boot.
I would like to start a discussion about how to have these changes
mainlined.
For your immediate reference, I attach the patch obtained from the
GitHub commit changing devicetrees.
Roman
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From 09409831a23a11bb0360ecb56e8de12c70c973e1 Mon Sep 17 00:00:00 2001
From: Mitko Gamishev <hehopmajieh@debian.bg>
Date: Wed, 5 Feb 2020 15:03:08 +0200
Subject: [PATCH] dts: add sun50i-a64-olinuxino-*
---
arch/arm64/boot/dts/allwinner/Makefile | 5 +
.../dts/allwinner/sun50i-a64-olinuxino-1G.dts | 370 ++++++++++++++++++
.../sun50i-a64-olinuxino-1Ge16GW.dts | 41 ++
.../allwinner/sun50i-a64-olinuxino-1Ge4GW.dts | 97 +++++
.../allwinner/sun50i-a64-olinuxino-1Gs16M.dts | 31 ++
.../allwinner/sun50i-a64-olinuxino-2Ge8G.dts | 25 ++
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 20 +
7 files changed, 589 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1G.dts
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge4GW.dts
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Gs16M.dts
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-2Ge8G.dts
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index 211d1e9d47013..9a5cbc304c0f3 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -5,6 +5,11 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-nanopi-a64.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-oceanic-5205-5inmfd.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-olinuxino.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-olinuxino-emmc.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-olinuxino-1G.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-olinuxino-1Ge4GW.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-olinuxino-1Ge16GW.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-olinuxino-1Gs16M.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-olinuxino-2Ge8G.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-orangepi-win.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-lts.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-plus.dtb sun50i-a64-pine64.dtb
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1G.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1G.dts
new file mode 100644
index 0000000000000..0be12d767547d
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1G.dts
@@ -0,0 +1,370 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2019 OLIMEX Ltd.
+ *
+ */
+
+/dts-v1/;
+
+#include "sun50i-a64.dtsi"
+#include "sun50i-a64-cpu-opp.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ model = "Olimex A64-Olinuxino-1G";
+ compatible = "olimex,a64-olinuxino-1g", "allwinner,sun50i-a64";
+
+ aliases {
+ ethernet0 = &emac;
+ serial0 = &uart0;
+ serial2 = &uart3;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ hdmi-sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,name = "allwinner,hdmi";
+ simple-audio-card,mclk-fs = <256>;
+ status = "okay";
+
+ simple-audio-card,codec {
+ sound-dai = <&hdmi>;
+ };
+
+ simple-audio-card,cpu {
+ sound-dai = <&i2s2>;
+ };
+ };
+
+ reg_vcc_sys: vcc-sys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc-sys";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ status = "okay";
+ };
+
+ reg_usb1_vbus: usb1-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb1-vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ enable-active-high;
+ gpio = <&pio 6 9 GPIO_ACTIVE_HIGH>; /* PG9 */
+ status = "okay";
+ };
+};
+
+&codec {
+ status = "okay";
+};
+
+&codec_analog {
+ hpvcc-supply = <®_eldo1>;
+ status = "okay";
+};
+
+&dai {
+ status = "okay";
+};
+
+&de {
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_pins>;
+ phy-mode = "rgmii";
+ phy-handle = <&ext_rgmii_phy>;
+ phy-supply = <®_dcdc1>;
+ allwinner,tx-delay-ps = <600>;
+ status = "okay";
+};
+
+&hdmi {
+ hvcc-supply = <®_dldo1>;
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+/* Exposed to UEXT connector */
+&i2c1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins>;
+ status = "disabled";
+};
+
+&i2s2 {
+ status = "okay";
+};
+
+&mdio {
+ ext_rgmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ };
+};
+
+&mmc0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins>;
+ vmmc-supply = <®_dcdc1>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
+ disable-wp;
+ bus-width = <4>;
+ status = "okay";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&r_rsb {
+ status = "okay";
+
+ axp803: pmic@3a3 {
+ compatible = "x-powers,axp803";
+ reg = <0x3a3>;
+ interrupt-parent = <&r_intc>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ x-powers,drive-vbus-en; /* set N_VBUSEN as output pin */
+ };
+};
+
+#include "axp803.dtsi"
+
+&ac_power_supply {
+ status = "okay";
+};
+
+&axp_led {
+ label = "axp20x:yellow:chgled";
+ status = "okay";
+ x-powers,charger-mode = <0>;
+};
+
+&battery_power_supply {
+ status = "okay";
+};
+
+®_aldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-name = "vcc-pe";
+};
+
+®_aldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-pl";
+};
+
+®_aldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-name = "vcc-pll-avcc";
+};
+
+®_dcdc1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-3v3";
+};
+
+®_dcdc2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1040000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-name = "vdd-cpux";
+};
+
+/* DCDC3 is polyphased with DCDC2 */
+
+/*
+ * The board uses DDR3L DRAM chips. 1.36V is the closest to the nominal
+ * 1.35V that the PMIC can drive.
+ */
+®_dcdc5 {
+ regulator-always-on;
+ regulator-min-microvolt = <1360000>;
+ regulator-max-microvolt = <1360000>;
+ regulator-name = "vcc-ddr3";
+};
+
+®_dcdc6 {
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-name = "vdd-sys";
+};
+
+®_dldo1 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-hdmi";
+};
+
+®_dldo2 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-mipi";
+};
+
+®_dldo3 {
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-name = "vcc-avdd-csi";
+};
+
+®_dldo4 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-io";
+};
+
+®_drivevbus {
+ regulator-name = "usb0-vbus";
+ status = "okay";
+};
+
+®_eldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-emmc";
+};
+
+®_eldo2 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-dvdd-csi";
+};
+
+®_fldo1 {
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-name = "vcc-1v2-hsic";
+};
+
+/*
+ * The A64 chip cannot work without this regulator off, although
+ * it seems to be only driving the AR100 core.
+ * Maybe we don't still know well about CPUs domain.
+ */
+®_fldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-name = "vdd-cpus";
+};
+
+®_rtc_ldo {
+ regulator-name = "vcc-rtc";
+};
+
+&simplefb_hdmi {
+ vcc-hdmi-supply = <®_dldo1>;
+};
+
+&sound {
+ simple-audio-card,aux-devs = <&codec_analog>;
+ simple-audio-card,widgets = "Microphone", "Microphone Jack Left",
+ "Microphone", "Microphone Jack Right",
+ "Headphone", "Headphone Jack";
+ simple-audio-card,routing = "Left DAC", "DACL",
+ "Right DAC", "DACR",
+ "Headphone Jack", "HP",
+ "ADCL", "Left ADC",
+ "ADCR", "Right ADC",
+ "Microphone Jack Left", "MBIAS",
+ "MIC1", "Microphone Jack Left",
+ "Microphone Jack Left", "HBIAS",
+ "MIC2", "Microphone Jack Right";
+ status = "okay";
+};
+
+&spdif {
+ status = "disabled";
+};
+
+/* Exposed on UEXT */
+&spi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_pins>;
+ status = "disabled";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pb_pins>;
+ status = "okay";
+};
+
+/* Exposed on UEXT */
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins>;
+ status = "disabled";
+};
+
+&uart3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart3_ph_pins>;
+ status = "okay";
+};
+
+&usb_otg {
+ dr_mode = "otg";
+ status = "okay";
+};
+
+&usbphy {
+ status = "okay";
+ usb0_id_det-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */
+ usb0_vbus_det-gpios = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */
+ usb0_vbus-supply = <®_drivevbus>;
+ usb1_vbus-supply = <®_usb1_vbus>;
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts
new file mode 100644
index 0000000000000..100a7ce499a67
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts
@@ -0,0 +1,41 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2019 OLIMEX Ltd.
+ *
+ */
+
+/dts-v1/;
+
+#include "sun50i-a64-olinuxino-1Ge4GW.dts"
+
+/ {
+ model = "Olimex A64-Olinuxino-1Ge16GW";
+ compatible = "olimex,a64-olinuxino-1ge16gw", "allwinner,sun50i-a64";
+};
+
+&mmc2 {
+ vqmmc-supply = <®_eldo1>;
+ mmc-hs200-1_8v;
+ allwinner,drive-data-phase = <180>;
+};
+
+&pio {
+ vcc-pc-supply = <®_eldo1>;
+ uart1_cts_pins: uart1_cts_pins {
+ pins = "PG8";
+ function = "uart1";
+ };
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>, <&uart1_cts_pins>;
+ status = "okay";
+ bluetooth {
+ compatible = "realtek,rtl8723bs-bt";
+ reset-gpios = <&r_pio 0 4 GPIO_ACTIVE_LOW>; /* PL4 */
+ device-wake-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */
+ host-wake-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+ firmware-postfix = "olinuxino";
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge4GW.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge4GW.dts
new file mode 100644
index 0000000000000..c87ecc6e1d8fc
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge4GW.dts
@@ -0,0 +1,97 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2019 OLIMEX Ltd.
+ *
+ */
+
+/dts-v1/;
+
+#include "sun50i-a64-olinuxino-1G.dts"
+
+/ {
+ model = "Olimex A64-Olinuxino-1Ge4GW";
+ compatible = "olimex,a64-olinuxino-1ge4gw", "allwinner,sun50i-a64";
+
+ aliases {
+ ethernet1 = &rtl8723bs;
+ mmc1 = &mmc2;
+ };
+
+ bt-sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,bitclock-inversion = <1>;
+ simple-audio-card,mclk-fs = <256>;
+ simple-audio-card,name = "RTL8723BS";
+ simple-audio-card,cpu {
+ sound-dai = <&i2s1>;
+ };
+ simple-audio-card,codec {
+ sound-dai = <&bt_sco>;
+ };
+ };
+
+ bt_sco: bt-sco {
+ compatible = "linux,bt-sco";
+ #sound-dai-cells = <0>;
+ status = "okay";
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
+ };
+};
+
+&i2s1 {
+ status = "okay";
+};
+
+&mmc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins>;
+ vmmc-supply = <®_aldo2>;
+ vqmmc-supply = <®_dldo4>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ rtl8723bs: wifi@1 {
+ reg = <1>;
+ interrupt-parent = <&r_pio>;
+ interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>; /* PL3 */
+ interrupt-names = "host-wake";
+ };
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_pins>;
+ vmmc-supply = <®_dcdc1>;
+ vqmmc-supply = <®_dcdc1>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "okay";
+};
+
+&pio {
+ uart1_cts_pins: uart1_cts_pins {
+ pins = "PG8";
+ function = "uart1";
+ };
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>, <&uart1_cts_pins>;
+ status = "okay";
+ bluetooth {
+ compatible = "realtek,rtl8723bs-bt";
+ reset-gpios = <&r_pio 0 4 GPIO_ACTIVE_LOW>; /* PL4 */
+ device-wake-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */
+ host-wake-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+ firmware-postfix = "olinuxino";
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Gs16M.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Gs16M.dts
new file mode 100644
index 0000000000000..5b85f4d2b05fb
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Gs16M.dts
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2019 OLIMEX Ltd.
+ *
+ */
+
+/dts-v1/;
+
+#include "sun50i-a64-olinuxino-1G.dts"
+
+/ {
+ model = "Olimex A64-Olinuxino-1Gs16M";
+ compatible = "olimex,a64-olinuxino-1gs16m", "allwinner,sun50i-a64";
+
+ aliases {
+ spi0 = &spi0;
+ };
+};
+
+&spi0 {
+ status = "okay";
+
+ spi-nor@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "winbond,w25q128", "jedec,spi-nor", "spi-flash";
+ reg = <0>;
+ spi-max-frequency = <10000000>;
+ status = "okay";
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-2Ge8G.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-2Ge8G.dts
new file mode 100644
index 0000000000000..3583c37d39308
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-2Ge8G.dts
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2019 OLIMEX Ltd.
+ *
+ */
+
+/dts-v1/;
+
+#include "sun50i-a64-olinuxino-1G.dts"
+
+/ {
+ model = "Olimex A64-Olinuxino-2Ge8G-IND";
+ compatible = "olimex,a64-olinuxino-2ge8g", "allwinner,sun50i-a64";
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_pins>;
+ vmmc-supply = <®_dcdc1>;
+ vqmmc-supply = <®_dcdc1>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 7a41015a9ce59..7e613d2ca48fc 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -787,6 +787,11 @@
function = "uart3";
};
+ uart3_ph_pins: uart3-ph-pins {
+ pins = "PH4", "PH5";
+ function = "uart3";
+ };
+
uart4_pins: uart4-pins {
pins = "PD2", "PD3";
function = "uart4";
@@ -850,6 +855,20 @@
status = "disabled";
};
+ i2s2: i2s@1c22800 {
+ #sound-dai-cells = <0>;
+ compatible = "allwinner,sun50i-a64-i2s",
+ "allwinner,sun8i-h3-i2s";
+ reg = <0x01c22800 0x400>;
+ interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_I2S2>, <&ccu CLK_I2S2>;
+ clock-names = "apb", "mod";
+ dmas = <&dma 27>;
+ resets = <&ccu RST_BUS_I2S2>;
+ dma-names = "tx";
+ status = "disabled";
+ };
+
dai: dai@1c22c00 {
#sound-dai-cells = <0>;
compatible = "allwinner,sun50i-a64-codec-i2s";
@@ -1147,6 +1166,7 @@
};
hdmi: hdmi@1ee0000 {
+ #sound-dai-cells = <0>;
compatible = "allwinner,sun50i-a64-dw-hdmi",
"allwinner,sun8i-a83t-dw-hdmi";
reg = <0x01ee0000 0x10000>;
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^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: new A64-OLinuXino revisions
2026-04-24 9:25 new A64-OLinuXino revisions Roman Riabenko
@ 2026-04-24 10:08 ` Andre Przywara
2026-04-26 13:20 ` Roman Riabenko
0 siblings, 1 reply; 3+ messages in thread
From: Andre Przywara @ 2026-04-24 10:08 UTC (permalink / raw)
To: Roman Riabenko, linux-sunxi; +Cc: Stefan Mavrodiev
Hi Roman,
many thanks for reaching out!
I take it you are not directly involved with the vendor, but since you
are here, I am going to ask you all those questions ;-)
CC:ing Stefan, not sure this still works, his last mainline patch was a
while ago.
On 4/24/26 11:25, Roman Riabenko wrote:
> Hello.
>
> The vendor revised A64-OLinuXino and released additional devicetrees.
Well, "released" should be done via sending to the kernel mailing list,
getting them reviewed and then merged. But well...
> Mainline Das U-Boot and Linux support revisions C and D. However,
> revision E and later require the vendor devicetree files to operate
> properly. For example, RX delay is required for stable download. There
> are also changes to voltages. Vendor's local changes to the kernel may
> need to be considered too.
So does one vendor devicetree support all versions? Or do they patch
something, either when installing or at each boot time?
Do you have any board of older revisions, by any chance, so that you
could run some tests?
And do you have a list of exact changes between revisions? Is there some
changelog somewhere on the Olimex site or repo?
Also I see that the Olimex OSHW repo lists revisions up to H already.
> The vendor u-boot repository has old devicetrees only. The vendor also
> provides a single customised Debian image for all A64-OLinuXino, which
> does some initial board-specific setup at first boot.
So is there a way to detect those revisions? There is precedence in
mainline U-Boot for patching DTs on the fly for board revisions, so we
could apply required changes there. But we would need some way to check
which version this board is. Are there some GPIOs or so for this?
Sometimes there are other means of detection, like SPI or I2C device
presence or something.
> I would like to start a discussion about how to have these changes
> mainlined.
>
> For your immediate reference, I attach the patch obtained from the
> GitHub commit changing devicetrees.
So this one seemingly ignores the mainline devicetrees, instead installs
their own versions? I would have hoped they would at least adjusted or
included the mainline DTs ...
Cheers,
Andre
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: new A64-OLinuXino revisions
2026-04-24 10:08 ` Andre Przywara
@ 2026-04-26 13:20 ` Roman Riabenko
0 siblings, 0 replies; 3+ messages in thread
From: Roman Riabenko @ 2026-04-26 13:20 UTC (permalink / raw)
To: Andre Przywara, linux-sunxi; +Cc: Stefan Mavrodiev
[-- Attachment #1: Type: text/plain, Size: 5662 bytes --]
У пт, 2026-04-24 у 12:08 +0200, Andre Przywara пише:
> I take it you are not directly involved with the vendor
Yes, I am not connected to the vendor.
> On 4/24/26 11:25, Roman Riabenko wrote:
> > The vendor revised A64-OLinuXino and released additional
> > devicetrees.
> Well, "released" should be done via sending to the kernel mailing
> list, getting them reviewed and then merged.
I should said instead that they released a version of their customised
Debian image, which uses those devicetrees. I have asked in the support
forum to clarify whether they plan to mainline the changes.[1]
>
> So does one vendor devicetree support all versions? Or do they patch
> something, either when installing or at each boot time?
Per their uboot source code,[2] SPL identifies the board by its RAM,
SPI, and eMMC sizes and assigns one of 5 configuration codes according
to the board variant, but not revision. There are generated kernel.itb
(and kernel.its) in /boot, which matches the configuration codes[3] to
5 board variants, provides paths to 5 devicetrees, and the address to
load the devicetree to. Those 5 devicetrees are the new ones which I
refer to. They contain variant-specific "model" and "compatible"
values. They set RX delay for Ethernet.
There is some uboot logic matching 6 variants of the board (1 extra
code) to only 2 devicetrees.[4] Running binwalk on uboot copied from
the image confirms that there are only those 2 devicetrees in uboot.
Those devicetrees look similar to the mainline. The "model" and
"compatible" match the upstream. And they do not set RX delay for
Ethernet.
The vendor's uboot source code differentiates between revisions of
another board,[5] but not between revisions of A64-OLinuXino.
I asked in the support forum to clarify whether the new devicetrees
work for all revisions of the board, including the past revisions.[1]
Previously, the support suggested that the changes are possibly
associated with additional electromagnetic shielding of Ethernet in
revision E,[6] which is mentioned in the hardware changes log.[7]
So, there are two different devicetrees loaded by uboot. The one used
by uboot appears to be one of the 2 uboot includes, but modified in
memory. For example, "compatible" matches the board variant already,
but "model" is still from the devicetree included in uboot. The other
one, which is passed to the kernel, is one of the 5 new ones.
=> fdt addr $fdt_addr_r
=> fdt header
magic: 0xd00dfeed
totalsize: 0x9af8 (39672)
off_dt_struct: 0x38
off_dt_strings: 0x8df0
off_mem_rsvmap: 0x28
version: 17
last_comp_version: 16
boot_cpuid_phys: 0x0
size_dt_strings: 0xd08
size_dt_struct: 0x8db8
number mem_rsv: 0x0
=> fdt print / model
model = "Olimex A64-Olinuxino-2Ge8G-IND"
=> fdt print / compatible
compatible = "olimex,a64-olinuxino-2ge8g", "allwinner,sun50i-a64"
=> fdt print /soc/ethernet@1c30000 allwinner,rx-delay-ps
allwinner,rx-delay-ps = <0x000000c8>
=> fdt addr $fdtcontroladdr
=> fdt header
magic: 0xd00dfeed
totalsize: 0xacad (44205)
off_dt_struct: 0x38
off_dt_strings: 0x8f20
off_mem_rsvmap: 0x28
version: 17
last_comp_version: 16
boot_cpuid_phys: 0x0
size_dt_strings: 0xd81
size_dt_struct: 0x8ee8
number mem_rsv: 0x0
=> fdt print / model
model = "Olimex A64-Olinuxino-eMMC"
=> fdt print / compatible
compatible = "olimex,a64-olinuxino-2ge8g-ind"
=> fdt print /soc/ethernet@1c30000 allwinner,rx-delay-ps
libfdt fdt_getprop(): FDT_ERR_NOTFOUND
> Do you have any board of older revisions, by any chance, so that you
> could run some tests?
No, I only have a revision H board.
> And do you have a list of exact changes between revisions? Is there
> some changelog somewhere on the Olimex site or repo? Also I see that
> the Olimex OSHW repo lists revisions up to H already.
For hardware, the revisions changelog is the one which you refer to.[7]
For software, I did not find one matching board revisions. There is the
changelog for the vendor distribution images.[8] I have asked the
support whether there is anything else.[1]
>
> So is there a way to detect those revisions?
I have not found one so far.
> > For your immediate reference, I attach the patch obtained from the
> > GitHub commit changing devicetrees.
> So this one seemingly ignores the mainline devicetrees, instead
> installs their own versions? I would have hoped they would at least
> adjusted or included the mainline DTs ...
Per my observations described above, they still use modified versions
of the mainline DTs for their uboot, but the newer DTs are used by the
kernel.
[1]:
https://www.olimex.com/forum/index.php?topic=9989.msg46689#msg46689
[2]:
https://github.com/OLIMEX/u-boot-olinuxino/blob/23d8f769a94ae230b7a68fa812cc3c4dc0cbf1c9/board/olimex/a64_olinuxino/board.c#L39
[3]:
https://github.com/OLIMEX/olimage/blob/a33bf53f8dd13fdcece0c77f1b06064e9ffcbb83/configs/boards/a64-olinuxino.yaml
[4]:
https://github.com/OLIMEX/u-boot-olinuxino/blob/23d8f769a94ae230b7a68fa812cc3c4dc0cbf1c9/board/olimex/common/boards.c#L275
[5]:
https://github.com/OLIMEX/u-boot-olinuxino/blob/23d8f769a94ae230b7a68fa812cc3c4dc0cbf1c9/board/olimex/common/boards.c#L502
[6]:
https://www.olimex.com/forum/index.php?topic=9989.msg46678#msg46678
[7]:
https://github.com/OLIMEX/OLINUXINO/tree/master/HARDWARE/A64-OLinuXino
[8]: https://images.olimex.com/changelog.txt
--
Roman
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