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From: Jon Hunter <jonathanh@nvidia.com>
To: Mukesh Kumar Savaliya <quic_msavaliy@quicinc.com>,
	Vishwaroop A <va@nvidia.com>,
	thierry.reding@gmail.com, skomatineni@nvidia.com,
	ldewangan@nvidia.com, broonie@kernel.org,
	linux-spi@vger.kernel.org, linux-tegra@vger.kernel.org,
	linux-kernel@vger.kernel.org, kyarlagadda@nvidia.com,
	smangipudi@nvidia.com
Subject: Re: [PATCH v3 6/6] spi: tegra210-quad: Add support for internal DMA
Date: Wed, 16 Apr 2025 15:08:17 +0100	[thread overview]
Message-ID: <05e4997c-631f-4906-9422-5af257c153e8@nvidia.com> (raw)
In-Reply-To: <1484e250-bbb6-4d1e-9285-2ccf1b8215fd@quicinc.com>


On 16/04/2025 12:57, Mukesh Kumar Savaliya wrote:

...

>> @@ -1384,41 +1419,43 @@ static irqreturn_t 
>> handle_dma_based_xfer(struct tegra_qspi *tqspi)
>>       unsigned int total_fifo_words;
>>       unsigned long flags;
>>       long wait_status;
>> -    int err = 0;
>> +    int num_errors = 0;
>>       if (tqspi->cur_direction & DATA_DIR_TX) {
>>           if (tqspi->tx_status) {
>> -            dmaengine_terminate_all(tqspi->tx_dma_chan);
>> -            err += 1;
>> -        } else {
>> +            if (tqspi->tx_dma_chan)
>> +                dmaengine_terminate_all(tqspi->tx_dma_chan);
>> +            num_errors++;
>> +        } else if (tqspi->tx_dma_chan) {
>>               wait_status = wait_for_completion_interruptible_timeout(
>>                   &tqspi->tx_dma_complete, QSPI_DMA_TIMEOUT);
>>               if (wait_status <= 0) {
>>                   dmaengine_terminate_all(tqspi->tx_dma_chan);
>>                   dev_err(tqspi->dev, "failed TX DMA transfer\n");
>> -                err += 1;
>> +                num_errors++;
> what do you do with incrementing this local num_errors ?
> I don't see any post processing .
> Also all are are mutually exclusive due to if/else, not sequential. So 
> could not get any specific usage.

This is really legacy code and yes I am not too thrilled with it either. 
At the same time this change is simply making the variable name a bit 
more clear. It is not critical that this is changed as part of this 
patch, but does not hurt either. I don't have strong feelings on this.

Jon

-- 
nvpublic


  parent reply	other threads:[~2025-04-16 14:08 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-16 11:06 [PATCH v3 0/6] Configure Clocks, Add Internal DMA support Vishwaroop A
2025-04-16 11:06 ` [PATCH v3 1/6] spi: tegra210-quad: Fix X1_X2_X4 encoding and support x4 transfers Vishwaroop A
2025-04-16 11:06 ` [PATCH v3 2/6] spi: tegra210-quad: remove redundant error handling code Vishwaroop A
2025-04-16 11:06 ` [PATCH v3 3/6] spi: tegra210-quad: modify chip select (CS) deactivation Vishwaroop A
2025-04-16 11:06 ` [PATCH v3 4/6] arm64: tegra: Configure QSPI clocks and add DMA Vishwaroop A
2025-04-16 14:11   ` Jon Hunter
2025-04-16 11:06 ` [PATCH v3 5/6] spi: tegra210-quad: Update dummy sequence configuration Vishwaroop A
2025-04-16 11:06 ` [PATCH v3 6/6] spi: tegra210-quad: Add support for internal DMA Vishwaroop A
2025-04-16 11:57   ` Mukesh Kumar Savaliya
2025-04-16 12:23     ` Mark Brown
2025-04-16 14:08     ` Jon Hunter [this message]
2025-04-24 13:29   ` Mark Brown
2025-04-16 12:43 ` [PATCH v3 0/6] Configure Clocks, Add Internal DMA support Rob Herring (Arm)
2025-04-25 23:00 ` (subset) " Mark Brown

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