From: Peter De Schrijver <pdeschrijver@nvidia.com>
To: jonathanh@nvidia.com, linux-tegra@vger.kernel.org,
linux-clk@vger.kernel.org
Cc: Peter De Schrijver <pdeschrijver@nvidia.com>
Subject: [PATCH v3 4/4] soc/tegra: pmc: apply MBIST work around fo Tegra210
Date: Tue, 23 Jan 2018 11:22:49 +0200 [thread overview]
Message-ID: <1516699369-3513-5-git-send-email-pdeschrijver@nvidia.com> (raw)
In-Reply-To: <1516699369-3513-1-git-send-email-pdeschrijver@nvidia.com>
Apply the memory built-in self test work around when ungating certain
Tegra210 power domains.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
---
drivers/soc/tegra/pmc.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c
index ce62a47..c4eff4b 100644
--- a/drivers/soc/tegra/pmc.c
+++ b/drivers/soc/tegra/pmc.c
@@ -153,6 +153,7 @@ struct tegra_pmc_soc {
bool has_tsense_reset;
bool has_gpu_clamps;
+ bool needs_mbist_war;
const struct tegra_io_pad_soc *io_pads;
unsigned int num_io_pads;
@@ -431,6 +432,9 @@ static int tegra_powergate_power_up(struct tegra_powergate *pg,
usleep_range(10, 20);
+ if (pg->pmc->soc->needs_mbist_war)
+ tegra210_clk_handle_mbist_war(pg->id);
+
if (disable_clocks)
tegra_powergate_disable_clocks(pg);
@@ -1815,6 +1819,7 @@ static void tegra20_pmc_setup_irq_polarity(struct tegra_pmc *pmc,
.cpu_powergates = tegra210_cpu_powergates,
.has_tsense_reset = true,
.has_gpu_clamps = true,
+ .needs_mbist_war = true,
.num_io_pads = ARRAY_SIZE(tegra210_io_pads),
.io_pads = tegra210_io_pads,
.regs = &tegra20_pmc_regs,
--
1.9.1
next prev parent reply other threads:[~2018-01-23 9:22 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-23 9:22 [PATCH v3 0/4] MBIST work around (WAR) for Tegra210 Peter De Schrijver
2018-01-23 9:22 ` [PATCH v3 1/4] clk: tegra: Add la clock " Peter De Schrijver
[not found] ` <1516699369-3513-2-git-send-email-pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2018-01-24 10:03 ` Jon Hunter
[not found] ` <31118e4b-80bd-1db2-0a82-9359b99deccf-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2018-01-24 11:23 ` Peter De Schrijver
2018-01-23 9:22 ` [PATCH v3 2/4] clk: tegra: add fence_delay for clock registers Peter De Schrijver
2018-01-24 10:20 ` Jon Hunter
2018-01-23 9:22 ` [PATCH v3 3/4] clk: tegra: MBIST work around for Tegra210 Peter De Schrijver
2018-01-24 21:59 ` Jon Hunter
[not found] ` <637b3bb4-1ac0-5612-ec2e-5740e611b11a-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2018-01-25 9:02 ` Peter De Schrijver
[not found] ` <20180125090255.GK7031-Rysk9IDjsxmJz7etNGeUX8VPkgjIgRvpAL8bYrjMMd8@public.gmane.org>
2018-01-25 10:19 ` Jon Hunter
[not found] ` <a161a11c-1794-ebc4-3ff0-7624c23cabdb-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2018-01-25 12:41 ` Peter De Schrijver
[not found] ` <20180125124157.GN7031-Rysk9IDjsxmJz7etNGeUX8VPkgjIgRvpAL8bYrjMMd8@public.gmane.org>
2018-01-25 13:04 ` Jon Hunter
2018-01-23 9:22 ` Peter De Schrijver [this message]
2018-01-24 22:43 ` [PATCH v3 4/4] soc/tegra: pmc: apply MBIST work around fo Tegra210 Jon Hunter
[not found] ` <cf919367-4521-25b1-1f80-16e2b660045e-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2018-01-25 10:06 ` Peter De Schrijver
2018-01-25 10:57 ` Jon Hunter
[not found] ` <fe422430-cb85-c28d-404b-98e7b87c15e0-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2018-01-25 12:26 ` Peter De Schrijver
[not found] ` <20180125122613.GM7031-Rysk9IDjsxmJz7etNGeUX8VPkgjIgRvpAL8bYrjMMd8@public.gmane.org>
2018-01-25 13:07 ` Jon Hunter
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