From: "Rob Herring (Arm)" <robh@kernel.org>
To: Thierry Reding <thierry.reding@gmail.com>
Cc: devicetree@vger.kernel.org, Krzysztof Kozlowski <krzk@kernel.org>,
Jon Hunter <jonathanh@nvidia.com>,
linux-tegra@vger.kernel.org, Conor Dooley <conor+dt@kernel.org>
Subject: Re: [PATCH v2 1/3] dt-bindings: memory: tegra: Document DBB clock for Tegra264
Date: Fri, 14 Nov 2025 12:21:02 -0600 [thread overview]
Message-ID: <176314446160.3849504.15297758784571269397.robh@kernel.org> (raw)
In-Reply-To: <20251105195342.2705855-2-thierry.reding@gmail.com>
On Wed, 05 Nov 2025 20:53:40 +0100, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
>
> Accesses to external memory are routed through the data backbone (DBB)
> on Tegra264. A separate clock feeds this path and needs to be enabled
> whenever an IP block makes an access to external memory. The external
> memory controller driver is the best place to control this clock since
> it knows how many devices are actively accessing memory.
>
> Document the presence of this clock on Tegra264 only.
>
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
> Changes in v2:
> - add minItems to clocks and clock-names properties
>
> .../memory-controllers/nvidia,tegra186-mc.yaml | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
next prev parent reply other threads:[~2025-11-14 18:21 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-05 19:53 [PATCH v2 0/3] arm64: tegra: Add DBB clock to EMC on Tegra264 Thierry Reding
2025-11-05 19:53 ` [PATCH v2 1/3] dt-bindings: memory: tegra: Document DBB clock for Tegra264 Thierry Reding
2025-11-14 18:21 ` Rob Herring (Arm) [this message]
2025-11-05 19:53 ` [PATCH v2 2/3] memory: tegra: Add support for DBB clock on Tegra264 Thierry Reding
2025-11-07 15:26 ` Krzysztof Kozlowski
2025-11-05 19:53 ` [PATCH v2 3/3] arm64: tegra: Add DBB clock to EMC " Thierry Reding
2026-01-16 12:29 ` (subset) [PATCH v2 0/3] " Thierry Reding
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