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From: Thierry Reding <thierry.reding@gmail.com>
To: Thierry Reding <thierry.reding@gmail.com>,
	Krzysztof Kozlowski <krzk@kernel.org>
Cc: Rob Herring <robh@kernel.org>, Conor Dooley <conor+dt@kernel.org>,
	Jon Hunter <jonathanh@nvidia.com>,
	linux-tegra@vger.kernel.org, devicetree@vger.kernel.org
Subject: [PATCH v2 1/3] dt-bindings: memory: tegra: Document DBB clock for Tegra264
Date: Wed,  5 Nov 2025 20:53:40 +0100	[thread overview]
Message-ID: <20251105195342.2705855-2-thierry.reding@gmail.com> (raw)
In-Reply-To: <20251105195342.2705855-1-thierry.reding@gmail.com>

From: Thierry Reding <treding@nvidia.com>

Accesses to external memory are routed through the data backbone (DBB)
on Tegra264. A separate clock feeds this path and needs to be enabled
whenever an IP block makes an access to external memory. The external
memory controller driver is the best place to control this clock since
it knows how many devices are actively accessing memory.

Document the presence of this clock on Tegra264 only.

Signed-off-by: Thierry Reding <treding@nvidia.com>
---
Changes in v2:
- add minItems to clocks and clock-names properties

 .../memory-controllers/nvidia,tegra186-mc.yaml      | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml
index b901f1b3e0fc..7b03b589168b 100644
--- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml
+++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml
@@ -92,10 +92,14 @@ patternProperties:
       clocks:
         items:
           - description: external memory clock
+          - description: data backbone clock
+        minItems: 1
 
       clock-names:
         items:
           - const: emc
+          - const: dbb
+        minItems: 1
 
       "#interconnect-cells":
         const: 0
@@ -115,6 +119,9 @@ patternProperties:
             reg:
               maxItems: 1
 
+            clocks:
+              maxItems: 1
+
       - if:
           properties:
             compatible:
@@ -124,6 +131,9 @@ patternProperties:
             reg:
               minItems: 2
 
+            clocks:
+              maxItems: 1
+
       - if:
           properties:
             compatible:
@@ -133,6 +143,9 @@ patternProperties:
             reg:
               minItems: 2
 
+            clocks:
+              maxItems: 1
+
       - if:
           properties:
             compatible:
-- 
2.51.2


  reply	other threads:[~2025-11-05 19:53 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-05 19:53 [PATCH v2 0/3] arm64: tegra: Add DBB clock to EMC on Tegra264 Thierry Reding
2025-11-05 19:53 ` Thierry Reding [this message]
2025-11-14 18:21   ` [PATCH v2 1/3] dt-bindings: memory: tegra: Document DBB clock for Tegra264 Rob Herring (Arm)
2025-11-05 19:53 ` [PATCH v2 2/3] memory: tegra: Add support for DBB clock on Tegra264 Thierry Reding
2025-11-07 15:26   ` Krzysztof Kozlowski
2025-11-05 19:53 ` [PATCH v2 3/3] arm64: tegra: Add DBB clock to EMC " Thierry Reding
2026-01-16 12:29 ` (subset) [PATCH v2 0/3] " Thierry Reding

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