* Re: [PATCH V3] clk: qcom: clk-alpha-pll: Simplify the zonda_pll_adjust_l_val() [not found] <20240906113905.641336-1-quic_skakitap@quicinc.com> @ 2024-09-06 14:14 ` Jon Hunter 2024-09-09 10:57 ` Jon Hunter 0 siblings, 1 reply; 3+ messages in thread From: Jon Hunter @ 2024-09-06 14:14 UTC (permalink / raw) To: Satya Priya Kakitapalli, Michael Turquette, Stephen Boyd, Bjorn Andersson Cc: Dmitry Baryshkov, linux-arm-msm, linux-clk, linux-kernel, Ajit Pandey, Taniya Das, Imran Shaik, Jagadeesh Kona, Dan Carpenter, Vladimir Zapolskiy, kernel test robot, linux-tegra@vger.kernel.org On 06/09/2024 12:39, Satya Priya Kakitapalli wrote: > In zonda_pll_adjust_l_val() replace the divide operator with comparison > operator to fix below build error and smatch warning. > > drivers/clk/qcom/clk-alpha-pll.o: In function `clk_zonda_pll_set_rate': > clk-alpha-pll.c:(.text+0x45dc): undefined reference to `__aeabi_uldivmod' > > smatch warnings: > drivers/clk/qcom/clk-alpha-pll.c:2129 zonda_pll_adjust_l_val() warn: replace > divide condition '(remainder * 2) / prate' with '(remainder * 2) >= prate' > > Fixes: f4973130d255 ("clk: qcom: clk-alpha-pll: Update set_rate for Zonda PLL") > Reported-by: Jon Hunter <jonathanh@nvidia.com> > Reported-by: kernel test robot <lkp@intel.com> > Reported-by: Dan Carpenter <dan.carpenter@linaro.org> > Closes: https://lore.kernel.org/r/202408110724.8pqbpDiD-lkp@intel.com/ > Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com> > --- > drivers/clk/qcom/clk-alpha-pll.c | 4 +--- > 1 file changed, 1 insertion(+), 3 deletions(-) > > diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c > index 019713c38f25..f9105443d7db 100644 > --- a/drivers/clk/qcom/clk-alpha-pll.c > +++ b/drivers/clk/qcom/clk-alpha-pll.c > @@ -2176,10 +2176,8 @@ static void zonda_pll_adjust_l_val(unsigned long rate, unsigned long prate, u32 > > quotient = rate; > remainder = do_div(quotient, prate); > - *l = quotient; > > - if ((remainder * 2) / prate) > - *l = *l + 1; > + *l = rate + (u32)(remainder * 2 >= prate); > } > > static int clk_zonda_pll_set_rate(struct clk_hw *hw, unsigned long rate, Tested-by: Jon Hunter <jonathanh@nvidia.com> Thanks! Jon -- nvpublic ^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH V3] clk: qcom: clk-alpha-pll: Simplify the zonda_pll_adjust_l_val() 2024-09-06 14:14 ` [PATCH V3] clk: qcom: clk-alpha-pll: Simplify the zonda_pll_adjust_l_val() Jon Hunter @ 2024-09-09 10:57 ` Jon Hunter 2024-09-09 21:08 ` Stephen Boyd 0 siblings, 1 reply; 3+ messages in thread From: Jon Hunter @ 2024-09-09 10:57 UTC (permalink / raw) To: Satya Priya Kakitapalli, Michael Turquette, Stephen Boyd, Bjorn Andersson Cc: Dmitry Baryshkov, linux-arm-msm, linux-clk, linux-kernel, Ajit Pandey, Taniya Das, Imran Shaik, Jagadeesh Kona, Dan Carpenter, Vladimir Zapolskiy, kernel test robot, linux-tegra@vger.kernel.org On 06/09/2024 15:14, Jon Hunter wrote: > > On 06/09/2024 12:39, Satya Priya Kakitapalli wrote: >> In zonda_pll_adjust_l_val() replace the divide operator with comparison >> operator to fix below build error and smatch warning. >> >> drivers/clk/qcom/clk-alpha-pll.o: In function `clk_zonda_pll_set_rate': >> clk-alpha-pll.c:(.text+0x45dc): undefined reference to `__aeabi_uldivmod' >> >> smatch warnings: >> drivers/clk/qcom/clk-alpha-pll.c:2129 zonda_pll_adjust_l_val() warn: >> replace >> divide condition '(remainder * 2) / prate' with '(remainder * 2) >= >> prate' >> >> Fixes: f4973130d255 ("clk: qcom: clk-alpha-pll: Update set_rate for >> Zonda PLL") >> Reported-by: Jon Hunter <jonathanh@nvidia.com> >> Reported-by: kernel test robot <lkp@intel.com> >> Reported-by: Dan Carpenter <dan.carpenter@linaro.org> >> Closes: https://lore.kernel.org/r/202408110724.8pqbpDiD-lkp@intel.com/ >> Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com> >> --- >> drivers/clk/qcom/clk-alpha-pll.c | 4 +--- >> 1 file changed, 1 insertion(+), 3 deletions(-) >> >> diff --git a/drivers/clk/qcom/clk-alpha-pll.c >> b/drivers/clk/qcom/clk-alpha-pll.c >> index 019713c38f25..f9105443d7db 100644 >> --- a/drivers/clk/qcom/clk-alpha-pll.c >> +++ b/drivers/clk/qcom/clk-alpha-pll.c >> @@ -2176,10 +2176,8 @@ static void zonda_pll_adjust_l_val(unsigned >> long rate, unsigned long prate, u32 >> quotient = rate; >> remainder = do_div(quotient, prate); >> - *l = quotient; >> - if ((remainder * 2) / prate) >> - *l = *l + 1; >> + *l = rate + (u32)(remainder * 2 >= prate); >> } >> static int clk_zonda_pll_set_rate(struct clk_hw *hw, unsigned long >> rate, > > > Tested-by: Jon Hunter <jonathanh@nvidia.com> Looks like this has now landed in the mainline. Can we see if we can get this into v6.11? Thanks! Jon -- nvpublic ^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH V3] clk: qcom: clk-alpha-pll: Simplify the zonda_pll_adjust_l_val() 2024-09-09 10:57 ` Jon Hunter @ 2024-09-09 21:08 ` Stephen Boyd 0 siblings, 0 replies; 3+ messages in thread From: Stephen Boyd @ 2024-09-09 21:08 UTC (permalink / raw) To: Bjorn Andersson, Jon Hunter, Michael Turquette, Satya Priya Kakitapalli Cc: Dmitry Baryshkov, linux-arm-msm, linux-clk, linux-kernel, Ajit Pandey, Taniya Das, Imran Shaik, Jagadeesh Kona, Dan Carpenter, Vladimir Zapolskiy, kernel test robot, linux-tegra Quoting Jon Hunter (2024-09-09 03:57:09) > > On 06/09/2024 15:14, Jon Hunter wrote: > > > > On 06/09/2024 12:39, Satya Priya Kakitapalli wrote: > >> In zonda_pll_adjust_l_val() replace the divide operator with comparison > >> operator to fix below build error and smatch warning. > >> > >> drivers/clk/qcom/clk-alpha-pll.o: In function `clk_zonda_pll_set_rate': > >> clk-alpha-pll.c:(.text+0x45dc): undefined reference to `__aeabi_uldivmod' > >> > >> smatch warnings: > >> drivers/clk/qcom/clk-alpha-pll.c:2129 zonda_pll_adjust_l_val() warn: > >> replace > >> divide condition '(remainder * 2) / prate' with '(remainder * 2) >= > >> prate' > >> > >> Fixes: f4973130d255 ("clk: qcom: clk-alpha-pll: Update set_rate for > >> Zonda PLL") > >> Reported-by: Jon Hunter <jonathanh@nvidia.com> > >> Reported-by: kernel test robot <lkp@intel.com> > >> Reported-by: Dan Carpenter <dan.carpenter@linaro.org> > >> Closes: https://lore.kernel.org/r/202408110724.8pqbpDiD-lkp@intel.com/ > >> Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com> > >> --- > >> drivers/clk/qcom/clk-alpha-pll.c | 4 +--- > >> 1 file changed, 1 insertion(+), 3 deletions(-) > >> > >> diff --git a/drivers/clk/qcom/clk-alpha-pll.c > >> b/drivers/clk/qcom/clk-alpha-pll.c > >> index 019713c38f25..f9105443d7db 100644 > >> --- a/drivers/clk/qcom/clk-alpha-pll.c > >> +++ b/drivers/clk/qcom/clk-alpha-pll.c > >> @@ -2176,10 +2176,8 @@ static void zonda_pll_adjust_l_val(unsigned > >> long rate, unsigned long prate, u32 > >> quotient = rate; > >> remainder = do_div(quotient, prate); > >> - *l = quotient; > >> - if ((remainder * 2) / prate) > >> - *l = *l + 1; > >> + *l = rate + (u32)(remainder * 2 >= prate); > >> } > >> static int clk_zonda_pll_set_rate(struct clk_hw *hw, unsigned long > >> rate, > > > > > > Tested-by: Jon Hunter <jonathanh@nvidia.com> > > > Looks like this has now landed in the mainline. Can we see if we can get > this into v6.11? > Applied to clk-fixes. Was it too hard to keep the if statement and just change to a comparison? if (remainder * 2 >= prate) *l = *l + 1; ^ permalink raw reply [flat|nested] 3+ messages in thread
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[not found] <20240906113905.641336-1-quic_skakitap@quicinc.com>
2024-09-06 14:14 ` [PATCH V3] clk: qcom: clk-alpha-pll: Simplify the zonda_pll_adjust_l_val() Jon Hunter
2024-09-09 10:57 ` Jon Hunter
2024-09-09 21:08 ` Stephen Boyd
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