From: Aaron Kling via B4 Relay <devnull+webgeek1234.gmail.com@kernel.org>
To: Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Thierry Reding <thierry.reding@gmail.com>,
Jonathan Hunter <jonathanh@nvidia.com>,
Joseph Lo <josephl@nvidia.com>,
Peter De Schrijver <pdeschrijver@nvidia.com>,
Prashant Gaikwad <pgaikwad@nvidia.com>
Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org,
Thierry Reding <treding@nvidia.com>,
Aaron Kling <webgeek1234@gmail.com>
Subject: [PATCH 0/5] Properly Limit Tegra210 Clock Rates
Date: Sat, 16 Aug 2025 00:53:32 -0500 [thread overview]
Message-ID: <20250816-tegra210-speedo-v1-0-a981360adc27@gmail.com> (raw)
The Tegra210 CVB tables were added in commit 2b2dbc2f94e5. Since then,
all Tegra210 socs have tried to scale the cpu to 1.9 GHz, when the
supported devkits are only supposed to scale to 1.5 or 1.7 GHZ.
Overclocking should not be the default state.
Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
---
Aaron Kling (5):
dt-bindings: clock: tegra124-dfll: Add property to limit frequency
soc: tegra: fuse: speedo-tegra210: Update speedo ids
soc: tegra: fuse: speedo-tegra210: Add sku 0x8F
clk: tegra: dfll: Support limiting max clock per device
arm64: tegra: Limit max cpu frequency on P3450
.../bindings/clock/nvidia,tegra124-dfll.txt | 3 ++
arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts | 1 +
drivers/clk/tegra/clk-tegra124-dfll-fcpu.c | 8 ++++-
drivers/soc/tegra/fuse/speedo-tegra210.c | 39 ++++++++++++++++++----
4 files changed, 43 insertions(+), 8 deletions(-)
---
base-commit: 8f5ae30d69d7543eee0d70083daf4de8fe15d585
change-id: 20250812-tegra210-speedo-470691e8b8cc
Best regards,
--
Aaron Kling <webgeek1234@gmail.com>
next reply other threads:[~2025-08-16 5:54 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-16 5:53 Aaron Kling via B4 Relay [this message]
2025-08-16 5:53 ` [PATCH 1/5] dt-bindings: clock: tegra124-dfll: Add property to limit frequency Aaron Kling via B4 Relay
2025-08-16 8:21 ` Krzysztof Kozlowski
2025-08-18 3:23 ` Aaron Kling
2025-08-18 6:31 ` Krzysztof Kozlowski
2025-08-16 5:53 ` [PATCH 2/5] soc: tegra: fuse: speedo-tegra210: Update speedo ids Aaron Kling via B4 Relay
2025-09-03 6:39 ` Mikko Perttunen
2025-08-16 5:53 ` [PATCH 3/5] soc: tegra: fuse: speedo-tegra210: Add sku 0x8F Aaron Kling via B4 Relay
2025-08-16 5:53 ` [PATCH 4/5] clk: tegra: dfll: Support limiting max clock per device Aaron Kling via B4 Relay
2025-08-16 5:53 ` [PATCH 5/5] arm64: tegra: Limit max cpu frequency on P3450 Aaron Kling via B4 Relay
2025-09-03 5:50 ` Mikko Perttunen
2025-09-03 6:28 ` Aaron Kling
2025-09-03 7:29 ` Mikko Perttunen
2025-09-03 8:01 ` Aaron Kling
2025-09-04 0:55 ` Mikko Perttunen
2025-09-04 1:55 ` Aaron Kling
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