[PATCH] soc/tegra: pmc: Fix uninitialised clock rate

[PATCH] soc/tegra: pmc: Fix uninitialised clock rate

[Jon Hunter]

For legacy 32-bit Tegra devices, the warning in the
tegra_pmc_enter_suspend_mode() function is being triggered because the
early_pmc->rate variable is never configured and hence, always 0. This
issue started occurring after updating the PMC driver to create the PMC
context dynamically which causes the 'rate' to be set in the new dynamic
context, but missed updating the rate in the early PMC context.

Fix this by initialising the early_pmc->rate variable for 32-bit Tegra
devices when the rate for the PMC context is initialised.

Fixes: 4d61f0342689 ("soc/tegra: pmc: Create PMC context dynamically")
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
---
 drivers/soc/tegra/pmc.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c
index 41ed716d5857..6d7ac2b8c74e 100644
--- a/drivers/soc/tegra/pmc.c
+++ b/drivers/soc/tegra/pmc.c
@@ -3121,6 +3121,9 @@ static int tegra_pmc_probe(struct platform_device *pdev)
 		}
 
 		pmc->rate = clk_get_rate(pmc->clk);
+#if defined(CONFIG_ARM)
+		early_pmc->rate = pmc->rate;
+#endif
 	}
 
 	err = tegra_pmc_init(pmc);
-- 
2.43.0