From: Peter Ujfalusi <peter.ujfalusi@ti.com>
To: Jon Hunter <jonathanh@nvidia.com>,
Sameer Pujar <spujar@nvidia.com>, Vinod Koul <vkoul@kernel.org>
Cc: dan.j.williams@intel.com, tiwai@suse.com,
dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org,
sharadg@nvidia.com, rlokhande@nvidia.com, dramesh@nvidia.com,
mkumard@nvidia.com, linux-tegra <linux-tegra@vger.kernel.org>
Subject: Re: [PATCH] [RFC] dmaengine: add fifo_size member
Date: Fri, 7 Jun 2019 16:35:53 +0300 [thread overview]
Message-ID: <56aa6f45-cfd8-7f1e-9392-628ceb58093f@ti.com> (raw)
In-Reply-To: <a65f2b07-4a3a-7f83-e21f-8b374844a4b9@nvidia.com>
On 07/06/2019 15.58, Jon Hunter wrote:
>> Imho if you can explain it without using 'HACK' in the sentences it
>> might be OK, but it does not feel right.
>
> I don't perceive this as a hack. Although from looking at the
> description of the src/dst_maxburst these are burst size with regard to
> the device, so maybe it is a stretch.
>
>> However since your ADMA and ADMIF is highly coupled and it does needs
>> special maxburst information (burst and allocated FIFO depth) I would
>> rather use src_maxburst/dst_maxburst alone for DEV_TO_MEM/MEM_TO_DEV:
>>
>> ADMA_BURST_SIZE(maxburst) ((maxburst) & 0xff)
>> ADMA_FIFO_SIZE(maxburst) (((maxburst) >> 8) & 0xffffff)
>>
>> So lower 1 byte is the burst value you want from ADMA
>> the other 3 bytes are the allocated FIFO size for the given ADMAIF channel.
>>
>> Sure, you need a header for this to make sure there is no
>> misunderstanding between the two sides.
>
> I don't like this because as I mentioned to Dmitry, the ADMA can perform
> memory-to-memory transfers where such encoding would not be applicable.
mem2mem does not really use dma_slave_config, it is for used by
is_slave_direction() == true type of transfers.
But true, if you use ADMA against anything other than ADMAIF then this
might be not right for non cyclic transfers.
> That does not align with the description in the
> include/linux/dmaengine.h either.
True.
>> Or pass the allocated FIFO size via maxburst and then the ADMA driver
>> will pick a 'good/safe' burst value for it.
>>
>> Or new member, but do you need two of them for src/dst? Probably
>> fifo_depth is better word for it, or allocated_fifo_depth.
>
> Right, so looking at the struct dma_slave_config we have ...
>
> u32 src_maxburst;
> u32 dst_maxburst;
> u32 src_port_window_size;
> u32 dst_port_window_size;
>
> Now if we could make these window sizes a union like the following this
> could work ...
>
> diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
> index 8fcdee1c0cf9..851251263527 100644
> --- a/include/linux/dmaengine.h
> +++ b/include/linux/dmaengine.h
> @@ -360,8 +360,14 @@ struct dma_slave_config {
> enum dma_slave_buswidth dst_addr_width;
> u32 src_maxburst;
> u32 dst_maxburst;
> - u32 src_port_window_size;
> - u32 dst_port_window_size;
> + union {
> + u32 port_window_size;
> + u32 port_fifo_size;
> + } src;
> + union {
> + u32 port_window_size;
> + u32 port_fifo_size;
> + } dst;
What if in the future someone will have a setup where they would need both?
So not sure. Your problems are coming from a split DMA setup where the
two are highly coupled, but sits in a different place and need to be
configured as one device.
I think xilinx_dma is facing with similar issues and they have a custom
API to set parameters which does not fit or is peripheral specific:
include/linux/dma/xilinx_dma.h
Not sure if that is an acceptable solution.
- Péter
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
next prev parent reply other threads:[~2019-06-07 13:35 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1556623828-21577-1-git-send-email-spujar@nvidia.com>
[not found] ` <20190502060446.GI3845@vkoul-mobl.Dlink>
[not found] ` <e852d576-9cc2-ed42-1a1a-d696112c88bf@nvidia.com>
[not found] ` <20190502122506.GP3845@vkoul-mobl.Dlink>
[not found] ` <3368d1e1-0d7f-f602-5b96-a978fcf4d91b@nvidia.com>
[not found] ` <20190504102304.GZ3845@vkoul-mobl.Dlink>
[not found] ` <ce0e9c0b-b909-54ae-9086-a1f0f6be903c@nvidia.com>
[not found] ` <20190506155046.GH3845@vkoul-mobl.Dlink>
[not found] ` <b7e28e73-7214-f1dc-866f-102410c88323@nvidia.com>
[not found] ` <ed95f03a-bbe7-ad62-f2e1-9bfe22ec733a@ti.com>
[not found] ` <4cab47d0-41c3-5a87-48e1-d7f085c2e091@nvidia.com>
[not found] ` <8a5b84db-c00b-fff4-543f-69d90c245660@nvidia.com>
[not found] ` <3f836a10-eaf3-f59b-7170-6fe937cf2e43@ti.com>
2019-06-06 10:49 ` [PATCH] [RFC] dmaengine: add fifo_size member Jon Hunter
2019-06-06 11:54 ` Peter Ujfalusi
2019-06-06 12:37 ` Jon Hunter
2019-06-06 13:45 ` Dmitry Osipenko
2019-06-06 13:55 ` Dmitry Osipenko
2019-06-06 14:26 ` Jon Hunter
2019-06-06 14:36 ` Jon Hunter
2019-06-06 14:36 ` Dmitry Osipenko
2019-06-06 14:47 ` Jon Hunter
2019-06-06 14:25 ` Jon Hunter
2019-06-06 15:18 ` Dmitry Osipenko
2019-06-06 16:32 ` Jon Hunter
2019-06-06 16:44 ` Dmitry Osipenko
2019-06-06 16:53 ` Jon Hunter
2019-06-06 17:25 ` Dmitry Osipenko
2019-06-06 17:56 ` Dmitry Osipenko
2019-06-07 9:24 ` Jon Hunter
2019-06-07 5:50 ` Peter Ujfalusi
2019-06-07 9:18 ` Jon Hunter
2019-06-07 10:27 ` Jon Hunter
2019-06-07 12:17 ` Peter Ujfalusi
2019-06-07 12:58 ` Jon Hunter
2019-06-07 13:35 ` Peter Ujfalusi [this message]
2019-06-07 20:53 ` Dmitry Osipenko
2019-06-10 8:01 ` Jon Hunter
2019-06-10 7:59 ` Jon Hunter
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