Re: [RFC v1 1/2] PCI: tegra: Simplify clock handling by using clk_bulk*() functions

[Jon Hunter <jonathanh@nvidia.com>]

On 17/09/2025 19:26, Anand Moon wrote:
> Hi Jon,
> 
> On Wed, 17 Sept 2025 at 19:14, Jon Hunter <jonathanh@nvidia.com> wrote:
>>
>>
>> On 31/08/2025 20:00, Anand Moon wrote:
>>> Currently, the driver acquires clocks and prepare/enable/disable/unprepare
>>> the clocks individually thereby making the driver complex to read.
>>>
>>> The driver can be simplified by using the clk_bulk*() APIs.
>>>
>>> Use:
>>>     - devm_clk_bulk_get_all() API to acquire all the clocks
>>>     - clk_bulk_prepare_enable() to prepare/enable clocks
>>>     - clk_bulk_disable_unprepare() APIs to disable/unprepare them in bulk
>>>
>>> As part of this cleanup, the legacy has_cml_clk flag and explicit handling
>>> of individual clocks (pex, afi, pll_e, cml) are removed. Clock sequencing
>>> is now implicitly determined by the order defined in the device tree,
>>> eliminating hardcoded logic and improving maintainability.
>>
>> What platforms have you tested this change on?
>>
> I'm using a Jetson Nano 4GB model as my test platform.

Thanks. One concern I have about this is that right now the DT binding 
doc for this device is still in the legacy text format and not converted 
to yaml. Therefore, there is no way to validate the device-tree bindings 
for this driver. So by making this change we are susceptible to people 
getting the device-tree incorrect and there is no way to check. Right 
now the driver will fail is a given clock is missing but after this 
change we are completely reliant that the device-tree is correct but no 
way to validate.	

It would be great to convert the text binding doc to yaml as part of 
this series.

Also if you look at the dwmac-tegra.c driver this one still populates 
the clock names when using the bulk APIs so that we know that the clocks 
that we require are present.

Jon

[0] drivers/net/ethernet/stmicro/stmmac/dwmac-tegra.c

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