messages from 2026-10-16 06:48:16 to 2026-10-16 16:07:18 UTC [more...]
[PATCH v2 0/6] Keep the fuse clock enabled while the Tegra GPU is powered
2026-10-16 16:06 UTC (7+ messages)
` [PATCH v2 1/6] dt-bindings: gpu: nvidia,gk20a: Require the fuse clock
` [PATCH v2 2/6] ARM: tegra: Add the fuse clock to the Tegra124 GPU
` [PATCH v2 3/6] arm64: tegra: Add the fuse clock to the Tegra132 GPU
` [PATCH v2 4/6] arm64: tegra: Add the fuse clock to the Tegra186 GPU
` [PATCH v2 5/6] arm64: tegra: Add the fuse clock to the Tegra210 GPU
` [PATCH v2 6/6] drm/nouveau/tegra: Keep the fuse clock enabled while the GPU is powered
[PATCH 00/75] drm/connector: Convert all drivers to atomic_create_state and remove reset
2026-10-16 15:12 UTC (3+ messages)
` (subset) "
[PATCH 0/2] spi: tegra210-quad: Fix timeout path status handling and DMA leak
2026-10-16 14:45 UTC (4+ messages)
` [PATCH 1/2] spi: tegra210-quad: don't overwrite refreshed status with lost-IRQ snapshot
` [PATCH 2/2] spi: tegra210-quad: Unmap DMA buffers on transfer timeout
[PATCH 00/11] PCI: tegra194: Fix EP and Root Port corner cases
2026-10-16 9:32 UTC (7+ messages)
` [PATCH 03/11] PCI: tegra194: Fix Endpoint PERST# IRQ suspend race
` [PATCH 04/11] PCI: tegra194: Do not skip no-link Root Port remove cleanup
[PATCH 0/5] PCI: dwc: Clean up RAS-DES and register field handling
2026-10-16 7:45 UTC (3+ messages)
[PATCH v2 0/5] PCI: dwc: Clean up RAS-DES and register field handling
2026-10-16 7:40 UTC (6+ messages)
` [PATCH v2 1/5] PCI: dwc: Add RAS event counter field masks
` [PATCH v2 2/5] PCI: tegra194: Use FIELD_*() for register fields
` [PATCH v2 3/5] PCI: dwc: Drop unused shift macros
` [PATCH v2 4/5] PCI: tegra194: Use standard RAS event selector mask
` [PATCH v2 5/5] PCI: dwc: Consolidate RAS-DES event counter fields
[PATCH v2 00/11] Make the 32-bit ARM DMA API work with normal IOMMU DMA default domains (+ Tegra PoC)
2026-10-16 6:46 UTC (7+ messages)
` [PATCH v2 06/11] ARM: dma-mapping: Handle foreign buffers in arm_iommu_get_sgtable
` [PATCH v2 07/11] iommu: Let 32-bit ARM drivers opt into a DMA API default domain
` [PATCH v2 08/11] iommu/tegra-smmu: Defer display client translation to driver handover
` [PATCH v2 09/11] gpu: host1x: Drop release of legacy 32-bit ARM DMA domain
` [PATCH v2 10/11] drm/tegra: "
` [PATCH v2 11/11] iommu/tegra-smmu: Use a DMA API default domain per swgroup
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