[PATCH] Revert "PCI: tegra: Use PCI_CONF1_EXT_ADDRESS() macro"

[PATCH] Revert "PCI: tegra: Use PCI_CONF1_EXT_ADDRESS() macro"

[Jon Hunter]

This reverts commit 8bb7ff12a91429eb76e093b517ae810b146448fe.

Commit 8bb7ff12a914 ("PCI: tegra: Use PCI_CONF1_EXT_ADDRESS() macro")
updated the Tegra PCI driver to use the macro PCI_CONF1_EXT_ADDRESS()
instead of a local function in the Tegra PCI driver. This is breaking
PCI for some Tegra platforms because, when calculating the offset value,
the mask applied to the lower 8-bits changed from 0xff to 0xfc. For now,
fix this by reverting this commit.

Fixes: 8bb7ff12a914 ("PCI: tegra: Use PCI_CONF1_EXT_ADDRESS() macro")
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
---
 drivers/pci/controller/pci-tegra.c | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/drivers/pci/controller/pci-tegra.c b/drivers/pci/controller/pci-tegra.c
index 24478ae5a345..8e323e93be91 100644
--- a/drivers/pci/controller/pci-tegra.c
+++ b/drivers/pci/controller/pci-tegra.c
@@ -415,6 +415,13 @@ static inline u32 pads_readl(struct tegra_pcie *pcie, unsigned long offset)
  * address (access to which generates correct config transaction) falls in
  * this 4 KiB region.
  */
+static unsigned int tegra_pcie_conf_offset(u8 bus, unsigned int devfn,
+					   unsigned int where)
+{
+	return ((where & 0xf00) << 16) | (bus << 16) | (PCI_SLOT(devfn) << 11) |
+	       (PCI_FUNC(devfn) << 8) | (where & 0xff);
+}
+
 static void __iomem *tegra_pcie_map_bus(struct pci_bus *bus,
 					unsigned int devfn,
 					int where)
@@ -436,9 +443,7 @@ static void __iomem *tegra_pcie_map_bus(struct pci_bus *bus,
 		unsigned int offset;
 		u32 base;
 
-		offset = PCI_CONF1_EXT_ADDRESS(bus->number, PCI_SLOT(devfn),
-					       PCI_FUNC(devfn), where) &
-			 ~PCI_CONF1_ENABLE;
+		offset = tegra_pcie_conf_offset(bus->number, devfn, where);
 
 		/* move 4 KiB window to offset within the FPCI region */
 		base = 0xfe100000 + ((offset & ~(SZ_4K - 1)) >> 8);
-- 
2.25.1

Re: [PATCH] Revert "PCI: tegra: Use PCI_CONF1_EXT_ADDRESS() macro"

[Thierry Reding]

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On Mon, Oct 17, 2022 at 09:40:06AM +0100, Jon Hunter wrote:
> This reverts commit 8bb7ff12a91429eb76e093b517ae810b146448fe.
> 
> Commit 8bb7ff12a914 ("PCI: tegra: Use PCI_CONF1_EXT_ADDRESS() macro")
> updated the Tegra PCI driver to use the macro PCI_CONF1_EXT_ADDRESS()
> instead of a local function in the Tegra PCI driver. This is breaking
> PCI for some Tegra platforms because, when calculating the offset value,
> the mask applied to the lower 8-bits changed from 0xff to 0xfc. For now,
> fix this by reverting this commit.
> 
> Fixes: 8bb7ff12a914 ("PCI: tegra: Use PCI_CONF1_EXT_ADDRESS() macro")
> Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
> ---
>  drivers/pci/controller/pci-tegra.c | 11 ++++++++---
>  1 file changed, 8 insertions(+), 3 deletions(-)

Sorry for missing this during review:

Acked-by: Thierry Reding <treding@nvidia.com>

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Re: [PATCH] Revert "PCI: tegra: Use PCI_CONF1_EXT_ADDRESS() macro"

[Lorenzo Pieralisi]

On Mon, Oct 17, 2022 at 09:40:06AM +0100, Jon Hunter wrote:
> This reverts commit 8bb7ff12a91429eb76e093b517ae810b146448fe.
> 
> Commit 8bb7ff12a914 ("PCI: tegra: Use PCI_CONF1_EXT_ADDRESS() macro")
> updated the Tegra PCI driver to use the macro PCI_CONF1_EXT_ADDRESS()
> instead of a local function in the Tegra PCI driver. This is breaking
> PCI for some Tegra platforms because, when calculating the offset value,
> the mask applied to the lower 8-bits changed from 0xff to 0xfc. For now,
> fix this by reverting this commit.
> 
> Fixes: 8bb7ff12a914 ("PCI: tegra: Use PCI_CONF1_EXT_ADDRESS() macro")
> Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
> ---
>  drivers/pci/controller/pci-tegra.c | 11 ++++++++---
>  1 file changed, 8 insertions(+), 3 deletions(-)

Acked-by: Lorenzo Pieralisi <lpieralisi@kernel.org>

Bjorn,

can we send it upstream for one of the upcoming -rcX please ?

Thanks,
Lorenzo

> diff --git a/drivers/pci/controller/pci-tegra.c b/drivers/pci/controller/pci-tegra.c
> index 24478ae5a345..8e323e93be91 100644
> --- a/drivers/pci/controller/pci-tegra.c
> +++ b/drivers/pci/controller/pci-tegra.c
> @@ -415,6 +415,13 @@ static inline u32 pads_readl(struct tegra_pcie *pcie, unsigned long offset)
>   * address (access to which generates correct config transaction) falls in
>   * this 4 KiB region.
>   */
> +static unsigned int tegra_pcie_conf_offset(u8 bus, unsigned int devfn,
> +					   unsigned int where)
> +{
> +	return ((where & 0xf00) << 16) | (bus << 16) | (PCI_SLOT(devfn) << 11) |
> +	       (PCI_FUNC(devfn) << 8) | (where & 0xff);
> +}
> +
>  static void __iomem *tegra_pcie_map_bus(struct pci_bus *bus,
>  					unsigned int devfn,
>  					int where)
> @@ -436,9 +443,7 @@ static void __iomem *tegra_pcie_map_bus(struct pci_bus *bus,
>  		unsigned int offset;
>  		u32 base;
>  
> -		offset = PCI_CONF1_EXT_ADDRESS(bus->number, PCI_SLOT(devfn),
> -					       PCI_FUNC(devfn), where) &
> -			 ~PCI_CONF1_ENABLE;
> +		offset = tegra_pcie_conf_offset(bus->number, devfn, where);
>  
>  		/* move 4 KiB window to offset within the FPCI region */
>  		base = 0xfe100000 + ((offset & ~(SZ_4K - 1)) >> 8);
> -- 
> 2.25.1
> 

Re: [PATCH] Revert "PCI: tegra: Use PCI_CONF1_EXT_ADDRESS() macro"

[Bjorn Helgaas]

On Mon, Oct 17, 2022 at 09:40:06AM +0100, Jon Hunter wrote:
> This reverts commit 8bb7ff12a91429eb76e093b517ae810b146448fe.
> 
> Commit 8bb7ff12a914 ("PCI: tegra: Use PCI_CONF1_EXT_ADDRESS() macro")
> updated the Tegra PCI driver to use the macro PCI_CONF1_EXT_ADDRESS()
> instead of a local function in the Tegra PCI driver. This is breaking
> PCI for some Tegra platforms because, when calculating the offset value,
> the mask applied to the lower 8-bits changed from 0xff to 0xfc. For now,
> fix this by reverting this commit.
> 
> Fixes: 8bb7ff12a914 ("PCI: tegra: Use PCI_CONF1_EXT_ADDRESS() macro")
> Signed-off-by: Jon Hunter <jonathanh@nvidia.com>

Applied with acks from Thierry and Lorenzo to for-linus for v6.1,
thanks!

> ---
>  drivers/pci/controller/pci-tegra.c | 11 ++++++++---
>  1 file changed, 8 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/pci/controller/pci-tegra.c b/drivers/pci/controller/pci-tegra.c
> index 24478ae5a345..8e323e93be91 100644
> --- a/drivers/pci/controller/pci-tegra.c
> +++ b/drivers/pci/controller/pci-tegra.c
> @@ -415,6 +415,13 @@ static inline u32 pads_readl(struct tegra_pcie *pcie, unsigned long offset)
>   * address (access to which generates correct config transaction) falls in
>   * this 4 KiB region.
>   */
> +static unsigned int tegra_pcie_conf_offset(u8 bus, unsigned int devfn,
> +					   unsigned int where)
> +{
> +	return ((where & 0xf00) << 16) | (bus << 16) | (PCI_SLOT(devfn) << 11) |
> +	       (PCI_FUNC(devfn) << 8) | (where & 0xff);
> +}
> +
>  static void __iomem *tegra_pcie_map_bus(struct pci_bus *bus,
>  					unsigned int devfn,
>  					int where)
> @@ -436,9 +443,7 @@ static void __iomem *tegra_pcie_map_bus(struct pci_bus *bus,
>  		unsigned int offset;
>  		u32 base;
>  
> -		offset = PCI_CONF1_EXT_ADDRESS(bus->number, PCI_SLOT(devfn),
> -					       PCI_FUNC(devfn), where) &
> -			 ~PCI_CONF1_ENABLE;
> +		offset = tegra_pcie_conf_offset(bus->number, devfn, where);
>  
>  		/* move 4 KiB window to offset within the FPCI region */
>  		base = 0xfe100000 + ((offset & ~(SZ_4K - 1)) >> 8);
> -- 
> 2.25.1
>