From: Jon Hunter <jonathanh@nvidia.com>
To: Akhil R <akhilrajeev@nvidia.com>,
Laxman Dewangan <ldewangan@nvidia.com>,
"vkoul@kernel.org" <vkoul@kernel.org>,
"thierry.reding@gmail.com" <thierry.reding@gmail.com>,
"p.zabel@pengutronix.de" <p.zabel@pengutronix.de>,
"dmaengine@vger.kernel.org" <dmaengine@vger.kernel.org>,
"linux-tegra@vger.kernel.org" <linux-tegra@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2 3/3] dmaengine: tegra: Add support for dma-channel-mask
Date: Fri, 23 Sep 2022 12:45:26 +0100 [thread overview]
Message-ID: <d289e057-9709-1b4d-f64f-c3ed627cd0f7@nvidia.com> (raw)
In-Reply-To: <SJ1PR12MB6339660F292E63B2E0CDD85FC0519@SJ1PR12MB6339.namprd12.prod.outlook.com>
On 23/09/2022 12:09, Akhil R wrote:
...
>> Ah OK. I was wondering how this worked with 'channel_reg_size' but
>> looking closer I see channel_reg_size is always SZ_64K. I wonder why we
>> even bother having this parameter and don't use SZ_64K directly?
> There is an offset from the base address which the per channel registers start.
> Although this offset value happens to match with the channel_reg_size, this is
> not actually the per channel register size.
Yes I see that, but I mean why do we even bother having this
channel_reg_size parameter? Does not look like we need this (currently).
All we need is ...
tdc->chan_base_offset = TEGRA_GPCDMA_CHANNEL_BASE_ADDR_OFFSET +
(i * SZ_64K);
Jon
--
nvpublic
next prev parent reply other threads:[~2022-09-23 11:45 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-19 11:25 [PATCH v2 0/3] Tegra GCPDMA: Add dma-channel-mask support Akhil R
2022-09-19 11:25 ` [PATCH v2 1/3] dt-bindings: dmaengine: Add dma-channel-mask to Tegra GPCDMA Akhil R
2022-09-23 10:06 ` Jon Hunter
2022-09-19 11:25 ` [PATCH v2 2/3] arm64: tegra: Add dma-channel-mask in GPCDMA node Akhil R
2022-09-23 10:06 ` Jon Hunter
2022-09-19 11:25 ` [PATCH v2 3/3] dmaengine: tegra: Add support for dma-channel-mask Akhil R
2022-09-23 10:08 ` Jon Hunter
2022-09-23 10:17 ` Akhil R
2022-09-23 10:50 ` Jon Hunter
2022-09-23 11:09 ` Akhil R
2022-09-23 11:45 ` Jon Hunter [this message]
2022-09-23 16:22 ` Akhil R
2022-09-23 10:50 ` Jon Hunter
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